STL210N4LF7AG STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 16
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuits
- 4 Package information
- 4.1 PowerFLAT™ 5x6 WF type C package information
- 4.2 PowerFLAT™ 5x6 WF packing information
Features
Order code VDS RDS(on) max. ID STL210N4LF7AG 40 V 1.6 mΩ 120 A
- AEC-Q101 qualified
- Among the lowest R DS(on) on the market
- Excellent FoM (figure of merit)
- Low C rss/Ciss ratio for EMI immunity
- High avalanche ruggedness
- Wettable flank package
Applications
- Switching applications
Description
This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Product status link STL210N4LF7AG Product summary Order code STL210N4LF7AG Marking 210N4LF7 Package PowerFLAT™ 5x6 Packing Tape and reel Automotive N-channel 40 V, 1.35 mΩ typ., 120 A, STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package STL210N4LF7AG Datasheet DS12887 - Rev 3 - December 2019 For further information contact your local STMicroelectronics sales office.
1 Electrical ratings
Table 1. Absolute maximum ratings
- This value is limited by package.
- Pulse width limited by safe operating area.
Table 2. Thermal data
- When mounted on an FR-4 board of 1 inch², 2oz Cu, t < 10s
2 Electrical characteristics
(TC = 25 °C unless otherwise specified) Table 3. On/off states Table 4. Dynamic Table 5. Switching times Figure 17. Switching time
Electrical characteristics
Table 6. Source-drain diode
- Pulsed: pulse duration = 300 µs, duty cycle 1.5%
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area Figure 2. Maximum transient thermal impedance Figure 3. Typical output characteristics Figure 4. Typical transfer characteristics Figure 5. Typical gate charge characteristics Figure 6. Typical drain-source on-resistance
3 Test circuits
Figure 12. Test circuit for resistive load switching times Figure 13. Test circuit for gate charge behavior Figure 14. Test circuit for inductive load switching and Figure 15. Unclamped inductive load test circuit Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. STL210N4LF7AG
Package information
4.1 PowerFLAT™ 5x6 WF type C package information
Figure 18. PowerFLAT™ 5x6 WF type C package outline
Table 7. PowerFLAT™ 5x6 WF type C mechanical data
Figure 19. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)
4.2 PowerFLAT™ 5x6 WF packing information
Figure 20. PowerFLAT™ 5x6 WF tape (dimensions are in mm)
1.50 MIN
hole to centreline of pocket. Figure 21. PowerFLAT™ 5x6 package orientation in carrier tape
Figure 22. PowerFLAT™ 5x6 reel (dimensions are in mm)
Revision history
Table 8. Document revision history Modified Table 3. On/off states. Updated Section 1 Electrical ratings and Section 2 Electrical characteristics. Added Section 2.1 Electrical characteristics (curves).