20N50B

20N50B THINKISEMI | Alldatasheet

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Technical content

Features

R DS(on) (Max 0.24 Ω)@V GS =10V Gate Charge (Typical 130nC) Improved dv/dt Capability High ruggedness 100% Avalanche Tested R DS(ON) = 0.24 ohm I D = 20A BV DSS = 500V 2. Drain 3. Source 1. Gate 20N50B Pb Free Plating Product 20N50B Pb 20A,500V Heatsink N-Channel Type Power MOSFET TO-3PB General Description This N-channel enhancement mode field-effect power transistor using THINKI Semiconductor advanced planar stripe, DMOS technol- ogy intended for off-line switch mode power supply. Also, especially designed to minimize rds(on) and high rugged avalanche characteristics. The TO-3PB pkg is well suited for adaptor power unit and small power inverter application. © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 1/6Rev.05 Absolute Maximum Ratings T C = 25°C unless otherwise noted Thermal Characteristics V DSS Drain-Source Voltage 500 V I D Drain Current - Continuous (T C = 25°C) 20 A - Continuous (T C = 100°C) 12.5 A I DM Drain Current - Pulsed (Note 1) 80 A V GSS Gate-Source Voltage ± 30 V E AS Single Pulsed Avalanche Energy (Note 2) 1050 mJ I AR Avalanche Current (Note 1) 20 A E AR Repetitive Avalanche Energy (Note 1) 23.5 mJ dv/dt Peak Diode Recovery dv/dt (Note 3)

4.5 V/ns

P D Power Dissipation (T C = 25°C) 235 W - Derate above 25°C 1.88 W/°C T J , T STG Operating and Storage Temperature Range -55 to +150 °C T L Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 °C Symbol Parameter Typ Max Units R θJC Thermal Resistance, Junction-to-Case -- 0.53 °C /W R θCS Thermal Resistance, Case-to-Sink 0.24 -- °C /W R θJA Thermal Resistance, Junction-to-Ambient -- 40 °C /W Symbol Parameter Value Units

(Note 4) (Note 4, 5) (Note 4, 5) (Note 4)

Electrical Characteristics

T C = 25°C unless otherwise noted Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 5.1mH, I AS = 20A, V DD = 50V, R G = 25 Ω, Starting T J = 25°C 3. I SD ≤ 20A, di/dt ≤ 200A/µs, V DD ≤ BV DSS, Starting T J = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain-Source Breakdown Voltage V GS = 0 V, I D = 250 µA 500 -- -- V ∆BV DSS / ∆T J Breakdown Voltage Temperature Coefficient I D = 250 µA, Referenced to 25°C -- 0.55 -- V/°C I DSS Zero Gate Voltage Drain Current V DS = 500 V, V GS = 0 V -- -- 10 µA V DS = 400 V, T C I GSSF Gate-Body Leakage Current, Forward V GS = 30 V, V DS = 0 V -- -- 100 nA I GSSR Gate-Body Leakage Current, Reverse V GS = -30 V, V DS On Characteristics V GS(th) Gate Threshold Voltage V DS = V GS , I D = 250 µA 2.0 -- 4.0 V R DS(on) Static Drain-Source On-Resistance V GS = 10 V, I D g FS Forward Transconductance V DS = 50 V, I D Dynamic Characteristics C iss Input Capacitance V DS = 25 V, V GS = 0 V, f = 1.0 MHz -- 4590 6000 pF C oss Output Capacitance -- 380 460 pF C rss Reverse Transfer Capacitance -- 60 80 pF Switching Characteristics t d(on) Turn-On Delay Time V DD = 250 V, I D = 20 A, R G = 25 Ω -- 50 120 ns t r Turn-On Rise Time -- 150 310 ns t d(off) Turn-Off Delay Time -- 380 770 ns t f Turn-Off Fall Time -- 180 370 ns Q g Total Gate Charge V DS = 400 V, I D = 20 A, V GS = 10 V -- 130 170 nC Q gs Gate-Source Charge -- 20 -- nC Q gd Gate-Drain Charge -- 45 -- nC Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current -- -- 20 A I SM Maximum Pulsed Drain-Source Diode Forward Current -- -- 80 A V SD Drain-Source Diode Forward Voltage V GS = 0 V, I S = 20 A -- -- 1.4 V t rr Reverse Recovery Time V GS = 0 V, I S = 20 A, dI F / dt = 100 A/µs -- 480 -- ns Q rr Reverse Recovery Charge -- 7.7 -- µC © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 2/6Rev.05 20N50B

V GS 10V Q g Q gs Q gd 3mA V GS DUT V DS 300nF 50KΩ 200nF12V Same Type as DUT Charge V GS 10V Q g Q gs Q gd 3mA V GS DUT V DS 300nF 50KΩ 200nF12V Same Type as DUT V GS V DS 10% 90% t d(on) t r t on t off t d(off) t f V DD 10V V DS R L DUT R G V GS V GS V DS 10% 90% t d(on) t r t on t off t d(off) t f V DD 10V V DS R L DUT R G V GS E AS =L I AS ----2 BV DSS DD BV DSS V DD V DS BV DSS t p V DD I AS V DS (t) I D (t) Time 10V DUT R G L I D t p E AS =L I AS ----2 AS =L I AS ----2 1----2 BV DSS DD BV DSS V DD V DS BV DSS t p V DD I AS V DS (t) I D (t) Time 10V DUT R G L L I D I D t p Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 5/6Rev.05 20N50B

Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT V DS Driver R G Same Type as DUT V GS

• dv/dt controlled by R G SD controlled by pulse period V DD L I SD 10V V GS ( Driver ) I SD ( DUT ) V DS ( DUT ) V DD Body Diode Forward Voltage Drop V SD I FM , Body Diode Forward Current Body Diode Reverse Current I RM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width DUT V DS Driver R G Same Type as DUT V GS
• dv/dt controlled by R G SD controlled by pulse period V DD L L I SD 10V V GS ( Driver ) I SD ( DUT ) V DS ( DUT ) V DD Body Diode Forward Voltage Drop V SD I FM , Body Diode Forward Current Body Diode Reverse Current I RM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width © 2006 Thinki Semiconductor Co., Ltd. http://www.thinkisemi.com/ Page 6/6Rev.05 20N50B