STFU18N60M2 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 12
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuits
- 4 Package information
- 4.1 TO-220FP ultra narrow leads package information
Features
Order code V DS RDS(on) max ID STFU18N60M2 600 V 0.280 Ω 13 A
- Extremely low gate charge
- Excellent output capacitance (C OSS) profile
- 100% avalanche tested
- Zener-protected
Applications
- Switching applications
- LLC converters, resonant converters
Description
This device is an N-channel Power MOSFET developed using MDmesh M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Product status link STFU18N60M2 Product summary Order code STFU18N60M2 Marking 18N60M2 Package TO-220FP ultra narrow leads Packing Tube N-channel 600 V, 0.255 Ω typ., 13 A MDmesh M2 Power MOSFET in a TO-220FP ultra narrow leads package STFU18N60M2 Datasheet DS10930 - Rev 3 - June 2019 For further information contact your local STMicroelectronics sales office.
1 Electrical ratings
Table 1. Absolute maximum ratings
- Limited by maximum junction temperature.
- Pulse width limited by safe operating area.
Table 2. Thermal data Table 3. Avalanche characteristics
2 Electrical characteristics
(TC = 25 °C unless otherwise specified). Table 4. On /off states
- Defined by design, not subject to production test.
Table 5. Dynamic Figure 14. Test circuit for gate
- C oss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
Table 6. Switching times
Electrical characteristics
Table 7. Source-drain diode Figure 15. Test circuit for
- Pulse width limited by safe operating area.
- Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Gate charge vs gate-source voltage
0 Q g (nC)
Figure 6. Static drain-source on-resistance
Figure 7. Capacitance variations Figure 8. Normalized gate threshold voltage vs. Figure 9. Normalized on-resistance vs temperature Figure 10. Source-drain diode forward characteristics Figure 11. Normalized V(BR)DSS vs temperature Figure 12. Output capacitance stored energy
0 V DS (V)
3 Test circuits
Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior Figure 15. Test circuit for inductive load switching and Figure 16. Unclamped inductive load test circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
4.1 TO-220FP ultra narrow leads package information
Figure 19. TO-220FP ultra narrow leads package outline
Package information
Table 8. TO-220FP ultra narrow leads mechanical data
Revision history
Table 9. Document revision history 12-Mar-2015 1 Initial release. 15-Sep-2015 2 Document status promoted from preliminary to production data.