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DESCRIPTION

The DS18B20 digital thermometer provides 9-bit to 12- bit Celsius temperature measurements and has an alarm function with nonvolatile user - programmable upper and lower trigger points. The DS18B20 communicates over a 1-Wire bus that by definition requires only one data line (and ground) for communication with a central microprocessor. It has an operating temperature range of - 55°C to +125°C and is accurate to ±0.5°C over the range of - 10°C to +85°C . In addition, the DS18B20 can derive power directly from the data line (“parasite power”), eliminating the need for an external power supply. Each DS18B20 has a unique 64- bit serial code, which allows multiple DS18B20s to function on the same 1-Wire bus. Thus, it is simple to use one microprocessor to control many DS18B20s distributed over a large area. Applications that can benefit from this feature include HVAC environmental controls, temperature monitoring systems inside buildings, equipment , or machinery, and pr ocess monitoring and control systems.

FEATURES

 Unique 1-Wire® Interface Requires Only One Port Pin for Communication  Each Device has a Unique 64-Bit Serial Code Stored in an On-Board ROM  Multidrop Capability Simplifies Distributed Temperature-Sensing Applications  Requires No External Components  Can Be Powered from Data Line; Power Supply Range is 3.0V to 5.5V  Measures Temperatures from -55°C to +125°C (-67°F to +257°F)  ±0.5°C Accuracy from -10°C to +85°C  Thermometer Resolution is User Selectable from 9 to 12 Bits  Converts Temperature to 12-Bit Digital Word in 750ms (Max)  User-Definable Nonvolatile (NV) Alarm Settings  Alarm Search Command Identifies and Addresses Devices Whose Temperature is Outside Programmed Limits (Temperature Alarm Condition)  Available in 8-Pin SO (150 mils), 8-Pin µSOP, and 3-Pin TO-92 Packages  Software Compatible with the DS1822  Applications Include Thermostatic Controls, Industrial Systems, Consumer Products, Thermometers, or Any Thermally Sensitive System PIN CONFIGURATIONS DS18B20 Programmable Resolution 1-Wire Digital Thermometer TO-92 (DS18B20) (BOTTOM VIEW) 2 3 MAXIM 18B20

1 GND

SO (150 mils) (DS18B20Z) N.C. N.C. N.C. N.C. GND DQ VDD N.C. MAXIM 18B20 N.C. VDD N.C. N.C. N.C. GND N.C. DQ 18B20 µSOP (DS18B20U) 1-Wire is a registered trademark of Maxim Integrated Products, Inc.

ORDERING INFORMATION

PART TEMP RANGE PIN-PACKAGE TOP MARK DS18B20 -55°C to +125°C 3 TO-92 18B20 DS18B20+ -55°C to +125°C 3 TO-92 18B20 DS18B20/T&R -55°C to +125°C 3 TO-92 (2000 Piece) 18B20 DS18B20+T&R -55°C to +125°C 3 TO-92 (2000 Piece) 18B20 DS18B20-SL/T&R -55°C to +125°C 3 TO-92 (2000 Piece)* 18B20 DS18B20-SL+T&R -55°C to +125°C 3 TO-92 (2000 Piece)* 18B20 DS18B20U -55°C to +125°C 8 µSOP 18B20 DS18B20U+ -55°C to +125°C 8 µSOP 18B20 DS18B20U/T&R -55°C to +125°C 8 µSOP (3000 Piece) 18B20 DS18B20U+T&R -55°C to +125°C 8 µSOP (3000 Piece) 18B20 DS18B20Z -55°C to +125°C 8 SO DS18B20 DS18B20Z+ -55°C to +125°C 8 SO DS18B20 DS18B20Z/T&R -55°C to +125°C 8 SO (2500 Piece) DS18B20 DS18B20Z+T&R -55°C to +125°C 8 SO (2500 Piece) DS18B20 +Denotes a lead-free package. A “+” will appear on the top mark of lead-free packages. T&R = Tape and reel. *TO-92 packages in ta pe and reel can be ordered with straight or formed leads. Choose “SL” for straight leads. Bulk TO-92 orders are straight leads only. PIN DESCRIPTION PIN NAME FUNCTION SO µSOP TO-92 1, 2, 6, 7, 8 2, 3, 5, 6, 7 — N.C. No Connection 3 8 3 VDD Optional VDD. VDD must be grounded for operation in parasite power mode. 4 1 2 DQ Data Input/Output. Open-drain 1-Wire interface pin. Also provides power to the device when used in parasite power mode (see the Powering the DS18B20 section.) 5 4 1 GND Ground OVERVIEW Figure 1 shows a block diagram of the DS18B20, and pin descriptions are given in the Pin Description table. The 64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad provides access to the 1 -byte upper and lower alarm trigger registers (T H and T L) and the 1- byte configuration register. The configuration register allows the user to set the resolution of the temperature- to-digital conversion to 9, 10, 11, or 12 bits. The T H, T L, and configuration registers are nonvolatile (EEPROM), so they will retain data when the device is powered down. The DS18B20 uses Maxim’s exclusive 1-Wire bus protocol that implements bus communication using one control signal. The control line requires a weak pullup res istor since all devices are linked to the bus via a 3-state or open -drain port (the DQ pin in the case of the DS18B20). In this bus system, the microprocessor (the master device) identifies and addresses devices on the bus using each device’s unique 64-bit code. Because each device has a unique code, the number of devices that can be addressed on one

“time slots,” is covered in the 1-Wire Bus System section. alternative, the DS18B20 may also be powered by an external supply on VDD. Figure 1. DS18B20 Block Diagram explained in detail in the Powering the DS18B20 section. DS18B20 is configured for 12- bit resolution, all bits in the temperature register will contain valid data. corresponding temperature reading for 12-bit resolution conversions.

The master device can check the alarm flag status of all DS18B20s on the bus by issuing an Alarm Search [ECh] command. Any DS18B20s with a set alarm flag will respond to the command, so the master can determine exactly which DS18B20s have experienced an alarm condition. If an alarm condition exists and the T H or T L settings have changed, another temperature conversion should be done to validate the alarm condition. POWERING THE DS18B20 The DS18B20 can be powered by an external supply on the VDD pin, or it can operate in “parasite power” mode, which allows the DS18B20 to function without a local external supply. Parasite pow er is very useful for applications that require remote temperature sensing or that are very space constrained. Figure 1 shows the DS18B20’s parasite-power control circuitry, which “steals” power from the 1 -Wire bus via the DQ pin when the bus is high. The stolen charge powers the DS18B20 while the bus is high, and some of the charge is stored on the parasite power capacitor (C PP) to provide power when the bus is low. When the DS18B20 is used in parasite power mode, the VDD pin must be connected to ground. In parasite power mode, the 1 -Wire bus and C PP can provide sufficient current to the DS18B20 for most operations as long as the specified timing and voltage requirements are met ( see the DC Electrical Characteristics and AC Electrical Characteristics ). However, when the DS18B20 is performing temperature conversions or copying data from the scratchpad memory to EEPROM, the operating current can be as high as 1.5mA. This current can cause an unacceptable voltage drop across the weak 1 -Wire pullup resistor and is more current than can be supplied by CPP. To assure that the DS18B20 has sufficient supply current, it is necessary to provide a strong pullup on the 1- Wire bus whenever temp erature conversions are taking place or data is being copied from the scratchpad to EEPROM. This can be accomplished by using a MOSFET to pull the bus directly to the rail as shown in Figure 4. The 1 -Wire bus must be switched to the strong pullup within 10µs (max) after a Convert T [44h] or Copy Scratchpad [48h] command is issued, and the bus must be held high by the pullup for the duration of the conversion CONV) or data transfer (tWR = 10ms). No other activity can take place on the 1 -Wire bus while the pullup is enabled. The DS18B20 can also be powered by the conventional method of connecting an external power supply to the V DD pin, as shown in Figure 5. The advantage of this method is that the MOSFET pullup is not required, and the 1-Wire bus is free to carry other traffic during the temperature conversion time. The use of parasite power is not recommended for temperatures above +100 °C since the DS18B20 may not be able to sustain communications due to the higher leakage currents that can exist at these temperatures. For applications in which such temperatures are likely, it is strongly recommended that the DS18B20 be powered by an external power supply. In some situations the bus master may not know whether the DS18B20s on the bus are parasite powered or powered by external supplies. The master needs this information to determine if the strong bus pullup should be used during temperature conversions. To get this information, the master can issue a Skip ROM [CCh] command followed by a Read Power Supply [ B4h] command followed by a “read time slot”. During the read time slot, parasite powered DS18B20s will pull the bus low, and externally powered DS18B20s will let the bus remain high. If the bus is pulled low, the master knows that it must supply the strong pullup on the 1-Wire bus during temperature conversions.

contains the configuration register data, which is explained in detail in the Configuration Register section. Bytes 5, 6, and 7 are reserved for internal use by the device and cannot be overwritten. Byte 8 of the scratchpad is read -only and contains the CRC code for bytes 0 through 7 of the scratchpad. The DS18B20 generates this CRC using the method described in the CRC Generation section. the master must issue the Copy Scratchpad [48h] command. while the recall is in progress and 1 when the recall is done. Figure 7. DS18B20 Memory Map *Power-up state depends on value(s) stored in EEPROM.

Figure 8. The user can set the conversion resolution of the D S18B20 using the R0 and R1 bits in this register as shown in Table 2. The power-up default of these bits is R0 = 1 and R1 = 1 (12- bit resolution). configuration register are reserved for internal use by the device and cannot be overwritten. Figure 8. Configuration Register

0 R1 R0 1 1 1 1 1

Table 2. Thermometer Resolution Configuration this value to either the ROM code CRC (for ROM reads) or to the scratchpad CRC (for scratchpad reads). CRC values and the decision to continue with an operation are determined entirely by the bus master. DS18B20 CRC (ROM or scratchpad) does not match the value generated by the bus master.

The transaction sequence for accessing the DS18B20 is as follows: Step 1. Initialization Step 2. ROM Command (followed by any required data exchange) Step 3. DS18B20 Function Command (followed by any required data exchange) It is very important to follow this sequence every time the DS18B20 is accessed, as the DS18B20 will not respond if any steps in the sequence are missing or out of order. Exceptions to this rule are th e Search ROM [F0h] and Alarm Search [ECh] commands. After issuing either of these ROM commands, the master must return to Step 1 in the sequence. INITIALIZATION All transactions on the 1 -Wire bus begin with an initialization sequence. The initializatio n sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that slave devices (such as the DS18B20) are on the bus and are ready to operate. Timi ng for the reset and presence pulses is detailed in the 1- Wire Signaling section. ROM COMMANDS After the bus master has detected a presence pulse, it can issue a ROM command. These commands operate on the unique 64-bit ROM codes of each slave device and allow the master to single out a specific device if many are present on the 1 -Wire bus. These commands also allow the master to determine how many and what types of devices are present on the bus or if any device has experienced an alarm condition. There are five ROM commands, and each command is 8 bits long. The master device must issue an appropriate ROM command before issuing a DS18B20 function command. A flowchart for operation of the ROM commands is shown in Figure 11. SEARCH ROM [F0h] When a system is initially powered up, the master must identify the ROM codes of all slave devices on the bus, which allows the master to determine the number of slaves and their device types. The master learns the ROM codes through a process of elimination that requires the master to perform a Search ROM cycle (i.e., Search ROM command followed by data exchange) as many times as necessary to identify all of the slave devices. If there is only one slave on the bus, the simpler Read ROM command (see below) can be used in place of the Search ROM process. For a detailed explanation of the Search ROM procedure, refer to the i Button® Book of Standards at www.maxim-ic.com/ibuttonbook. After every Search ROM cycle, the bus master must return to Step 1 (Initialization) in the transaction sequence. READ ROM [33h] This command can only be used when there is one slave on the bus. It allows the bus master to read the slave’s 64-bit ROM code without using the Search ROM procedure. If this command is used when there is more than one slave present on the bus, a data collision will occur when all the slaves attempt to respond at the same time. MATCH ROM [55h] The match ROM command followed by a 64 -bit ROM code sequence allows the bus master to address a specific slave device on a multidrop or single -drop bus. Only the slave that exactly matches the 64 -bit ROM code sequence will respond to the function command issued by the master; all other slaves on the bus will wait for a reset pulse. iButton is a registered trademark of Maxim Integrated Products, Inc.

SKIP ROM [CCh] The master can use this command to address all devices on the bus simultaneously without sending out any ROM code information. For example, the master can make a ll DS18B20s on the bus perform simultaneous temperature conversions by issuing a Skip ROM command followed by a Convert T [44h] command. Note that the Read Scratchpad [BEh] command can follow the Skip ROM command only if there is a single slave device on the bus. In this case , time is saved by allowing the master to read from the slave without sending the device’s 64-bit ROM code. A Skip ROM command followed by a Read Scratchpad command will cause a data collision on the bus if there is more than one slave since multiple devices will attempt to transmit data simultaneously. ALARM SEARCH [ECh] The operation of this command is identical to the operation of the Search ROM command except that only slaves with a set alarm flag will respond. This command allow s the master device to determine if any DS18B20s experienced an alarm condition during the most recent temperature conversion. After every Alarm Search cycle (i.e., Alarm Search command followed by data exchange), the bus master must return to Step 1 (Init ialization) in the transaction sequence. See the Operation— Alarm Signaling section for an explanation of alarm flag operation. DS18B20 FUNCTION COMMANDS After the bus master has used a ROM command to address the DS18B20 with which it wishes to communicate, the master can issue one of the DS18B20 function commands. These commands allow the master to write to and read from the DS18B20’s scratchpad memory, initiate temperature conversions and determine the power supply mode. The DS18B20 function c ommands, which are described below, are summarized in Table 3 and illustrated by the flowchart in Figure 12. CONVERT T [44h] This command initiates a single temperature conversion. Following the conversion, the resulting thermal data is stored in the 2-byte temperature register in the scratchpad memory and the DS18B20 returns to its low-power idle state. If the device is being used in parasite power mode, within 10µ s (max) after this command is issued the master must enable a strong pullup on the 1- Wire bus for the duration of the conversion (tCONV) as described in the Powering the DS18B20 section. If the DS18B20 is powered by an external supply, the master can issue read time slots after the Convert T command and the DS18B20 will respond by transmitting a 0 while the temperature conversion is in progress and a 1 when the conversion is done. In parasite power mode this notification technique cannot be used since the bus is pulled high by the strong pullup during the conversion. WRITE SCRATCHPAD [4Eh] This command allows the master to write 3 bytes of data to the DS18B20’s scratchpad. The first data byte is written into the T H register (byte 2 of the scratchpad), the second byte is written i nto the T L register (byte 3), and the third byte is written into the configuration register (byte 4). Data must be transmitted least significant bit first. All three bytes MUST be written before the master issues a reset, or the data may be corrupted. READ SCRATCHPAD [BEh] This command allows the master to read the contents of the scratchpad. The data transfer starts with the least significant bit of byte 0 and continues through the scratchpad until the 9 th byte (byte 8 – CRC) is read. The master may issu e a reset to terminate reading at any time if only part of the scratchpad data is needed.

Powering the DS18B20 section. section for usage information for this command. Table 3. DS18B20 Function Command Set conversions and copies from the scratchpad to EEPROM. No other bus activity may take place during this time. Note 2: The master can interrupt the transmission of data at any time by issuing a reset. Note 3: All three bytes must be written before a reset is issued.

Figure 11. ROM Commands Flowchart

1 BYTE

6 BYTES

Figure 12. DS18B20 Function Commands Flowchart

master initiates all these signals, with the exception of the presence pulse. the bus and ready to operate. low for a minimum of 480 µs. The bus master then releases the bus and goes into receive mode (R X). Figure 13. Initialization Timing during read time slots. One bit of data is transmitted over the 1-Wire bus per time slot. 1-Wire bus low (see Figure 14). the duration of the time slot (at least 60µs).

initiates the write time slot. If the bus is high during the sampling window, a 1 is written to the DS18B20. If the line is low, a 0 is written to the DS18B20. Figure 14. Read/Write Time Slot Timing Diagram of the operation as explained in the DS18B20 Function Commands section.

DS18B20 OPERATION EXAMPLE 1 In this example there are multiple DS18B20s on the bus and they are using paras ite power. The bus master initiates a temperature conversion in a specific DS18B20 and then reads its scratchpad and recalculates the CRC to verify the data. MASTER MODE DATA (LSB FIRST) COMMENTS Tx Reset Master issues reset pulse. Rx Presence DS18B20s respond with presence pulse. Tx 55h Master issues Match ROM command. Tx 64-bit ROM code Master sends DS18B20 ROM code. Tx 44h Master issues Convert T command. Tx DQ line held high by strong pullup Master applies strong pullup to DQ for the duration of the conversion (tCONV). Tx Reset Master issues reset pulse. Rx Presence DS18B20s respond with presence pulse. Tx 55h Master issues Match ROM command. Tx 64-bit ROM code Master sends DS18B20 ROM code. Tx BEh Master issues Read Scratchpad command. Rx 9 data bytes Master reads entire scratchpad including CRC. The master then recalculates the CRC of the first eight data bytes from the scratchpad and compares the calculated CRC with the read CRC (byte 9). If they match, the master continues; if not, the read operation is repeated. DS18B20 OPERATION EXAMPLE 2 In this example there is only one DS18B20 on the bus and it is using parasite power. The master writes to the T H, T L, and configuration registers in the DS18B20 scratchpad and then reads the scratchpad and recalculates the CRC to verify the data. The master then copies the scratchpad contents to EEPROM. MASTER MODE DATA (LSB FIRST) COMMENTS Tx Reset Master issues reset pulse. Rx Presence DS18B20 responds with presence pulse. Tx CCh Master issues Skip ROM command. Tx 4Eh Master issues Write Scratchpad command. Tx 3 data bytes Master sends three data bytes to scratchpad (TH, TL, and config). Tx Reset Master issues reset pulse. Rx Presence DS18B20 responds with presence pulse. Tx CCh Master issues Skip ROM command. Tx BEh Master issues Read Scratchpad command. Rx 9 data bytes Master reads entire scratchpad including CRC. The master then recalculates the CRC of the first eight data bytes from the scratchpad and compares the calculated CRC with the read CRC (byte 9). If they match, the master continues; if not, the read operation is repeated. Tx Reset Master issues reset pulse. Rx Presence DS18B20 responds with presence pulse. Tx CCh Master issues Skip ROM command. Tx 48h Master issues Copy Scratchpad command. Tx DQ line held high by strong pullup Master applies strong pullup to DQ for at least 10ms while copy operation is in progress.

These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. DC ELECTRICAL CHARACTERISTICS (-55°C to +125°C; VDD=3.0V to 5.5V) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Supply Voltage VDD Local Power +3.0 +5.5 V 1 Pullup Supply Voltage VPU Parasite Power +3.0 +5.5 V 1,2 Local Power +3.0 VDD Thermometer Error tERR -10°C to +85°C ±0.5 °C 3 -55°C to +125°C ±2 Input Logic-Low VIL -0.3 +0.8 V 1,4,5 Input Logic-High VIH Local Power +2.2 The lower of 5.5 or VDD + 0.3 V 1, 6 Parasite Power +3.0 Sink Current IL VI/O = 0.4V 4.0 mA 1 Standby Current IDDS 750 1000 nA 7,8 Active Current IDD VDD = 5V 1 1.5 mA 9 DQ Input Current IDQ 5 µA 10 Drift ±0.2 °C 11 NOTES: 1) All voltages are referenced to ground. 2) The Pullup Supply Voltage specification assumes that the pullup device is ideal, and therefore the high level of the pullup is equal to V PU. In order to meet the VIH spec of the DS18B20, the actual supply rail for the strong pullup transistor must include margin for the voltage drop across the transistor when it is turned on; thus: V PU_ACTUAL = VPU_IDEAL + VTRANSISTOR. 3) See typical performance curve in Figure 17. 4) Logic-low voltages are specified at a sink current of 4mA. 5) To guarantee a presence pulse under low voltage parasite power conditions, VILMAX may have to be reduced to as low as 0.5V. 6) Logic-high voltages are specified at a source current of 1mA. 7) Standby current specified up to +70°C. Standby current typically is 3µA at +125°C. 8) To minimize IDDS, DQ should be within the following ranges: GND ≤ DQ ≤ GND + 0.3V or VDD – 0.3V ≤ DQ ≤ VDD. 9) Active current refers to supply current during active temperature conversions or EEPROM writes. 10) DQ line is high (“high-Z” state). 11) Drift data is based on a 1000-hour stress test at +125°C with VDD = 5.5V.

1) See the timing diagrams in Figure 18. 2) Under parasite power, if tRSTL > 960µs, a power-on reset may occur. Figure 17. Typical Performance Curve

Figure 18. Timing Diagrams

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at an y time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408 - 737- 7600 © 2008 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

REVISION HISTORY

In the Absolute Maximum Ratings section, removed the reflow oven temperature value of +220°C. Reference to JEDEC specification for reflow remains. 101207 In the Operation— Alarm Signaling section, added “or equal to” in the desciption for a TH alarm condition 5 In the Memory section, removed incorrect text describing memory. 7 In the Configuration Register section, removed incorrect text describing configuration register. 8 042208 In the Ordering Information table, added TO-92 straight-lead packages and included a note that the TO-92 package in tape and reel can be ordered with either formed or straight leads.