188J | DigiCamel IC Datasheet

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3 Semiconductor

& | (32 x 8) 256-Bit TTL PROM General Description Features This Schottky memory is organized in the popular 32 words + ™ Advanced titanium-tungsten (Ti-W) fuses by 8 bits configuration. A memory enable input is provided ™ Schottky-clamped for high speed to control the output states. When the device is enabled, the Address access down to—25 ns max outputs represent the contents of the selected word. When Enable access—20 ns max disabled, the 8 outputs go to the “OFF” or high impedance Enable recovery—20 ns max state. @ PNP inputs for reduced input loading PROMs are shipped from the factory with lows in all loca- | ™ All OC and AC parameters guaranteed over tions. A high may be programmed into any selected location temperature by following the programming instructions. ®@ Low voltage TRI-SAFE™ programming = Open-collector outputs Block Diagram “ Pin Names M wenn warm | G | Outputenable co | eno [Ground | : | co-a7 | outputs. | ENABLE SurER gy) gg OSH to) Twp/9187-1 3-10

i=] Connection Diagrams 3 Dual-In-Line Package Plastic Leaded Chip Carrier (PLCC) 8 Uy, s2e28 g wot 16}-Veg 582 Sw = a2 15-6 32 1 2019 Q Q2—43 14 BRA Q2—44 18 A4 3 B44 13 RAS Qs—45 17 A3 Q4ags 12F-A2 NC—16 16 FNC a6 11PRal 4-17 15 A2 6-47 10 Fao os 14 Al cna 9f-a7 910 11:12:13 Tuo/ete7-2 SZ2582 Top View Tuo/9187-3 Order Number DM54/74S188J, 188AJ, Top View DM74S188N or 188AN Order Number DM74S188V or 188AV See NS Package Number J16A or N16A See NS Package Number V20A

Ordering Information

o @ | Absolute Maximun Ratings (note 1) Operating Conditions x If Military/Aerospace specified devices are required, Min Max Units | Please contact the National Semiconductor Sales ‘Supply Voltage (Voc) 2 Office/Distributors for availability and specifications. Military 4.50 5.50 v Q | Supply Voltage (Note 2) —0.5V to +7.0V Commercial 4.75 5.25 Vv 2 Input Voltage (Note 2) ~1.2V to +5.5V Ambient Temperature (Ta) a Output Voltage (Note 2) —0.5V to +5.5V Military —55 +125 °C Storage Temperature 65°C to + 150°C Commercial o +70 °C Lead Temp. (Soldering, 10 seconds) 300°C Logical “0” Input Voltage iY 0.8 Vv ESD to be determined Logical “1” Input Voltage = 2.00 5.5 v srt | renme | conto ise bao aro in Input Load Current Voc=MaxVin=o45sv | | -e0 | -250| | 20 | -250[ pa tn InputLeakage Curent | Voc=Maxvin=27v | [| 2s | | [as | pa Veo=Maxvw=ssv | | [xo | [| +0 | ma Vou Low Level Output Voltage | Voc = Min, lo. = 16 mA [ [oss | 050 | | 095 | o45 | v VisiNote 4) | HighLevelinputvottage | sf oT [feof Tv loz OutputLeakage Current | Voo=MaxVoex-24v | | | 50 | | | 50 | na Ve InputClamp Voltage | Voc=Minin= -18ma_ [| -oa| -12[ | -oe| -12 |v C Input Capacitance Voc = 5.0V, Vin = 2.0V 40 F Ta = 25°C, 1 MHz ‘ p Co Output Capacitance Voc = 5.0V, Vo = 2.0V f Ta = 25°C, 1 MHz, Outputs Off e loc Power Supply Current Voc = Max, Input Grounded All Outputs Open 70 70 110 mA Note 1: Absolute Maximum Ratings are those values beyond which the device may be permanently damaged. They do not mean that the device may be operated at these values. Note 2: These limits do not apply during programming. For the programming ratings, refer to the programming instructions. Note 3: These limits apply over the entire operating range unless stated otherwise. All typical values are for Voc = 5.0V and Ta = 25°C. Note 4: These are absolute voltages with respec to pin @ on the device and include all overshoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. COMMERCIAL TEMP RANGE (0°C to + 70°C) pw74stee [owrasieea Symbol Units [ace | nme ee Taa__| tavav | Address Accesstime | | 22 | a5 [| i | 2 | ns tea | tevav | Enadierccesstime [| | is _| 20 | | is | 2 | ns Ter | texax | Enadlerecoverytine | | 1s | as [| is [2 [ns tex | tevax | ouputénabiotime | | ts | 20 Ts ao ns txz_ | texoz | oupurdisaviotime [| is [os | Ts [20 | os 312

i=] MILITARY TEMP RANGE (—55°C to + 125°C) s JEDEC pusastes | owsasiena | = Symbol Parameter units | 3 Simba Tn [ve [a [ie [ye [we | | taa | tavav | Address accesstime | | 22 | a | | w [a5 | ns |e ao tea | tevav | Enabloaccesstime | | 15 | a0 | | 1s | 30 | ns ten | texax | EnabloRecoverytime | | is | a5 | | 1s | 90 | ns rz__| texaz | oupwrisebotme [| 1s [ as | | as [a0 [ns Functional Description TESTABILITY TITANIUM-TUNGSTEN FUSES The Schottky PROM die includes extra rows and columns of _National’s Programmable Read-Only Memories (PROMs) fusable links for testing the programmability of each chip. _feature titanium-tungsten (Ti-W) fuse links designed to pro- These test fuses are placed at the worst-case chip locations —_gram efficiently with only 10.5V applied. The high perform- to provide the highest possible confidence in the program- —_ance and reliability of these PROMS are the result of fabrica- ming tests in the final product. A ROM pattern is also per- tion by a Schottky bipolar process, of which the titanium. manently fixed in the additional circuitry and coded to pro- tungsten metallization is an integral part, and the use of an vide a parity check of input address levels. These and other _ on-chip programming circuit. test circuits are used to test for correct operation of the row A major advantage of the titanium-tungsten fuse technology and column-select circuits and functionality of input and en- is the low programming voltage of the fuse links. At 10.5V, able gates. All test circuits are available at both wafer and this virtually eliminates the need for guard-ring devices and assembled device levels to allow 100% functional and para- wide spacings required for other fuse technologies. Care is metric testing at every stage of the test flow. taken, however, to minimize voltage drops across the die RELIABILITY and to reduce parasitics. The device is designed to ensure As with all National products, the Ti-W PROMs are subject- tat worst-case fuse operating current is low enough for ed to an on-going reliability evaluation by the Reliability As "ellable long-term operation. The Darlington programming Cea Thee ceclastene er ay Mt citeuitis liberally designed to insure adequate power density surance Department. These evaluations employ tat- for blowing the fuse links. The complete circuit design is ed life tests, including dynamic high-temperature operating a . . a an 4 optimized to provide high performance over the entire oper- life, temperature-humidity life, temperature cycling, and ther- ating ranges of Voc and temperature. mal shock. To date, nearly 7.4 million Schottky Ti-W PROM 1g rang ce perature. device hours have been logged, with samples in Epoxy B molded DIP (N-package), PLCC (V-package) and CERDIP (J-package). Device performance in all package configura- tions is excellent. 3413

Product Information

188J specifications and overview.

Summary

(32 X 8) 256-BIT TTL PROM

Description

(32 X 8) 256-BIT TTL PROM

Source title 188J Datasheet(PDF) - National Semiconductor (TI)

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