145406

TL145406 TI | Alldatasheet

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TRIPLE RS-232 DRIVERS/RECEIVERS SLLS185A – DECEMBER 1994 – REVISED MARCH 1995 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Meets or Exceeds the Requirements of ANSI EIA/TIA-232-E and ITU V.28 /C0068Designed to Support Data Rates Up to 120 kbits/s Over 3-m Cable /C0068ESD Protection Exceeds 5 kV on All Pins /C0068Flow-Through Design /C0068Wide-Driver Supply Voltage... ±4.5 V to ±15 V /C0068Functionally Interchangeable With Motorola MC145406 and Texas Instruments SN75C1406

description

The TL145406 is a bipolar device containing three independent drivers and receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). The drivers and receivers of the TL145406 are similar to those of the SN75188 quadruple driver and SN75189A quadruple receiver, respectively. The pinout matches the flow-through design of the SN75C1406 to reduce the board space required and allow easy interconnection. The bipolar circuits and processing of the TL145406 provide a rugged low-cost solution for this function at the expense of quiescent power and external passive components relative to the SN75C1406. The TL145406 complies with the requirements of the EIA/TIA 232-E and ITU (formerly CCITT) V.28 standards. These standards are for data interchange between a host computer and peripheral at signalling rates up to 20 kbit/s. The switching speeds of the TL145406 are fast enough to support rates up to 120 kbit/s with lower capacitive loads (shorter cables). Interoperability at the higher signalling rates cannot be assured unless the designer has design control of the cable and the interface circuits at both ends. For interoperability at signalling rates to 120 kbit/s, use of EIA/TIA-423-B (ITU V.10) and EIA/TIA-422-B (ITU V.11) standards are recommended. The TL145406 is characterized for operation from 0°C to 70°C. logic symbol† † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1RY15 2RY13 3RY11 1DA14 2DA12 3DA10 1RA 2 2RA 4 3RA 6 1DY 3 2DY 5 3DY 7 logic diagram (positive logic) DY RA 3, 5, 7 2, 4, 6 DA RY15, 13, 11 14, 12, 10 Typical of each receiver Typical of each driver Copyright  1995, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VDD 1RA 1DY 2RA 2DY 3RA 3DY V SS VCC 1RY 1DA 2RY 2DA 3RY 3DA GND DW OR N PACKAGE (TOP VIEW)

TRIPLE RS-232 DRIVERS/RECEIVERS SLLS185A – DECEMBER 1994 – REVISED MARCH 1995

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schematic (each driver) DYx Output320 Ω 68.5 Ω3.3 kΩ10.4 kΩ To Other Drivers VSS To Other Drivers GND 4.2 kΩ Input DAx VDD 75.8 Ω 9.4 kΩ11.6 kΩ To Other Drivers Resistor values shown are nominal. ESD ESD ESD ESD schematic (each receiver) Input RAx 10 kΩ 3.8 kΩ 9 kΩ 5 kΩ 1.66 kΩ GND RYx Output VCC ESD To Other Receivers Resistor values shown are nominal. 2 kΩ ESD To Other Receivers ESD

TRIPLE RS-232 DRIVERS/RECEIVERS SLLS185A – DECEMBER 1994 – REVISED MARCH 1995 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to the network ground terminal. DISSIPATION RATING TABLE ‡ PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA ≤ 70°C POWER RATING DW 1256 mW 9.7 mW/°C 819 mW N 1943 mW 14.9 mW/°C 1272 mW ‡ Dissipation ratings are the inverse of the traditional junction-to-case thermal resistance (RθJA). recommended operating conditions MIN NOM MAX UNIT Supply voltage, VDD 7.5 9 15 V Supply voltage, VSS –7.5 –9 –15 V Supply voltage, VCC 4.5 5 5.5 V High-level input voltage, VIH (driver only) 1.9 V Low-level input voltage, VIL (driver only) 0.8 V High level output current IOH Driver –6 mAHigh-level output current, IOH Receiver –0.5 mA Low level output current IOL Driver 6 mALow-level output current, IOL Receiver 16 mA Operating free-air temperature, TA 0 70 °C

TRIPLE RS-232 DRIVERS/RECEIVERS SLLS185A – DECEMBER 1994 – REVISED MARCH 1995

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PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDD = 9 V, V SS = –9 V 15 All inputs at 1.9 V, No loadVDD = 12 V, V SS = –12 V 19 mA IDD Supply current from VDD VDD = 15 V, V SS = –15 V 25 IDD Supply current from VDD VDD = 9 V, V SS = –9 V 4.5 All inputs at 0.8 V, No loadVDD = 12 V, V SS = –12 V 5.5 mA VDD = 15 V, V SS = –15 V 9 VDD = 9 V, V SS = –9 V –15 All inputs at 1.9 V, No loadVDD = 12 V, V SS = –12 V –19 mA ISS Supply current from VSS VDD = 15 V, V SS = –15 V –25 ISS Supply current from VSS VDD = 9 V, V SS = –9 V –3.2 All inputs at 0.8 V, No loadVDD = 12 V, V SS = –12 V –3.2 mA VDD = 15 V, V SS = –15 V –3.2 ICC Supply current from VCC All inputs at 5 V, No load, VCC = 5 V 13.2 20 mA DRIVER SECTION electrical characteristics over recommended operating free-air temperture range, VDD = 9 V, VSS = –9 V, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage VIL = 0.8 V, RL = 3 kΩ , See Figure 1 6 7.5 V VOL Low-level output voltage (see Note 2)VIH = 1.9 V, RL = 3 kΩ, See Figure 1 –7.5 –6 V IIH High-level input current VI = 5 V, See Figure 2 10 µA IIL Low-level input current VI = 0, See Figure 2 –1.6 mA IOS(H) High-level short-circuit output current (see Note 3) VIL = 0.8 V, VO = 0 or VSS , See Figure 1 –4.5 –10 –19.5 mA IOS(L) Low-level short-circuit output currentVIH = 2 V, V O = 0 or VDD , See Figure 1 4.5 10 19.5 mA rO Output resistance (see Note 4) VCC = VDD = VSS = 0, V O = –2 V to 2 V 300 Ω NOTES: 2. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic levels only (e.g., if –10 V is maximum, the typical value is a more negative voltage). 3. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings. 4. Test conditions are those specified by EIA/TIA-232-E and as listed above. switching characteristics, VCC = 5 V, VDD = 12 V, VSS = –12 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level outputR L = 3 kΩ to 7 kΩ ,C L = 15 pF, 315 500 ns tPHL Propagation delay time, high- to low-level output L , L , See Figure 3 75 175 ns tTLH Transition time low to high level output R L = 3 kΩ to 7 kΩ ,C L = 15 pF, See Figure 3 60 100 ns tTLH Transition time, low- to high-level output R L = 3 kΩ to 7 kΩ, C L = 2500 pF, See Figure 3 and Note 5 1.7 2.5 µs tTHL Transition time high to low level output R L = 3 kΩ to 7 kΩ ,C L = 15 pF, See Figure 3 40 75 ns tTHL Transition time, high- to low-level output R L = 3 kΩ to 7 kΩ, C L = 2500 pF, See Figure 3 and Note 6 1.5 2.5 µs NOTES: 5. Measured between –3 V and 3 V points of the output waveform (EIA/TIA-232-E conditions). All unused inputs are tied. 6. Measured between 3 V and –3 V points of the output waveform (EIA/TIA-232-E conditions). All unused inputs are tied.

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NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω , tr = tf < 50 ns. B. CL includes probe and jig capacitance. Figure 3. Driver Test Circuit and Voltage Waveforms Figure 4. Receiver Test Circuit Figure 5. Receiver Test Circuit NOTES: A. The pulse generator has the following characteristics: tw = 25µs, PRR = 20 kHz, ZO = 50 Ω , tr = tf < 50 ns. B. CL includes probe and jig capacitance. Figure 6. Receiver Propagation and Transition Times

TRIPLE RS-232 DRIVERS/RECEIVERS SLLS185A – DECEMBER 1994 – REVISED MARCH 1995

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TA – Free-Air Temperature – °C Input Threshold Voltage – V INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 2.2 1.8 1.6 1.4 1.2 0.8 0.6 0.4 2.4 VIT – VIT + 706050403020100 RECEIVER Figure 12 Input Threshold Voltage – V INPUT THRESHOLD VOLTAGE vs SUPPLY VOLTAGE ÎÎÎ ÎÎÎ VIT– ÎÎ VIT+1.8 1.6 1.4 1.2 0.8 0.6 0.4 0.2 9876543 VCC – Supply Voltage – V RECEIVER Figure 13 Amplitude – V NOISE REJECTION ÎÎÎÎ ÎÎÎÎ C C = 300 pF ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VCC = 5 V TA = 25°C See Note A tw – Pulse Duration – ns 10000 40 100 400 1000 4000 ÁÁÁÁÎÎÎÎÎ ÎÎÎÎÎ C C = 500 pF ÁÁÁÁ C C = 12 pF ÁÁÁÁ ÁÁÁÁ ÎÎÎÎÎ C C = 100 pF NOTE A:This figure shows the maximum amplitude of a positive-going pulse that, starting from 0, does not cause a change of the output level. RECEIVER Figure 14 VCC– – Supply Voltage – V MAXIMUM SUPPLY VOLTAGE vs FREE-AIR TEMPERATURE R L ≥ 3 kΩ (from each output to GND) 70605040302010 TA – Free-Air Temperature – °C CCV RECEIVER

TRIPLE RS-232 DRIVERS/RECEIVERS SLLS185A – DECEMBER 1994 – REVISED MARCH 1995 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

Diodes placed in series with the VDD and VSS leads protect the TL145406 during the fault condition in which the device outputs are shorted to ± 15 V and the power supplies are at low. Diodes also provide low-impedance paths to ground (see Figure 15). VDD VSS ± 15 V Output VDD VSS TL145406 TL145406 Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of ANSI EIA/TIA-232-E

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