145406

MC145406 PHILIPS | Alldatasheet

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Philips Semiconductors Linear Products Product specification MC145406EIA-232-D/V.28 driver/receiver 467August 31, 1994 853-1430 13721

DESCRIPTION

The MC145406 is a silicon-gate CMOS IC that combines 3 drivers and 3 receivers to fulfill the electrical specifications of standards EIA-232-D and CCITT V.28. The drivers feature true TTL input compatibility, slew-rate limited output, 300Ω power-off source impedance, and output typically switching to within 25% of the supply rails. The receivers can handle up to +25V while presenting 3 to 7kΩ impedance. Hysteresis in the receiver aids reception of noisy signals. By combining both drivers and receivers in a single CMOS chip, the MC145406 provides efficient, low-power solutions for EIA-232-D and V.28 applications.

APPLICATIONS

• Modem interface
• Voice/data telephone interface
• Lap-top computers
• UART interface

FEATURES

• Drivers
• +5 to +12V supply range
• 300Ω power-off source impedance
• Output current limiting
• TTL compatible PIN CONFIGURATION VDD RX 1 VCC DO1 DI1 DO2 DI2 DO3 GND D and N Packages 8 9 TX 1 VSS RX 2 TX 2 RX 3 TX 3 DI3 NOTE: D = Driver R = Receiver R D R D R D
• Maximum slew rate = 30V/µs
• Receivers
• +25V input voltage range over the full supply range
• 3 to 7kΩ input impedance
• Hysteresis on input switchpoint
• General
• Very low supply currents for long battery life
• Operation is independent of power supply sequencing

ORDERING INFORMATION

DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # 16-Pin Plastic Dual In-Line (DIP) Package 0 to +70°C MC145406N 0406C 16-Pin Small Outline Large (SOL) Package 0 to +70°C MC145406D 0171B ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNITS VCC Supply voltage -0.5 to +6.0 V VDD Supply voltage -0.5 to +13.5 V VSS Supply voltage +0.5 to -13.5 V VIR Input voltage range RX 1-3 inputs DI1-3 inputs (VSS - 15) to (VDD + 15) -0.5 to (VCC + 0.5) V DC current per pin +100 mA PD Power dissipation (package) 1.0 W TA Operating temperature range 0 to +70 °C TSTG Storage temperature range -65 to +150 °C θJA Thermal impedance N package D package 105 °C/W NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO < VCC . Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD . Unused inputs must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX).

Philips Semiconductors Linear Products Product specification MC145406EIA-232-D/V.28 driver/receiver August 31, 1994 468 BLOCK DIAGRAM RECEIVER DO DI 1.4V LEVEL SHIFT DRIVER HYSTERESIS 300 15k 5.4k RX TX VCC VSS VCC VDD VSS VCC 1.0V 1.8V PIN # SYMBOL PIN DESCRIPTION 1 VDD Positive power supply. The most positive power supply pin, which is typically 5 to 12 volts. 8 VSS Negative power supply. The most negative power supply pin, which is typically -5 to -12 volts. 16 VCC Digital power supply. The digital supply pin, which is connected to the logic power supply (maximum +5.5V). 9 GND Ground. Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7) as well as to the logic power supply ground. 2, 4, 6 RX 1, RX2, RX3 Receive Data Input. These are the EIA-232-D receive signal inputs whose voltages can range from +25 to -25V. A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing to ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to VCC . The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis for noise rejection. The nominal input impedance is 5kΩ . An open or grounded input pin is interpreted as a mark, forcing the DO pin to VCC . 11, 13, 15 DO1, DO2, DO3 Data Output. These are the receiver digital output pins, which swing from VCC to GND. A space on the RX pin causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one LSTTL input load. 10, 12, 14 DI1, DI2, DI3 Data Input. These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well. Input voltage levels on these pins must be between VCC and GND. 3, 5, 7 TX1, TX2, TX3 Transmit Data Output. These are the EIA-232-D transmit signal output pins, which swing toward VDD and VSS . A logic one at a DI input causes the corresponding TX output to swing toward VSS . A logic zero causes the output to swing toward VDD (the output voltages will be slightly less than VDD or VSS depending upon the output load). Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (VDD = VSS = VCC = GND), the minimum output impedance is 300Ω .

Philips Semiconductors Linear Products Product specification MC145406EIA-232-D/V.28 driver/receiver August 31, 1994 469 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNITS VCC Supply voltage -0.5 to +6.0 V VDD Supply voltage -0.5 to +13.5 V VSS Supply voltage +0.5 to -13.5 V VIR Input voltage range RX 1-3 inputs DI1-3 inputs (VSS - 15) to (VDD + 15) -0.5 to (VCC + 0.5) V DC current per pin +100 mA PD Power dissipation (package) 1.0 W TA Operating temperature range 0 to +70 °C TSTG Storage temperature range -65 to +150 °C θJA Thermal impedance N package D package 105 °C/W NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO < VCC . Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD . Unused inputs must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX). DC ELECTRICAL CHARACTERISTICS Typical values are at TA = 0 to 70°C; GND = 0V, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS LIMITS UNITSSYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS DC supply voltage VDD 4.5 5 to 12 13.2 V VSS -4.5 -5 to -12 -13.2 V VCC 4.5 5.0 5.5 V Quiescent supply current (outputs unloaded, inputs low) IDD VDD = +12V 20 400 µA ISS VSS = -12V 280 600 µA ICC VCC = +5V 260 450 µA RECEIVER ELECTRICAL CHARACTERISTICS Typical values are at TA = 0 to 70°C; GND = 0V; VDD = +5 to +12V; VSS = -5 to -12V; VCC = +5V +5%, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS LIMITS UNITSSYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS VON Input turn-on threshold RX 1-3 VDO1-3 = VOL , VCC = 5.0V +5% 1.35 1.80 2.35 V VOFF Input turn-off threshold RX1-3 VDO1-3 = VOH , VCC = 5.0V +5% 0.75 1.00 1.25 V VON -VOFF Input threshold hysteresis RX1-3 VCC = 5.0V +5% 0.6 0.8 V R IN Input resistance RX 1-3 (VSS -15V) < VRX1-3 < (VDD +15V) 3.0 5.0 7.0 kΩ VOH High level output voltage DO1-3 IOH = -20µA, VCC = +5.0V 4.9 5.0 V VRX1-3 = -3V to (VSS -15V)1 IOH = -1mA, VCC = +5.0V 3.8 4.4 V VOL Low level output voltage DO1-3 VRX1-3 = +3V to (VDD +15V)1 IOL = +20µA, VCC = +5.0V 0.005 0.1 VVOL Low level output voltage DO1-3 VRX1-3 = +3V to (VDD +15V)1 IOL = +2mA, VCC = +5.0V 0.15 0.5 VVRX1-3 = +3V to (VDD +15V)1 IOL = +4mA, VCC = +5.0V 0.3 0.7 NOTE: 1. This is the range of input voltages as specified by EIA-232-D to cause a receiver to be in the high or low logic state.

Philips Semiconductors Linear Products Product specification MC145406EIA-232-D/V.28 driver/receiver August 31, 1994 470 DRIVER ELECTRICAL CHARACTERISTICS Typical values are at TA = 0 to 70°C; GND = 0V; VCC = +5V +5%, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS LIMITS UNITSSYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS VIL Digital input voltage DI 1-3 Logic 0 0.8 V VIH Digital input voltage DI 1-3 Logic 1 2.0 V IIN Input current DI 1-3 VDI1-3 = VCC +1.0 µA VOH Output high voltage TX 1-3 VDI1-3 = Logic 0, RL = 3.0kΩ VDD = +5.0V, VSS = -5.0V 3.5 4.1 VVOH Output high voltage TX 1-3 VOL Output low voltage1 TX 1-3 VDI1-3 = Logic 0, RL = 3.0kΩ VVOL Output low voltage1 TX 1-3 Off source resistance TX 1-3 Figure 1 VDD =VSS =GND=0V, V TX1-3 = +2.0V 300 Ω ISC Output short-circuit current TX1-3 TX 1-3 shorted to GND2 +22 +60 mA VDD = +12.0V, VSS = -12.0V TX 1-3 shorted to +15.0V3 +60 +100 mA NOTE: 1. The voltage specifications are in terms of absolute values. 2. Specification is for one TX output pin to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dis- sipation limits will be exceeded. 3. This condition could exceed package limitations. SWITCHING CHARACTERISTICS Typical values are at TA = 0 to 70°C; VCC = +5V +5%, unless otherwise specified. (See Figures 2 and 3) SYMBOL PARAMETER TEST CONDITIONS LIMITS UNITSSYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Drivers tPLH Propagation delay time TX 1-3 Low-to-High RL = 3kΩ , CL = 50pF 300 500 ns tPHL Propagation delay time TX 1-3 High-to-Low RL = 3kΩ , CL = 50pF 300 500 ns SR Output slew rate TX 1-3 (minimum load) R L = 7kΩ , CL = 0pF, VDD = 6 to 12.0V, VSS = -6 to -12V +6 +30 V/µsSR Output slew rate TX 1-3 (maximum load) R L = 3kΩ , CL = 2500pF , VDD = 12V, VSS = -12V +3.0 V/µs Receivers (CL = 50pF) tPLH Propagation delay time DO 1-3 Low-to-High 150 425 ns tPHL Propagation delay time DO 1-3 High-to-Low 150 425 ns tR Output rise time DO 1-3 120 400 ns tF Output fall time DO 1-3 40 100 ns