MC14538B_14 ONSEMI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 13

Technical content

Features

  • Unlimited Rise and Fall Time Allowed on the A Trigger Input
  • Pulse Width Range = 10 /C0109s to 10 s
  • Latched Trigger Inputs
  • Separate Latched Reset Inputs
  • 3.0 Vdc to 18 Vdc Operational Limits
  • Triggerable from Positive (A Input) or Negative−Going Edge (B−Input)
  • Capable of Driving Two Low−Power TTL Loads or One Low−Power Schottky TTL Load Over the Rated Temperature Range
  • Pin−for−pin Compatible with MC14528B and CD4528B (CD4098)
  • Use the MC54/74HC4538A for Pulse Widths Less Than 10 /C0109s with Supplies Up to 6 V
  • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
  • These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage Range −0.5 to +18.0 V Vin, Vout Input or Output Voltage Range (DC or Transient) −0.5 to V DD + 0.5 V Iin, Iout Input or Output Current (DC or Transient) per Pin ±10 mA PD Power Dissipation, per Package (Note 1) 500 mW TA Operating Temperature Range −55 to +125 °C Tstg Storage Temperature Range −65 to +150 °C TL Lead Temperature (8−Second Soldering) 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Temperature Derating: “D/DW” Packages: –7.0 mW//C0095C From 65/C0095C To 125/C0095C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V in and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. http://onsemi.com MARKING DIAGRAMS SOIC−16WB DW SUFFIX CASE 751G A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or /C0071= Pb−Free Indicator SOEIAJ−16 F SUFFIX CASE 966 MC14538B ALYWG See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

SOIC−16 D SUFFIX CASE 751B TSSOP−16 DT SUFFIX CASE 948F 14538BG AWLYWW 538B ALYW/C0071 /C0071 (Note: Microdot may be in either location) SOIC−16WB SOEIAJ−16 SOIC−16 TSSOP−16

http://onsemi.com PIN ASSIGNMENT 125 AB RESET B CX/RXB VSS VDD QB QB BB AA RESET A CX/RXA VSS VSS QA QA BA BLOCK DIAGRAM VDD VDD 4 A B CX RX RESET CX RX 15 14 RESET A B RX AND CX ARE EXTERNAL COMPONENTS. /C8195/C8195VDD = PIN 16 /C8195/C8195VSS = PIN 8, PIN 1, PIN 15 ONE−SHOT SELECTION GUIDE 100 ns MC14528B MC14536B MC14538B MC14541B MC4538A* 1 /C0109s 10 /C0109s1 0 0 /C0109s 1 ms 10 ms 100 ms 1 s 10 s *LIMITED OPERATING VOLTAGE (2 - 6 V) TOTAL OUTPUT PULSE WIDTH RANGE RECOMMENDED PULSE WIDTH RANGE 23 HR 5 MIN. Device Package Shipping† MC14538BDG SOIC−16 (Pb−Free)

48 Units / Rail

NLV14538BDG* SOIC−16 (Pb−Free) MC14538BDR2G SOIC−16 (Pb−Free)

2500 Units / Tape & Reel

NLV14538BDR2G* SOIC−16 (Pb−Free) MC14538BDTR2G TSSOP−16 (Pb−Free) NLV14538BDTR2G* TSSOP−16 (Pb−Free) MC14538BDWG SOIC−16 WB (Pb−Free)

47 Units / Rail

NLV14538BDWG* SOIC−16 WB (Pb−Free) MC14538BDWR2G SOIC−16 WB (Pb−Free)

1000 Units / Tape & Reel

NLV14538BDWR2G* SOIC−16 WB (Pb−Free) MC14538BFG SOEIAJ−16 (Pb−Free)

50 Units / Rail

MC14538BFELG SOEIAJ−16 (Pb−Free)

2000 Units / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.

http://onsemi.com ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Symbol VDD Vdc − 55/C0095C 25/C0095C 125/C0095C UnitMin Max Min Typ (Note 2) Max Min Max Output Voltage “0” Level Vin = VDD or 0 VOL 5.0 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 Vdc “1” Level Vin = 0 or VDD VOH 5.0 4.95 9.95 14.95 4.95 9.95 14.95 5.0 4.95 9.95 14.95 Vdc Input Voltage “0” Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) VIL 5.0 1.5 3.0 4.0 2.25 4.50 6.75 1.5 3.0 4.0 1.5 3.0 4.0 Vdc “1” Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) VIH 5.0 3.5 7.0 3.5 7.0 2.75 5.50 8.25 3.5 7.0 Vdc Output Drive Current (VOH = 2.5 Vdc) Source (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) IOH 5.0 5.0 –3.0 –0.64 –1.6 –4.2 –2.4 –0.51 –1.3 –3.4 –4.2 –0.88 –2.25 –8.8 –1.7 –0.36 –0.9 –2.4 mAdc (VOL = 0.4 Vdc) Sink (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) IOL 5.0 0.64 1.6 4.2 0.51 1.3 3.4 0.88 2.25 8.8 0.36 0.9 2.4 mAdc Input Current, Pin 2 or 14 Iin 15 − ±0.05 − ±0.00001 ±0.05 − ±0.5 /C0109Adc Input Current, Other Inputs Iin 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0 /C0109Adc Input Capacitance, Pin 2 or 14 Cin − − − − 25 − − − pF Input Capacitance, Other Inputs (Vin = 0) Quiescent Current (Per Package) Q = Low, Q = High IDD 5.0 5.0 0.005 0.010 0.015 5.0 150 300 600 /C0109Adc Quiescent Current, Active State (Both) (Per Package) Q = High, Q = Low IDD 5.0 2.0 2.0 2.0 0.04 0.08 0.13 0.20 0.45 0.70 2.0 2.0 2.0 mAdc Total Supply Current at an external load capacitance (CL) and at external timing network (RX, CX) (Note 3) IT 5.0 IT = (3.5 x 10–2) RXCXf + 4CXf + 1 x 10–5 CLf IT = (8.0 x 10–2) RXCXf + 9CXf + 2 x 10–5 CLf IT = (1.25 x 10–1) RXCXf + 12CXf + 3 x 10–5 CLf where: IT in /C0109A (one monostable switching only), where: CX in /C0109F, CL in pF, RX in k ohms, and where: f in Hz is the input frequency. /C0109Adc Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. The formulas given are for the typical characteristics only at 25 /C0095C. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ OPERATING CONDITIONS External Timing Resistance RX − 5.0 − (Note 4) k/C0087 External Timing Capacitance CX − 0 − No Limit (Note 5) /C0109F 4. The maximum usable resistance R X is a function of the leakage of the capacitor CX, leakage of the MC14538B, and leakage due to board layout and surface resistance. Susceptibility to externally induced noise signals may occur for RX > 1 M/C0087.. 5. If C X > 15 /C0109F, use discharge protection diode per Fig. 11.

http://onsemi.com SWITCHING CHARACTERISTICS (Note 6) (CL = 50 pF, TA = 25/C0095C) Characteristic Symbol VDD Vdc All Types UnitMin Typ (Note 7) Max Output Rise Time tTLH = (1.35 ns/pF) CL + 33 ns tTLH = (0.60 ns/pF) CL + 20 ns tTLH = (0.40 ns/pF) CL + 20 ns tTLH 5.0 100 200 100 ns Output Fall Time tTHL = (1.35 ns/pF) CL + 33 ns tTHL = (0.60 ns/pF) CL + 20 ns tTHL = (0.40 ns/pF) CL + 20 ns tTHL 5.0 100 200 100 ns Propagation Delay Time A or B to Q or Q tPLH, tPHL = (0.90 ns/pF) CL + 255 ns tPLH, tPHL = (0.36 ns/pF) CL + 132 ns tPLH, tPHL = (0.26 ns/pF) CL + 87 ns tPLH, tPHL 5.0 300 150 100 600 300 220 ns Reset to Q or Q tPLH, tPHL = (0.90 ns/pF) CL + 205 ns tPLH, tPHL = (0.36 ns/pF) CL + 107 ns tPLH, tPHL = (0.26 ns/pF) CL + 82 ns 5.0 250 125 500 250 190 ns Input Rise and Fall Times Reset tr, tf 5 /C0109s B Input 5 300 1.2 0.4 1.0 0.1 0.05 ms A Input 5 No Limit Input Pulse Width A, B, or Reset tWH, tWL 5.0 170 ns Retrigger Time trr 5.0 ns Output Pulse Width — Q or Q Refer to Figures 8 and 9 CX = 0.002 /C0109F, RX = 100 k/C0087 T 5.0 198 200 202 210 212 214 230 232 234 /C0109s CX = 0.1 /C0109F, RX = 100 k/C0087 5.0 9.3 9.4 9.5 9.86 10.14 10.5 10.6 10.7 ms CX = 10 /C0109F, RX = 100 k/C0087 5.0 0.91 0.92 0.93 0.965 0.98 0.99 1.03 1.04 1.06 s Pulse Width Match between circuits in the same package. CX = 0.1 /C0109F, RX = 100 k/C0087 100 [(T1 – T2)/T1] 5.0 ±1.0 ±1.0 ±1.0 ±5.0 ±5.0 ±5.0 6. The formulas given are for the typical characteristics only at 25 /C0095C. 7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

http://onsemi.com PACKAGE DIMENSIONS SOIC−16 D SUFFIX CASE 751B−05 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 16 9 SEATING PLANE F JM R X 45/C0095 G

8 PLP−B−

−A− M0.25 (0.010) B S −T− D K C 16 PL SBM0.25 (0.010) A ST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095 6.40 16X 0.58 16X 1.12 1.27 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT

http://onsemi.com PACKAGE DIMENSIONS SOIC−16 WB DW SUFFIX CASE 751G−03 ISSUE D D 14X B16X SEATING PLANE SAM0.25 B ST 16 9 h X 45/C0095 MBM0.25 H8X E B A e T A L C /C0113 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 q 0 7 /C0095/C0095 11.00 16X 0.58 16X 1.62 1.27 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT

http://onsemi.com PACKAGE DIMENSIONS TSSOP−16 DT SUFFIX CASE 948F ISSUE B ÇÇÇ ÇÇÇ ÇÇÇ DIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.18 0.28 0.007 0.011 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. /C0095/C0095/C0095/C0095 SECTION N−N SEATING PLANE IDENT. PIN 1 1 8 16 9 DETAIL E J B C D A K H G ÉÉÉ ÉÉÉ DETAIL E F M L 2X L/2 −U− SU0.15 (0.006) T SU0.15 (0.006) T SUM0.10 (0.004) V ST 0.10 (0.004) −T− −V− −W− 0.25 (0.010) 16X REFK N N 7.06 16X 0.36 16X 1.26 0.65 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT

http://onsemi.com PACKAGE DIMENSIONS SOEIAJ−16 F SUFFIX CASE 966 ISSUE A HE DIM MIN MAX MIN MAX INCHES --- 2.05 --- 0.081 MILLIMETERS 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 BSC 0.050 BSC 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 A HE LE /C009510 /C00950 /C009510 /C0095 LE /C0095 NOTES: /C8195/C81991. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. /C8195/C81992. CONTROLLING DIMENSION: MILLIMETER. /C8195/C81993. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. /C8195/C81994. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. /C8195/C81995. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). M L DETAIL P VIEW P c A b e 16 9 D Z E A b c D E e L M Z ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidia ries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 MC14538B/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative