142-0711-201

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TPS54120EVM TI1 | Alldatasheet

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User's Guide SLVU641 –January2012 TPS54120EVM, Low Noise 1A Power Supply Evaluation Module This User’s Guide describesoperationaluse of the TPS54120 EvaluationModule (PWR103) as a referencedesignforengineeringdemonstrationand evaluationof the TPS54120, low noise1A power supply.Includedinthisuser’s guideare setupand operationinstructions,a schematicdiagram,layout description,a billofmaterials,and testresults.

1 Background

The Texas InstrumentsTPS54120 EVM (PWR103) helpsdesignengineersevaluatetheoperationand performanceoftheTPS54120 (Switcher+ LDO) forpossibleuse intheirown circuitapplication.This particularEVM configurationcontainsalloftheexternalcomponents requiredfora lownoise1A solution withinternalthermaland currentlimitshutdowns,and enablecircuitryina 3.5mm x 5.5mm, QFN, thermallyenhanced PowerPad ™ package. The power inputoftheIC (PVIN)isratedfor1.6Vto17V whilethecontrolinput(VIN)isratedfor4.5to 17V.The TPS54120 providesbothinputsbutthisEVM isdesignedand testedusingthePVIN connected toVIN witha minimum inputvoltageof7V.Rated inputvoltageand outputcurrentrangefortheevaluation module aregiveninTable1.Thisevaluationmodule isdesignedtodemonstratethesmall printed-circuit-boardareasthatmay be achievedwhen designingwiththeTPS54120 device.The switchingfrequencyisexternallysetata nominal480 KHz. The integratedswitcher(SW) and LDO areoptimizedtoallowtheTPS54120 toachievehighefficiencies and a lowoutputnoise.The compensationcomponents areexternaltotheintegratedcircuit(IC),and an externaldividerallowsforan adjustableLDO outputvoltagefrom0.8Vto6V.Additionally,theTPS54120 providesadjustableslowstart,trackingand enableinputs.The TPS54120, includingotherexternal components thatiscapableofdeliveringup to1A lownoisesupplytotheload. Table1.EVM Specifications EVM InputVoltage SW Output Voltage LDO Output Voltage Output Current TPS54120 7-17V 4.1V 3.3V 0-1A

2 Setup

Thissectiondescribesthejumpersand connectorson theEVM as wellas how toproperlyconnect,setup and use theTPS54120EVM.

2.1 Inputand Output Connections and Jumper Descriptions

J1-LDO OUT & J2-GND: The outputoftheLDO and thegroundconnector.Defaultsettingis3.3V. ThisisthelownoiseoutputfromtheTPS54120.
J3-VIN& J4-GND: Inputpower supplyvoltageand thegroundconnector.The positiveinputleadand groundreturnleadfromtheinputpower supplyshouldbe twistedand keptas shortas possibleto minimizeEMI transmission.Additionalbulkcapacitanceshouldbe added acrossJ3 & J4 ifthesupply leadsaregreaterthansixinches.Forexample,an additional47µF electrolyticcapacitoracrossJ3 & J4 can improvethetransientresponseoftheTPS54120 whileeliminatingunwanted ringingon theinput due tolongwireconnections.
J5:SMA connectorfortheoutputvoltageoftheLDO. The connectorforJ5 isnotpopulatedon the TPS54120EVM (PWR103). Thisfootprintallowsthemountingofan SMA-styleconnectorformore accuratePSRR measurements.
J7-SW OUT & J6-GND: The outputoftheSW and thegroundconnector.Thisistheoutputvoltage fromtheswitcherconverterand theinputvoltagetotheLDO. Defaultsettingis4.1V
J8:SMA connectorfortheoutputvoltageoftheSW. The connectorforJ8 isnotpopulatedon the TPS54120EVM (PWR103). Thisfootprintallowsthemountingofan SMA-styleconnectorformore accuratePSRR measurements.
JP1-LDOEN: LDO enable.To enabletheoutputoftheLDO, connectthisjumperfromthecenterpinto the“on” pin.ThiswillconnecttheenablepintotheLDO inputsupply.To disableconnectthisjumper fromthecenterpintothe“off” pin.ThiswillshorttheLDO enablepintoground.
JP2: The jumperconnectionbetween theoutputoftheswitcherconvertertotheLDO input.A shorting jumperisrequiredfornormaloperation.Ifyou want todisconnecttheLDO fromtheSW, remove the shortingjumperwire.

2 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SLVU641 –January2012

www.ti.com Setup

JP3-SW EN: Switcherconverterenablejumper.To enabletheSWITCHER output,leavethisjumper unconnected(thereisan internalpullup on thispin).To disable,installa shortingjumper.Thiswill shorttheenablepintoground.
TP1-PWRGD: Power Good connectortestpoint.Itispower good open collectorflagfortheswitcher converter.Tiethispinthrougha 10k resistortoa regulatedsupply<5.5Vtomonitorthestatusofthe switcherconverteroutput.
TP2-SENSE: The SW sense (feedback)pintestpoint.
TP3-SW OUT: Thisisthepositiveswitcheroutputtestpoint.InadditiontoJ7,thistestpointcan also be used tomeasure theoutputvoltageoftheswitcher.
TP4-LDO IN:The LDO inputvoltagetestpoint.
TP5-LDO OUT: The LDO outputtestpoint.InadditiontoJ1,thistestpointcan alsobe used to measure theoutputvoltageoftheLDO.

2.2 Modifications

These evaluationmodules aredesignedtoprovideaccesstothefeaturesoftheTPS54120. However, some modificationscan be made tothismodule.

2.2.1 SW Output VoltageSet Point

The outputvoltageoftheswitcherissetby theresistordividernetworkofR5 and R6. R6 isfixedat 10kohm. To change theswitcheroutputvoltageoftheEVM, itisnecessarytochange thevalueofresistor R5. The valueofR5 fora specificoutputvoltagecan be calculatedusingEquation1.Note thattheSW outputshouldbe 0.8Vabove theLDO outputforbestPSR and noiseperformance. R5 = 10 kΩ (SW Vout–0.8V)/(0.8V) (1) Table2 liststheR5 valuesforsome common outputvoltages.The valuesgiveninTable2 arestandard values,nottheexactvaluecalculatedusingEquation1. Table2.Sample 1% ResistorValues forCommon SW Output Voltages SW Output Voltage(V) R5 Value (kΩ) 1.8 12.4 2.5 21.5 3.3 31.6 4.1 41.2 5 52.3 6 64.9

2.2.2 LDO Output VoltageSet Point

The outputvoltageoftheLDO alsocan be setby an externalresistordividernetwork(R1 and R2).R2 is fixedat10kohm. To change theLDO outputvoltageoftheEVM, itisnecessarytochange thevalueof resistorR1. ChangingthevalueofR1 can change theoutputvoltagefrom0.8V to6V.The valueofR1 for a specificoutputvoltagecan be calculatedusingEquation2.Note thattheLDO outputshouldbe 0.8V belowtheSW outputforbestPSR and noiseperformance. R1 = 10 kΩ (LDO Vout–0.8V)/(0.8V) (2) Table3 liststheR1 valuesforsome common outputvoltages.Note thattheminimum VIN equalsVOUT + VDO or2.2V,whicheverisgreater.The valuesgiveninTable3 arestandardvalues,nottheexactvalue calculatedusingEquation2. Table3.Sample 1% ResistorValues forCommon LDO Output Voltages LDO Output Voltage(V) R1 Value (kΩ) 0.8 0 (Short) 1 2.49 3SLVU641 –January2012 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

Operation www.ti.com Table3.Sample 1% ResistorValues forCommon LDO Output Voltages (continued) LDO Output Voltage(V) R1 Value (kΩ) 1.2 4.99 1.5 8.87 1.8 12.5 2.5 21 3.3 30.9 5 52.3

2.2.3 SwitcherSlow StartTime

The slowstarttimecan be adjustedby changingthevalueofC7. Use Equation3 tocalculatetherequired valueofC7 fora desiredslowstarttime(Tss) C7(nF)= Tss(ms)Iss(μA)/Vref(V) (3) Basicallythedevicehas an internalpull-upcurrentsourceof2.3μA=Issthatchargestheexternalslow startcapacitorC7. The voltagereferenceVref(V)forthispartis0.8V.

2.2.4 LDO StartUp

The startup timeoftheLDO can be adjustedby changingthevalueofC13. Inadditiontostartup time, thecapacitoron theNR pinisused fornoisereductionas well.However,thenoisereductioneffectis nearlysaturatedat0.01µF.

2.3 Equipment Interconnect

Turnofftheinputpower supplyafterverifyingthatitsoutputvoltageissettothedesiredsupplyvoltage (lessthan17V) and thecurrentlimitissettoapproximately500mA. Connectthepositivevoltagelead fromtheinputpower supplytoJ3 (Vin)and thegroundleadtoJ4 (GND).
Connecta 0-1A load(ILoad)between LDO OUT and GND usingJ1 and J2
DisabletheoutputoftheLDO by connectinga shortingjumperatJP1 fromthe“off” pintothecenter pin(LDO EN).

3 Operation

Turnon theinputpower supply.Verifythattheswitcheroutputvoltageisnear4.1Vand theLDO outputisnear0V.
EnabletheLDO outputby connectingthejumperon JP1 fromthe“on” pintothecenterpin(LDO EN).
VerifythattheLDO outputvoltageis3.3V.
Varytheloadcurrentand VIN voltageas necessaryfortestpurposes.

4 TestResults

ThissectionprovidestypicalperformancewaveformsfortheTPS54120EVM (PWR103) characteristicof thisEVM design.

4 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SLVU641 –January2012

0.01 0.1 10 100 1000 10000 100000 1000000 10000000 f - Frequency - Hz Output Spectral Noise Density ( V/SQRT(Hz)) /c109 V = 12 V, V = 3.3 V, C = 100 F, C = 0.1 F, I = 400 mA, F = 480 kHz, L1 = 22 H IN OUT OUT NR OUT SW /c109 /c109 /c109 www.ti.com TestResults

4.1 Output VoltageRipple

Figure1 shows theoutputvoltagerippleoftheLDO and SWITCHER converterfortheTPS54120EVM withVin= 12V,SW OUT = 4.1V,LDO OUT = 3.3V,Iout= 400mA, Fswitching= 480kHz. Figure1.Output VoltageofBoth theSW and LDO with400mA Load

4.2 Output Noise

Figure2 shows theoutputvoltagenoisespectrumfortheTPS54120EVM withVin= 12V,LDO OUT = 3.3V,SW OUT = 4.1V,Iout= 400mA, Fswitching= 480kHz. Figure2.Output Spectrum Noise Densityvs.Frequency 5SLVU641 –January2012 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

TestResults www.ti.com

4.3 Output Turn On

Figure3 shows theSW outputvoltageturn-onfromSW enablefortheTPS54120EVM withVin= 12V,SW OUT = 4.1V,LDO OUT = 3.3V,and Iout= 400mA, Fswitching= 480kHz. Figure3.SwitcherConverterOutput VoltageTurn-on,SW Enable Figure4 shows theLDO outputvoltageturn-onfromLDO enablefortheTPS54120EVM withVin= 12V, SW OUT = 4.1V,LDO OUT = 3.3V,and Iout= 400mA, Fswitching= 480kHz. Figure4.LDO Output VoltageTurn-on,LDO Enable

6 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SLVU641 –January2012

www.ti.com TestResults Figure5 shows theLDO outputvoltageturn-onofTPS54120 fromSW enablefortheTPS54120EVM with Vin= 12V,SW OUT = 4.1V,LDO OUT = 3.3V,and Iout= 400mA, Fswitching= 480kHz. Figure5.LDO Output VoltageTurn-on,SW Enable

4.4 Load Transient

Figure6 shows theTPS54120 responsetoloadtransients.The currentstepisfrom30% to75% ofthe maximum ratedloadat12 V input.Totalpeak-to-peakvoltagevariationisas shown,includingrippleand noiseon theoutputofboththeswitcherand theLDO. Figure6.TPS54120 TransientResponse 7SLVU641 –January2012 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

0 100 200 300 400 500 600 700 800 900 1000 Efficiency - % I - Output Current - mAO TPS54120EVM Efficiency V = 10 Vin V = 8 Vin V =12 Vin V =15 Vin TestResults www.ti.com

4.5 Efficiency

Figure7 shows theefficiencyfortheTPS54120 atan ambienttemperatureof25°C forVin=8V,10V,12V, and 15V.The switcheroutputvoltageissetto4.1Vand theLDO issetto3.3V. Figure7.TPS54120 Efficiency

4.6 Thermal Characteristic

Thissectionshows a thermalimage oftheTPS54120 runningat12 V inputand 1A load,3.3VLDO OUT, and 4.1VSwitcherout.Thereisno airflowand theambienttemperatureis25°C. The peak temperatureof theIC (56.4°C) iswellbelowthemaximum recommended operatingconditionlistedinthedatasheetof 150°C.

8 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SLVU641 –January2012

www.ti.com Board Layout Figure8.TPS54120 Thermal Image

5 Board Layout

Thissectionprovidesa descriptionoftheTPS54120, boardlayout,and layerillustrations.

5.1 Layout Description

The boardlayoutfortheTPS54120 evaluationboardisshown inFigure9 throughFigure12.The board consistsof4 layers.Itislaidoutinsuch a way theanaloggroundoftheLDO isshieldedas much as possiblefromthenoiseoftheswitcher.Also,criticalanalogcircuitssuch as thevoltagesetpointdivider, frequencysetresistor,slowstartcapacitorand compensationcomponents areterminatedtogroundusing a viaseparatefromthepower groundpour.The topsidelayeroftheEVM islaidoutina manner typicalof a userapplication. The toplayercontainstheanaloggroundoftheLDO and a portionoftheoutputpower groundoftheSW side.The firstinternallayerisconnectedtothepower pad and theanaloggroundoftheIC;mostlythis layerisused forpower dissipation.Onlya few tracesareimplementedon thislayersuch as theLDO enable,and thePWRGD testpointtrace. The second internallayerismostlyused foranaloggroundas well.ForshieldingtheLDO groundfromthe switchnode noise,a smallisolatedpower groundplaneismade inthecenterofthislayertoreduce capacitivecouplingwithanalogground.Thislayeralsocontainstheinputvoltagetraceoftheswitcher connectingtheinputcap and theconnectorJ3. Aboutone quarterofthebottomlayercontainsthemain inputpower groundtrace.Inthecenterofthe layer,theinductor(L1)and theoutputcaps (C9,C10) oftheswitcherarelocated.The remainingsurface areaisconnectedtotheanaloggroundofthetopand theinternallayersthroughvias.Some ofthesevias aredirectlyundertheTPS54120 devicetoprovidea thermalpathfromthetop-sidegroundplanetothe internaland bottom-sidegroundplane. 9SLVU641 –January2012 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

Board Layout www.ti.com The inputdecouplingcapacitoroftheSW (C5)islocatedas closeas possibletotheIC.PVIN and VIN are connectedtogetherinthisEVM, and thenthroughviastheyareconnectedtotheinputvoltagetraceinthe second internallayer.Whereas,thedecouplingcapacitorgroundisconnectedthroughviastothebottom layer.The compensationand thesoftstartcapacitors(C6,C7 and C8),theCLK/RT resistor(R3),and the SW feedbackresistor(R6)aregroundedtoa power groundtraceinthecenterofthetoplayer.Thishelps shieldthem fromnoisesofthehighcurrentgroundplane. The inductor(L1),thebootcap (C12),and theoutputcaps oftheSW (C9,C10) areplacedon thebottom layeroftheboardtoshieldtheswitchingnoiseintotheLDO side.However,thebootcap (C12)and the inductor(L1)areconnectedthroughviasdirectlyintothePH pinoftheIC.Thisconnectsthem as closeas possibletothePH pinand reducesparasiticinductanceoflongtraces.Also,thenoisereductioncapacitor (C13)isplacedas closeas possibletotheIC. The inputoftheLDO isconnectedtotheoutputoftheswitcherusinga shortingjumperand a longtrace parallelwiththetracethatconnectsthegroundon theLDO withthegroundoftheswitcher.Criticalanalog groundoftheLDO circuitssuch as thevoltagesetpointdivider,theLDO input,and outputcaps are terminatedtogroundusinga widegroundtraceseparatefromthepower groundpour.Inaddition,the inputand theoutputLDO capacitorsarekeptclosetotheIC.The voltagedividernetworkoftheLDO ties totheLDO outputvoltageatthecopperoftheLDO outputtrace. Figure9.Top Side Silkscreenand Routing

10 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SLVU641 –January2012

www.ti.com Board Layout Figure10.Second Layer (Internal)Routing Figure11.ThirdLayer (Internal)Routing 11SLVU641 –January2012 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

Schematic www.ti.com Figure12.Bottom Layer Silkscreenand Routing

6 Schematic

Figure13 istheschematicfortheTPS54120 evaluationboard. Figure13.Schematic

12 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SLVU641 –January2012

www.ti.com BillofMaterials

7 BillofMaterials

Table4 presentsthebillofmaterialsfortheTPS54120 evaluationboard. Table4.BillofMaterials Count RefDes Value Description Size PartNumber MFR 5 C1, C10 0.1uF Capacitor,Ceramic,16V,X7R, 10% 0603 STD STD C12 –C14

1 C11 100pF Capacitor,Ceramic,50V,C0G, 5% 0603 STD STD

1 C15 10uF Capacitor,Ceramic,6.3V,X7R, 10% 1206 STD STD 1 C2 4.7uF Capacitor,Ceramic,10V,X7R, 10% 1206 STD STD 2 C3, C7 0.01uF Capacitor,Ceramic,25V,X7R, 10% 0603 STD STD 1 C4 100uF Capacitor,Ceramic,6.3V,20%, X5R 1812 STD STD

1 C5 10uF Capacitor,Ceramic,25V,X5R, 10% 0805 STD STD

1 C6 330pF Capacitor,Ceramic,25V,X7R, 10% 0603 STD STD

1 C8 0.047uF Capacitor,Ceramic,25V,X7R, 10% 0603 STD STD 1 C9 47uF Capacitor,Ceramic,6.3V,X5R, 20% 1210 STD STD 6 J1-4J6-7 PEC02SAAN Header,Male 2-pin,100milspacing, 0.100inchx 2 PEC02SAAN Sullins 0 J5 J8 Open Connector,SMT Straight,JackReceptacle 0.250SQ 142-0711-201 Johnson 1 JP1 PEC03SAAN Header,Male 3-pin,100milspacing, 0.100inchx 3 PEC03SAAN Sullins 2 JP2-3 PEC02SAAN Header,Male 2-pin,100milspacing, 0.100inchx 2 PEC02SAAN Sullins 1 L1 22 uH Inductor,SMT, Power Choke 1.1A,±20% 4838 74408943220 WE 1 R1 30.9k Resistor,Chip,1/16W,1% 0603 Std Std 2 R2, R6 10.0k Resistor,Chip,1/16W,1% 0603 Std Std

1 R3 100k Resistor,Chip,1/16W,1% 0603 Std Std

1 R4 2.20k Resistor,Chip,1/16W,1% 0603 Std Std 1 R5 41.2K Resistor,Chip,1/16W,1% 0603 Std Std 5 TP1-5 5002 TestPoint,White,ThruHoleColorKeyed 0.100x 0.100inch Keystone

1 U1 TPS54120RGY IC,IntegratedSWITCHER and LDO Low Noise1A QFN-24 TPS54120RGY TI

3 — Shunt,100-mil,Black 0.100 929950-00 3M 1 PCB, 2.0" x 1.5" x 0.031" PWR103 Any 13SLVU641 –January2012 TPS54120EVM, Low Noise1A Power SupplyEvaluationModule SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EvaluationBoard/KitImportantNotice Texas Instruments(TI)providestheenclosedproduct(s)underthefollowingconditions: Thisevaluationboard/kitisintendedforuse forENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and isnotconsideredby TItobe a finishedend-productfitforgeneralconsumer use.Personshandlingthe product(s)must have electronicstrainingand observegood engineeringpracticestandards.As such,thegoods beingprovidedare notintendedtobe completeintermsofrequireddesign-,marketing-,and/ormanufacturing-relatedprotectiveconsiderations, includingproductsafetyand environmentalmeasures typicallyfoundinend productsthatincorporatesuch semiconductor components orcircuitboards.Thisevaluationboard/kitdoes notfallwithinthescope oftheEuropean Uniondirectivesregarding electromagneticcompatibility,restrictedsubstances(RoHS),recycling(WEEE), FCC, CE orUL, and thereforemay notmeet the technicalrequirementsofthesedirectivesorotherrelateddirectives. Shouldthisevaluationboard/kitnotmeet thespecificationsindicatedintheUser’s Guide,theboard/kitmay be returnedwithin30 days fromthedateofdeliveryfora fullrefund.THE FOREGOING WARRANTY ISTHE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND ISIN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED,OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. The userassumes allresponsibilityand liabilityforproperand safehandlingofthegoods.Further,theuserindemnifiesTIfromall claimsarisingfromthehandlingoruse ofthegoods.Due totheopen constructionoftheproduct,itistheuser’s responsibilityto takeany and allappropriateprecautionswithregardtoelectrostaticdischarge. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. TIcurrentlydealswitha varietyofcustomersforproducts,and thereforeourarrangementwiththeuserisnot exclusive. TIassumes no liabilityforapplicationsassistance,customer productdesign,softwareperformance,or infringementof patentsor servicesdescribedherein. PleasereadtheUser’s Guide and,specifically,theWarningsand RestrictionsnoticeintheUser’s Guide priortohandlingthe product.Thisnoticecontainsimportantsafetyinformationabouttemperaturesand voltages.Foradditionalinformationon TI’s environmentaland/orsafetyprograms,pleasecontacttheTIapplicationengineerorvisitwww.ti.com/esh. No licenseisgrantedunderany patentrightorotherintellectualpropertyrightofTIcoveringorrelatingtoany machine,process,or combinationinwhichsuch TIproductsorservicesmightbe orareused. FCC Warning Thisevaluationboard/kitisintendedforuse forENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and isnotconsideredby TItobe a finishedend-productfitforgeneralconsumer use.Itgenerates,uses,and can radiateradiofrequencyenergyand has notbeen testedforcompliancewiththelimitsofcomputingdevicespursuanttopart15 ofFCC rules,whicharedesignedtoprovidereasonableprotectionagainstradiofrequencyinterference.Operationofthis equipmentinotherenvironmentsmay cause interferencewithradiocommunications,inwhichcase theuserathisown expense willbe requiredtotakewhatevermeasures may be requiredtocorrectthisinterference. EVM Warnings and Restrictions ItisimportanttooperatethisEVM withintheinputvoltagerangeof7 V to17 V and theoutputvoltagerangeof0.8V to6 V. Exceedingthespecifiedinputrangemay cause unexpectedoperationand/orirreversibledamage totheEVM. Ifthereare questionsconcerningtheinputrange,pleasecontacta TIfieldrepresentativepriortoconnectingtheinputpower. Applyingloadsoutsideofthespecifiedoutputrangemay resultinunintendedoperationand/orpossiblepermanentdamage tothe EVM. PleaseconsulttheEVM User's Guide priortoconnectingany loadtotheEVM output.Ifthereisuncertaintyas totheload specification,pleasecontacta TIfieldrepresentative. Duringnormaloperation,some circuitcomponents may have case temperaturesgreaterthan85°C. The EVM isdesignedto operateproperlywithcertaincomponents above 85°C as longas theinputand outputrangesaremaintained.These components includebutarenotlimitedtolinearregulators,switchingtransistors,pass transistors,and currentsense resistors.These typesof devicescan be identifiedusingtheEVM schematiclocatedintheEVM User's Guide.When placingmeasurement probesnear thesedevicesduringoperation,pleasebe aware thatthesedevicesmay be verywarm tothetouch. MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated

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Product Information

142-0711-201 specifications and overview.

Summary

TPS54120EVM, Low Noise 1A Power Supply Evaluation Module

Description