12N60A4D

HGTG12N60A4D INTERSIL | Alldatasheet

Document overview

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Technical content

Features

• 600V Switching SOA Capability J = 125oC
• Low Conduction Loss
• Temperature Compensating SABER™ Model www.intersil.com
• Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards Packaging JEDEC TO-220AB ALTERNATE VERSION JEDEC TO-263AB JEDEC STYLE TO-247

Ordering Information

HGTG12N60A4D TO-247 12N60A4D HGTP12N60A4D TO-220AB 12N60A4D HGT1S12N60A4DS TO-263AB 12N60A4D NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in tape and reel, e.g. HGT1S12N60A4DS9A. C E G G CE COLLECTOR (FLANGE) G COLLECTOR (FLANGE) E COLLECTOR (FLANGE) C E G INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 Data Sheet November 1999 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. SABER™ is a trademark of Analogy, Inc. 1-888-INTERSIL or 407-727-9207 | Copyright © Intersil Corporation 1999

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTG12N60A4D, HGTP12N60A4D, HGT1S12N60A4DS UNITS Collector Current Continuous Maximum Temperature for Soldering 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. Pulse width limited by maximum junction temperature. Electrical Specifications TJ = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Collector to Emitter Breakdown Voltage BV CES IC = 250µA, VGE = 0V 600 - - V Collector to Emitter Leakage Current I CES VCE = 600V T J = 25oC - - 250 µA TJ = 125oC - - 2.0 mA Collector to Emitter Saturation Voltage V CE(SAT) IC = 12A, VGE = 15V TJ = 25oC - 2.0 2.7 V TJ = 125oC - 1.6 2.0 V Gate to Emitter Threshold Voltage V GE(TH) IC = 250µA, VCE = 600V - 5.6 - V Gate to Emitter Leakage Current I GES VGE = ±20V - - ±250 nA Switching SOA SSOA T J = 150oC, RG = 10Ω, VGE = 15V, L = 100µH, VCE = 600V 60 - - A Gate to Emitter Plateau Voltage V GEP IC = 12A, VCE = 300V - 8 - V On-State Gate Charge Q g(ON) IC = 12A, VCE = 300V VGE = 15V - 78 96 nC VGE = 20V - 97 120 nC Current Turn-On Delay Time t d(ON)I IGBT and Diode at TJ = 25oC, ICE = 12A, VCE = 390V, VGE = 15V, RG = 10Ω, L = 500µH, Test Circuit (Figure 24) -1 7 - n s Current Rise Time t rI -8 - n s Current Turn-Off Delay Time t d(OFF)I -9 6 - n s Current Fall Time t fI -1 8 - n s Turn-On Energy (Note 3) E ON1 -5 5 - µJ Turn-On Energy (Note 3) E ON2 - 160 - µJ Turn-Off Energy (Note 2) E OFF -5 0 - µJ Current Turn-On Delay Time t d(ON)I IGBT and Diode at TJ = 125oC, ICE = 12A, VCE = 390V, VGE = 15V, RG = 10Ω, L = 500µH, Test Circuit (Figure 24) -1 7 - n s Current Rise Time t rI -1 6 - n s Current Turn-Off Delay Time t d(OFF)I - 110 170 ns Current Fall Time t fI -7 0 9 5n s Turn-On Energy (Note3) E ON1 -5 5 - µJ Turn-On Energy (Note 3) E ON2 - 250 350 µJ Turn-Off Energy (Note 2) E OFF - 175 285 µJ HGTG12N60A4D, HGTP12N60A4D, HGT1S12N60A4DS

FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 19. DIODE FORWARD CURRENT vs FORWARD FIGURE 20. RECOVERY TIMES vs FORWARD CURRENT FIGURE 21. RECOVERY TIMES vs RATE OF CHANGE OF FIGURE 22. STORED CHARGE vs RATE OF CHANGE OF

12 PULSE DURATION = 250µs

Handling Precautions for IGBTs Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating- Never exceed the gate-voltage rating of V GEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open- circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. Operating Frequency Information Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (I CE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows f MAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f MAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. t d(OFF)I and td(ON)I are defined in Figure 25. Device turn-off delay can establish an additional frequency limiting condition for an application other than T JM. td(OFF)I is important when controlling output ripple under a lightly loaded condition. f MAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD =( TJM -T C)/RθJC. The sum of device switching and conduction losses must not exceed P D. A 50% duty factor was used (Figure 3) and the conduction losses (P C) are approximated by PC =( VCE xI CE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 25. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE xV CE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0). HGTG12N60A4D, HGTP12N60A4D, HGT1S12N60A4DS ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.