UA9638C-EP_14 TI1 | Alldatasheet
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(TOP VIEW) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. uA9638C-EP www.ti.com SLLSEA4A –DECEMBER 2011–REVISED DECEMBER 2011 DUALHIGH-SPEEDDIFFERENTIALLINEDRIVER Check forSamples: uA9638C-EP 1FEATURES 2• Meets or Exceeds ANSI Standard SUPPORTS DEFENSE, AEROSPACE, EIA/TIA-422-B AND MEDICAL APPLICATIONS
- Operates From a Single5-V Power Supply • ControlledBaseline
- DrivesLoads as Low as 50 Ω up to15 Mbps • One Assembly/TestSite
- TTL- and CMOS-Input Compatibility • One FabricationSite
- Output Short-CircuitProtection • Rated From –40°C to85°C
- InterchangeableWith National • Extended Product LifeCycle Semiconductor™ DS9638 • Extended Product-Change Notification
- Product Traceability
DESCRIPTION
The uA9638C isa dualhigh-speeddifferentiallinedriverdesignedtomeet ANSI StandardEIA/TIA-422-B.The inputsare TTL and CMOS compatibleand have inputclamp diodes.Schottky-diode-clampedtransistorsare used tominimizepropagationdelaytime.Thisdeviceoperatesfroma single5-V power supplyand issuppliedin an 8-pinpackage. The uA9638 providesthe currentneeded to drivelow-impedanceloadsat high speeds.Typicallyused with twisted-paircablingand differentialreceiver(s),base-band data transmissioncan be accomplishedup to and exceeding15 Mbps inproperlydesignedsystems.The uA9637A duallinereceiveriscommonly used as the receiver.Foreven fasterswitchingspeeds inthesame pinconfiguration,see theSN75ALS191. The uA9638C ischaracterizedforoperationfrom-40°C to85°C. Figure2. Logic Diagram Figure1. Logic Symbol Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2NationalSemiconductorisa trademarkofNationalSemiconductorCorporation. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2011,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
4 kΩ NOM VCC Output GND 9.6 Ω NOM uA9638C-EP SLLSEA4A –DECEMBER 2011–REVISED DECEMBER 2011 www.ti.com ORDERING INFORMATION (1) ORDERABLE TOP-SIDETA = TJ PACKAGE VID NUMBERPART NUMBER MARKING –40°C to85°C SOIC -D Reelof2500 UA9638CIDREP 9638I V62/12606-10XE (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI web siteatwww.ti.com. SCHEMATICS OF INPUTS AND OUTPUTS Figure3. EquivalentofEach Input Figure4. TypicalofAllInputs ABSOLUTE MAXIMUM RATINGS (1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) VCC Supplyvoltagerange(2) –0.5V to7 V VI Inputvoltagerange –0.5V to7 V Continuoustotalpower dissipation See DissipationRatingsTable Lead temperature1,6mm (1/16inch)from10 seconds 260°C TA Operatingfree-airtemperaturerange –40°C to85°C Tstg Storagetemperaturerange –65°C to150°C (1) VoltagevaluesexceptdifferentialoutputvoltagesarewithrespecttonetworkGND. (2) Stressesbeyond thoselistedunderabsolutemaximum ratingsmay cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunderrecommended operating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability.
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www.ti.com SLLSEA4A –DECEMBER 2011–REVISED DECEMBER 2011 THERMAL INFORMATION uA9638C THERMAL METRIC (1) D UNITS
8 PINS
θJA Junction-to-ambientthermalresistance(2) 114.3 θJC Junction-to-casethermalresistance 59.1 θJB Junction-to-boardthermalresistance(3) 55.3 °C/W ψJT Junction-to-topcharacterizationparameter(4) 12.7 ψJB Junction-to-boardcharacterizationparameter(5) 54.7 (1) Formore informationabouttraditionaland new thermalmetrics,see theIC Package ThermalMetricsapplicationreport,SPRA953 . (2) The junction-to-ambientthermalresistanceundernaturalconvectionisobtainedina simulationon a JEDEC-standard,high-Kboard,as specifiedinJESD51-7,inan environmentdescribedinJESD51-2a. (3) The junction-to-boardthermalresistanceisobtainedby simulatinginan environmentwitha ringcoldplatefixturetocontrolthePCB temperature,as describedinJESD51-8. (4) The junction-to-topcharacterizationparameter,ψJT,estimatesthejunctiontemperatureofa deviceina realsystemand isextracted fromthesimulationdataforobtainingθJA,usinga proceduredescribedinJESD51-2a (sections6 and 7). (5) The junction-to-boardcharacterizationparameter,ψJB,estimatesthejunctiontemperatureofa deviceina realsystemand isextracted fromthesimulationdataforobtainingθJA ,usinga proceduredescribedinJESD51-2a (sections6 and 7). DISSIPATION RATINGS POWER RATING DERATING FACTOR POWER RATING PACKAGE TA = 25°C TA > 70°C TA = 85°C (mW) (mW/ °C) (mW) D 725 8.75 199 RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT VCC Supplyvoltage 4.75 5 5.25 V VIH High-levelinputvoltage 2 V VIL Low-levelinputvoltage 0.8 V IOH High-leveloutputcurrent -50 mA IOL Low-leveloutputcurrent 50 mA TA Operatingfree-airtemperature -40 85 °C
ELECTRICAL CHARACTERISTICS
overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT VIK Inputclamp voltage VCC = 4.75V,II= −18 mA -1 -1.2 V VCC = 4.75V, IOH = −10 mA 2.5 3.5 VOH Highleveloutputvoltage VIH = 2 V, V IOH = −40 mA 2VIL= 0.8V VCC = 4.75V,VIH = 2 V,VIL= 0.8V,VOL Low leveloutputvoltage 0.5 VIOL = 40 mA 1.25x|VOD1 | Magnitudeofdifferentialoutputvoltage VCC = 5.25V,IO = 0 A VVOD2 VCC = 4.75V to5.25V,R L = 100 Ω,|VOD2 | Magnitudeofdifferentialoutputvoltage 2 VSee Figure5 Change inmagnitudeofdifferentialoutput VCC = 4.75V to5.25V,R L = 100 Ω,Δ|VOD | ±0.4 Vvoltage(2) See Figure5 VCC = 4.75V to5.25V,R L = 100 Ω,VOC Common-mode outputvoltage(3) 3 VSee Figure5 (1) AlltypicalvaluesareatVCC = 5 V and TA = 25°C. (2) Δ|VOD |and Δ|VOC |arethechanges inmagnitudeofVOD and VOC ,respectively,thatoccurwhen theinputischanged froma highlevel toa lowlevelorviceversa. (3) InStandardEIA-422-A,VOC ,whichistheaverageofthetwo outputvoltageswithrespecttoground,iscalledoutputoffsetvoltage,VOS . Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3
50 Ω VOC 50 Ω Input VOD2 Differential Output td(OD) TEST CIRCUIT Z Output CL = 15 pF (see Note B) 50 Ω VOLTAGE WAVEFORMS Input 1.5 V 3 V tt(OD) 0 V td(OD) 10% 10% 90% 90% Y Output RL = 100 Ω CL 1.5 V tt(OD) VOL 50% VOL 50% tsk(o) tsk(o) Y Output Z Output VOH VOH Generator (see Note A) 50% 50% uA9638C-EP SLLSEA4A –DECEMBER 2011–REVISED DECEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT Change inmagnitudeofcommon-mode VCC = 4.75V to5.25V,R L = 100 Ω,Δ|VOC | ±0.4 Voutputvoltage(2) See Figure5 VO = 6 V 0.1 100 IO Outputcurrentwithpower off VCC = 0 V VO = −0.25V -0.1 -100 µA VO = −0.25V to6 V ±100 II Inputcurrent VCC = 5.25V,VI= 5.5V 50 µA IIH High-levelinputcurrent VCC = 5.25V,VI= 2.7V 25 µA IIL Low-levelinputcurrent VCC = 5.25V,VI= 0.5V -200 µA IOS Short-circuitoutputcurrent(4) VCC = 5.25V,VO = 0 V -50 -150 mA ICC Supplycurrent(bothdrivers) VCC = 5.25V,No load,Allinputsat0 V 45 65 mA (4) Onlyone outputata timeshouldbe shorted,and durationoftheshortcircuitshouldnotexceed one second. SWITCHING CHARACTERISTICS VCC = 5 V,TA = 25°C (unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(OD) Differentialoutputdelaytime C L = 15 pF,R L = 100 Ω,See Figure6 10 ns tt(OD) Differentialoutputtransitiontime C L = 15 pF,R L = 100 Ω,See Figure6 10 ns tsk(o) Outputskew See Figure6 1 ns PARAMETER MEASUREMENT INFORMATION Figure5. Differentialand Common-Mode Output Voltages A. The inputpulsegeneratorhas thefollowingcharacteristics:ZO = 50 Ω,PRR ≤ 500 kHz,tw = 100 ns,tr = ≤ 5 ns. B. C L includesprobeand jigcapacitance. Figure6. TestCircuitand VoltageWaveforms
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www.ti.com 31-May-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples UA9638CIDREP ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 9638I V62/12606-01XE ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 9638I (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
www.ti.com 31-May-2014 Addendum-Page 2 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 13-Feb-2012 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UA9638CIDREP SOIC D 8 2500 340.5 338.1 20.6 PACKAGE MATERIALS INFORMATION www.ti.com 13-Feb-2012 Pack Materials-Page 2
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