54AC16245 TI | Alldatasheet

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54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS235A – MARCH 1990 – REVISED APRIL 1996 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Members of the Texas Instruments Widebus /C0116 Family /C00683-State Outputs Drive Bus Lines or Buffer Memory Address Registers /C0068Flow-Through Architecture Optimizes PCB Layout /C0068Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise /C0068EPIC /C0116 (Enhanced-Performance Implanted CMOS) 1-/C0109m Process /C0068500-mA Typical Latch-Up Immunity at 125°C /C0068Package Options Include Plastic Thin Shrink Small-Outline (DGG) Package, 300-mil Shrink Small-Outline (DL) Package Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Pin Spacings

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The ’AC16245 are 16-bit bus transceivers organized as dual-octal noninverting 3-state transceivers designed for asynchronous two-way communication between data buses. The control function implementation minimizes external tim- ing requirements These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction control (DIR) input. The output-enable input (OE can be used to disable the devices so that the buses are effectively isolated. The 74AC16245 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16245 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74AC16245 is characterized for operation from –40°C to 85°C. FUNCTION TABLE CONTROL INPUTS OPERATION OE DIR L L B data to A bus L H A data to bus H X Isolation Copyright  1996, Texas Instruments IncorporatedUNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC and Widebus are trademarks of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1DIR 1B1 1B2 GND 1B3 1B4 V CC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 V CC 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 V CC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V CC 2A5 2A6 GND 2A7 2A8 2OE 54AC16245 . . . WD PACKAGE 74AC16245 . . . DGG OR DL PACKAGE (TOP VIEW)

54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS235A – MARCH 1990 – REVISED APRIL 1996

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol† 2OE 1OE † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

3 EN1 [BA]

6 EN4 [BA]

3 EN2 [AB]

6 EN5 [AB]

logic diagram (positive logic) To Seven Other Transceivers 1B1 1A1 1DIR 1OE 2B1 2A1 2DIR To Seven Other Transceivers 2OE

54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS235A – MARCH 1990 – REVISED APRIL 1996 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150/C0095C and a board trace length of 750 mils. recommended operating conditions (see Note 3) 54AC16245 74AC16245 UNITMIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage (see Note 4) 3 5 5.5 3 5 5.5 V VCC = 3 V 2.1 2.1 VIH High-level input voltage VCC = 4.5 V 3.15 3.15 V VCC = 5.5 V 3.85 3.85 VCC = 3 V 0.9 0.9 VIL Low-level input voltage VCC = 4.5 V 1.35 1.35 V VCC = 5.5 V 1.65 1.65 VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V VCC = 3 V –4 –4 IOH High-level output current VCC = 4.5 V –24 –24 mA VCC = 5.5 V –24 –24 VCC = 3 V 12 12 IOL Low-level output current VCC = 4.5 V 24 24 mA VCC = 5.5 V 24 24 Dt/Dv Input transition rise or fall rate 0 10 0 10 ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTES: 3. All unused pins (input and I/O) must be held high or low to prevent them from floating. 4. All VCC and GND pins must be connected to the proper voltage power supply. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS235A – MARCH 1990 – REVISED APRIL 1996

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C 54AC16245 74AC16245 UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT 3 V 2.9 2.9 2.9 IOH = –50 mA 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 VOH IOH = –4 mA 3 V 2.58 2.48 2.48 V IOH =2 4 m A 4.5 V 3.94 3.8 3.8 IOH = –24 mA 5.5 V 4.94 4.8 4.8 IOH = –75 mA† 5.5 V 3.85 3.85 3 V 0.1 0.1 0.1 IOL = 50 mA 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 VOL IOL = 12 mA 3 V 0.36 0.44 0.44 V IOL =2 4m A 4.5 V 0.36 0.44 0.44 IOL = 24 mA 5.5 V 0.36 0.44 0.44 IOL = 75 mA† 5.5 V 1.65 1.65 II VI = VCC or GND 5.5 V ±0.1 ±1 ±1 mA IOZ VI = VCC or GND 5.5 V ±0.5 ±5 ±5 mA ICC VI = VCC or GND, IO = 0 5.5 V 8 80 80 mA C i VI = VCC or GND 5 V 4.5 pF C o VI = VCC or GND 5 V 16 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. ‡ For I/O ports, the parameter IOZ includes the input leakage current. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (see Figure 1) PARAMETER FROM TO TA = 25°C 54AC16245 74AC16245 UNITPARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT tPLH Ao rB Bo rA ns tPHL A or B B or A ns tPZH OE Ao rB ns tPZL OE A or B 3.9 12 16.2 3.9 18 3.9 18 ns tPHZ OE Ao rB ns tPLZ OE A or B ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (see Figure 1) PARAMETER FROM TO TA = 25°C 54AC16245 74AC16245 UNITPARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT tPLH Ao rB Bo rA 2 4.6 6.9 2 7.9 2 7.9 ns tPHL A or B B or A ns tPZH OE Ao rB ns tPZL OE A or B 3 6.2 9.5 3 10.7 3 10.7 ns tPHZ OE Ao rB 5 7.2 9.1 5 9.8 5 9.8 ns tPLZ OE A or B ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 W , tr = 3 ns, tf = 3 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms

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