108335

108335 TI | Alldatasheet

Document overview

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Technical content

Features

n Tiny 5-Pin SOT23 package saves space n Very wide common mode input range n Specified at 2.7V, 5V, and 10V n Typical supply current 25 µA at 5V n 50 kHz gain-bandwidth at 5V n Similar to popular LMC6462 n Output to within 20 mV of supply rail at 100k load n Good capacitive load drive

Applications

n Current sensing for battery chargers n Voltage reference buffering n Sensor interface n Stable bias for GaAs RF amps Connection Diagrams 8-Pin MDIP 5-Pin SOT23 01235201 Top View 01235202 Top View Actual Size 01235219

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing 8-Pin MDIP LMC7111AIN LMC7111AIN 40 Units/Rail N08ELMC7111BIN LMC7111BIN 40 Units/Rail 5-Pin SOT23 LMC7111BIM5 A01B 1k units Tape and Reel MF05ALMC7111BIM5X 3k Units Tape and Reel June 2006 LMC7111 Tiny CMOS Operational Amplifier with Rail-to-Rail Input and Output © 2006 National Semiconductor Corporation DS012352 www.national.com

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Differential Input Voltage ±Supply Voltage Voltage at Input/Output Pin (V +) + 0.3V, (V−) − 0.3V Supply Voltage (V+ −V −)1 1 V Current at Input Pin ±5m A Current at Output Pin (Note 3) ±30 mA Current at Power Supply Pin 30 mA Lead Temp. (Soldering, 10 sec.) 260˚C Storage Temperature Range −65˚C to +150˚C Junction Temperature (Note 4) 150˚C Operating Ratings (Note 1) Supply Voltage 2.5V ≤ V+ ≤ 11V Junction Temperature Range LMC7111AI, LMC7111BI −40˚C ≤ TJ ≤ +85˚C Thermal Resistance (θJA) 8-Pin MDIP 115˚C/W 5-Pin SOT23 325˚C/W 2.7V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 2.7V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) VOS Input Offset Voltage V + = 2.7V 0.9 3 7 mV 59 max TCVOS Input Offset Voltage 2.0 µV/˚C Average Drift I B Input Bias Current (Note 9) 0.1 1 1 pA 20 20 max IOS Input Offset Current (Note 9) 0.01 0.5 0.5 pA 10 10 max RIN Input Resistance >10 Tera Ω +PSRR Positive Power Supply 2.7V ≤ V+ ≤5.0V, 60 55 55 dB Rejection Ratio V − = 0V, VO = 2.5V 50 50 min −PSRR Negative Power Supply −2.7V ≤ V− ≤−5.0V, 60 55 55 dB Rejection Ratio V − = 0V, VO = 2.5V 50 50 min VCM Input Common-Mode V + = 2.7V −0.10 0.0 0.0 V Voltage Range For CMRR ≥ 50 dB 0.40 0.40 min 2.8 2.7 2.7 V 2.25 2.25 max CIN Common-Mode Input 3 pF Capacitance V O Output Swing V + = 2.7V 2.69 2.68 2.68 V RL = 100 kΩ 2.4 2.4 min 0.01 0.02 0.02 V 0.08 0.08 max V+ = 2.7V 2.65 2.6 2.6 V RL =1 0k Ω 2.4 2.4 min 0.03 0.1 0.1 V 0.3 0.3 max ISC Output Short Circuit Sourcing, V O =0 V 7 1 1 m A Current 0.7 0.7 min Sinking, VO = 2.7V 7 1 1 mA 0.7 0.7 min LMC7111 www.national.com 2

2.7V DC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 2.7V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) AVOL Voltage Gain Sourcing 400 V/mv min Sinking 150 V/mv min IS Supply Current V + = +2.7V, 20 45 50 µA VO =V +/2 60 65 max 2.7V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 2.7V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) SR Slew Rate (Note 8) 0.015 V/µs GBW Gain-Bandwidth Product 40 kHz Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Ch aracteristics. Note 2: Human Body Model is 1.5 k Ω in series with 100 pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceed ing the maximum allowed junction temperature at 150˚C. Note 4: The maximum power dissipation is a function of T J(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is P D = (TJ(MAX) −T A)/θJA. All numbers apply for packages soldered directly into a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 8: Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive and negative slew rates. Input referred, V + = 2.7V and RL = 100 kΩ connected to 1.35V. Amp excited with 1 kHz to produce V O =1V PP. Note 9: Bias Current guaranteed by design and processing. Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 3V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Boldface limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) VCM Input Common-Mode V + = 3V −0.25 0.0 0.0 V Voltage Range For CMRR ≥ 50 dB min 3.2 3.0 3.0 V 2.8 2.8 max LMC7111 www.national.com3

3.3V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 3.3V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) VCM Input Common-Mode V + = 3.3V −0.25 −0.1 −0.1 V Voltage Range For CMRR ≥ 50 dB 0.00 0.00 min 3.5 3.4 3.4 V 3.2 3.2 max Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Boldface limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) VOS Input Offset Voltage V + = 5V 0.9 mV max TCVOS Input Offset Voltage 2.0 µV/˚C Average Drift I B Input Bias Current (Note 9) 0.1 1 1 pA 20 20 max IOS Input Offset Current (Note 9) 0.01 0.5 0.5 pA 10 10 max RIN Input Resistance >10 Tera Ω CMRR Common Mode 0V ≤ VCM ≤ 5V 85 70 60 dB Rejection Ratio min +PSRR Positive Power Supply 5V ≤ V+ ≤10V, 85 70 60 dB Rejection Ratio V − = 0V, VO = 2.5V min −PSRR Negative Power Supply −5V ≤ V− ≤−10V, 85 70 60 dB Rejection Ratio V − = 0V, VO = −2.5V min VCM Input Common-Mode V + = 5V −0.3 −0.20 −0.20 V Voltage Range For CMRR ≥ 50 dB 0.00 0.00 min 5.25 5.20 5.20 V 5.00 5.00 max CIN Common-Mode Input 3 pF Capacitance V O Output Swing V + = 5V 4.99 4.98 4.98 Vmin RL = 100 kΩ 0.01 0.02 0.02 Vmax V+ = 5V 4.98 4.9 4.9 Vmin RL =1 0k Ω 0.02 0.1 0.1 Vmin ISC Output Short Circuit Sourcing, V O =0 V 7 5 5 m A Current 3.5 3.5 min Sinking, VO =3 V 7 5 5 m A 3.5 3.5 min AVOL Voltage Gain Sourcing 500 V/mv min Sinking 200 V/mv min IS Supply Current V + = +5V, 25 µA VO =V +/2 max LMC7111 www.national.com 4

Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Boldface limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) SR Slew Rate Positive Going Slew Rate 0.027 0.015 0.010 V/µs (Note 8) GBW Gain-Bandwidth Product 50 kHz Note 10: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Ch aracteristics. Note 11: Human body model, 1.5 k Ω in series with 100 pF. Note 12: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceed ing the maximum allowed junction temperature at 150˚C. Note 13: The maximum power dissipation is a function of T J(max), θJA and TA. The maximum allowable power dissipation at any ambient temperature is P D = (TJ(max) −T A)/θJA. All numbers apply for packages soldered directly into a PC board. Note 14: Typical Values represent the most likely parametric norm. Note 15: All limits are guaranteed by testing or statistical analysis. Note 17: Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive slew rate. The negative slew rate is faster. Input referred, V+ = 5V and R L = 100 kΩ connected to 1.5V. Amp excited with 1 kHz to produce V O =1V PP. Note 18: Bias Current guaranteed by design and processing. Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 10V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) VOS Input Offset Voltage V + = 10V 0.9 3 7 mV 59 max TCVOS Input Offset Voltage 2.0 µV/˚C Average Drift I B Input Bias Current 0.1 1 1 pA 20 20 max IOS Input Offset Current 0.01 0.5 0.5 pA 10 10 max RIN Input Resistance >10 Tera Ω +PSRR Positive Power Supply 5V ≤ V+ ≤10V, 80 dB Rejection Ratio V − = 0V, VO = 2.5V min −PSRR Negative Power Supply −5V ≤ V− ≤−10V, 80 dB Rejection Ratio V − = 0V, VO = 2.5V min VCM Input Common-Mode V + = 10V −0.2 −0.15 −0.15 V Voltage Range For CMRR ≥ 50 dB 0.00 0.00 min 10.2 10.15 10.15 V 10.00 10.00 max CIN Common-Mode Input 3 pF Capacitance I SC Output Short Circuit Sourcing, V O =0 V 3 0 2 0 2 0 m A Current (Note 9) 77 min Sinking, VO = 10V 30 20 20 mA 77 min LMC7111 www.national.com5

Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 10V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) AVOL Voltage Gain Sourcing 500 V/mv 100 kΩ Load min Sinking 200 V/mv min I S Supply Current V + = +10V, 25 50 60 µA VO =V +/2 65 75 max VO Output Swing V + = 10V 9.99 9.98 9.98 Vmin RL = 100 kΩ 0.01 0.02 0.02 Vmax V+ = 10V 9.98 9.9 9.9 Vmin RL =1 0k Ω 0.02 0.1 0.1 Vmin Unless otherwise specified, all limits guaranteed for T J = 25˚C, V+ = 10V, V− = 0V, VCM =V O =V +/2 and RL > 1M Ω. Bold- face limits apply at the temperature extremes. Typ LMC7111AI LMC7111BI Symbol Parameter Conditions (Note 5) Limit Limit Units (Note 6) (Note 6) SR Slew Rate (Note 8) 0.03 V/µs GBW Gain-Bandwidth Product 50 kHz φ m Phase Margin 50 deg Gm Gain Margin 15 dB Input-Referred f = 1 kHz 110 Voltage Noise V CM =1 V Input-Referred f = 1 kHz 0.03 Current Noise Note 19: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Ch aracteristics. Note 20: Human body model, 1.5 k Ω in series with 100 pF. Note 21: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceed ing the maximum allowed junction temperature at 150˚C. Note 22: The maximum power dissipation is a function of T J(max), θJA and TA. The maximum allowable power dissipation at any ambient temperature is P D = (TJ(max) −T A)/θJA. All numbers apply for packages soldered directly into a PC board. Note 23: Typical Values represent the most likely parametric norm. Note 24: All limits are guaranteed by testing or statistical analysis. Note 25: V+ = 10V, VCM = 5V and R L connected to 5V. For Sourcing tests, 5V ≤ VO ≤ 10V. For Sinking tests, 0.5V ≤ VO ≤ 5V. Note 26: Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive and negative slew rates. Input referred, V+ = 10V and RL = 100 kΩ connected to 5V. Amp excited with 1 kHz to produce V O =2V PP. Note 27: Operation near absolute maximum limits will adversely affect reliability. LMC7111 www.national.com 6

Typical Performance Characteristics TA = 25˚C unless specified, Single Supply Supply Current vs. Supply Voltage Voltage Noise vs. Frequency 01235203 01235204 2.7V Performance Offset Voltage vs. Common Mode Voltage @ 2.7V Sinking Output vs. Output Voltage 01235268 01235220 Sourcing Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 2.7V 01235221 01235222 LMC7111 www.national.com7

2.7V Performance (Continued) Gain and Phase vs. Capacitive Load @ 2.7V Gain and Phase vs. Capacitive Load @ 2.7V 01235223 01235224 3V Performance Voltage Noise vs. Common Mode Voltage @ 3V Output Voltage vs. Input Voltage @ 3V 01235225 01235226 Offset Voltage vs. Common Mode Voltage @ 3V Sourcing Output vs. Output Voltage 01235227 01235228 LMC7111 www.national.com 8

3V Performance (Continued) Sinking Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 3V 01235229 01235230 Gain and Phase vs. Capacitive Load @ 3V Gain and Phase vs. Capacitive Load @ 3V 01235231 01235232 5V Performance Voltage Noise vs. Common Mode Voltage @ 5V Output Voltage vs. Input Voltage @ 5V 01235233 01235234 LMC7111 www.national.com9

5V Performance (Continued) Offset Voltage vs. Common Mode Voltage @ 5V Sourcing Output vs. Output Voltage 01235235 01235236 Sinking Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 5V 01235237 01235238 Gain and Phase vs. Capacitive Load @ 5V Gain and Phase vs. Capacitive Load @ 5V 01235239 01235240 LMC7111 www.national.com 10

5V Performance (Continued) Non-Inverting Small Signal Pulse Response at 5V Non-Inverting Small Signal Pulse Response at 5V 01235241 01235242 Non-Inverting Small Signal Pulse Response at 5V Non-Inverting Large Signal Pulse Response at 5V 01235243 01235244 Non-Inverting Large Signal Pulse Response at 5V Non-Inverting Large Signal Pulse Response at 5V 01235245 01235246 LMC7111 www.national.com11

5V Performance (Continued) Inverting Small Signal Pulse Response at 5V Inverting Small Signal Pulse Response at 5V 01235247 01235248 Inverting Small Signal Pulse Response at 5V Inverting Large Signal Pulse Response at 5V 01235249 01235250 Inverting Large Signal Pulse Response at 5V Inverting Large Signal Pulse Response at 5V 01235251 01235252 LMC7111 www.national.com 12

Voltage Noise vs. Common Mode Voltage @ 10V Output Voltage vs. Input Voltage @ 10V 01235253 01235254 Offset Voltage vs. Common Mode Voltage @ 10V Sourcing Output vs. Output Voltage 01235255 01235256 Sinking Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 10V 01235257 01235258 LMC7111 www.national.com13

10V Performance (Continued) Gain and Phase vs. Capacitive Load @ 10V Gain and Phase vs. Capacitive Load @ 10V 01235259 01235260 Non-Inverting Small Signal Pulse Response at 10V Non-Inverting Large Signal Pulse Response at 10V 01235261 01235262 Inverting Small Signal Pulse Response at 10V Inverting Large Signal Pulse Response at 10V 01235263 01235264 LMC7111 www.national.com 14

Application Information

1.0 BENEFITS OF THE LMC7111

The small footprint of the SOT 23-5 packaged Tiny amp, (0.120 x 0.118 inches, 3.05 x 3.00 mm) saves space on printed circuit boards, and enable the design of smaller electronic products. Because they are easier to carry, many customers prefer smaller and lighter products. Height The height (0.056 inches, 1.43 mm) of the Tiny amp makes it possible to use it in PCMCIA type III cards. Signal Integrity Signals can pick up noise between the signal source and the amplifier. By using a physically smaller amplifier package, the Tiny amp can be placed closer to the signal source, reducing noise pickup and increasing signal integrity. The Tiny amp can also be placed next to the signal destination, such as a buffer for the reference of an analog to digital converter. Simplified Board Layout The Tiny amp can simplify board layout in several ways. First, by placing an amp where amps are needed, instead of routing signals to a dual or quad device, long pc traces may be avoided. By using multiple Tiny amps instead of duals or quads, complex signal routing and possibly crosstalk can be re- duced. DIPs available for prototyping LMC7111 amplifiers packaged in conventional 8-pin dip packages can be used for prototyping and evaluation without the need to use surface mounting in early project stages. Low Supply Current The typical 25 µA supply current of the LMC7111 extends battery life in portable applications, and may allow the reduc- tion of the size of batteries in some applications. Wide Voltage Range The LMC7111 is characterized at 2.7V, 3V, 3.3V, 5V and 10V. Performance data is provided at these popular voltages. This wide voltage range makes the LMC7111 a good choice for devices where the voltage may vary over the life of the batteries.

2.0 INPUT COMMON MODE

The LMC7111 does not exhibit phase inversion when an input voltage exceeds the negative supply voltage. The absolute maximum input voltage is 300 mV beyond either rail at room temperature. Voltages greatly exceeding this maximum rating can cause excessive current to flow in or out of the input pins, adversely affecting reliability. Applications that exceed this rating must externally limit the maximum input current to ±5 mA with an input resistor as shown in Figure 1.

3.0 CAPACITIVE LOAD TOLERANCE

The LMC7111 can typically directly drive a 300 pF load with VS = 10V at unity gain without oscillating. The unity gain follower is the most sensitive configuration. Direct capacitive loading reduces the phase margin of op-amps. The combi- nation of the op-amp’s output impedance and the capacitive load induces phase lag. This results in either an under- damped pulse response or oscillation. Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 2. This simple tech- nique is useful for isolating the capacitive input of multiplex- ers and A/D converters.

4.0 COMPENSATING FOR INPUT CAPACITANCE WHEN

USING LARGE VALUE FEEDBACK RESISTORS When using very large value feedback resistors, (usually > 500 kΩ) the large feed back resistance can react with the input capacitance due to transducers, photodiodes, and cir- cuit board parasitics to reduce phase margins. The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor (as in Figure 3), C f is first estimated by: or R1 CIN ≤ R2 Cf which typically provides significant overcompensation. Printed circuit board stray capacitance may be larger or smaller than that of a breadboard, so the actual optimum value for C F may be different. The values of C F should be checked on the actual circuit. (Refer to the LMC660 quad CMOS amplifier data sheet for a more detailed discussion.) 01235214 FIGURE 1. RI Input Current Protection for FIGURE 2. Resistive Isolation

5.0 OUTPUT SWING

transistors which are connected to the same power supply. transistors all the way on or all the way off.

6.0 BIASING GaAs RF AMPLIFIERS

providing a stable negative bias to other integrated circuits. ence take up very little board space.

7.0 REFERENCE BUFFER FOR A-TO-D CONVERTERS

reduced input voltage offset. FIGURE 3. Cancelling the Effect of Input Capacitance CF and Risolation prevent oscillations when driving capacitive loads. FIGURE 4. Stable Negative Bias

Application Information (Continued)

8.0 DUAL AND QUAD DEVICES WITH SIMILAR

The LMC6462 and LMC6464 are dual and quad devices with performance similar to the LMC7111. They are available in both conventional through-hole and surface mount packag- ing. Please see the LMC6462/4 datasheet for details.

9.0 SPICE MACROMODEL

A SPICE macromodel is available for the LMC7111. This model includes simulation of:  Input common-mode voltage range  Frequency and transient response  Quiescent and dynamic supply current  Output swing dependence on loading conditions and many more characteristics as listed on the macro model disk. Contact your local National Semiconductor sales office to obtain an operational amplifier spice model li- brary disk.

10.0 ADDITIONAL SOT23-5 TINY

National Semiconductor has additional parts available in the space saving SOT23 Tiny package, including amplifiers, voltage references, and voltage regulators. These devices include — LMC7101 1 MHz gain-bandwidth rail-to-rail input and output amplifier — high input impedance and high gain, 700 µA typical current 2.7V, 3V, 5V and 15V specifications. LM7131 Tiny Video amp with 70 MHz gain bandwidth. Specified at 3V, 5V and ± 5V supplies. LMC7211 Comparator in a tiny package with rail-to-rail in- put and push-pull output. Typical supply current of 7 µA. Typical propagation delay of 7 µs. Speci- fied at 2.7V, 5V and 15V supplies. LMC7221 Comparator with an open drain output for use in mixed voltage systems. Similar to the LMC7211, except the output can be used with a pull-up resistor to a voltage different than the supply voltage. LP2980 Micropower SOT 50 mA Ultra Low-Dropout Regulator. LM4040 Precision micropower shunt voltage reference. Fixed voltages of 2.5000V, 4.096V, 5.000V, 8.192V and 10.000V. LM4041 Precision micropower shunt voltage reference 1.225V and adjustable. Contact your National Semiconductor representative for the latest information. LMC7111 www.national.com17

Tape Section # Cavities Cavity Status Cover Tape Status Leader 0 (min) Empty Sealed (Start End) 75 (min) Empty Sealed Carrier 3000 Filled Sealed

1000 Filled Sealed

Trailer 125 (min) Empty Sealed (Hub End) 0 (min) Empty Sealed TAPE DIMENSIONS 01235215 Tape Size DIM A DIM Ao DIM B DIM Bo DIM F DIM Ko DIM P1 DIM W LMC7111 www.national.com 18

Specification (Continued) REEL DIMENSIONS 01235216 Tape Size A B C D N W1 W2 W3 LMC7111 www.national.com19

Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SOT23 8-Pin Molded DIP 8-Lead (0.300" Wide) Molded Dual-In-Line Package LMC7111 www.national.com 20

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at: www.national.com/quality/green. Lead free products are RoHS compliant. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com LMC7111 Tiny CMOS Operational Amplifier with Rail-to-Rail Input and Output