100LVEL11

100LVEL11 FAIRCHILD | Alldatasheet

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I Typical propagation delay of 330 ps I Typical IEE of 24 mA I Typical skew of 5 ps between outputs I Internal pull-down resistors on D I Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8 I Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up tests I Moisture Sensitivity Level 1 I ESD Performance: Human Body Model > 2000V Machine Model > 200V Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Top View Pin Descriptions Logic Diagram Order Number Package Product Package DescriptionNumber Code Top Mark 100LVEL11M M08A KVL11 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 100LVEL11M8 (Preliminary) MA08D KV11 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Pin Name Description Q 0, Q0, Q1, Q1 ECL Data Outputs D, D ECL Data Inputs VCC Positive Supply VEE Negative Supply

www.fairchildsemi.com 2 100LVEL11 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Input and output parameters vary 1 to 1 with VCC . VEE can vary ± 0.3V. Note 3: Outputs are terminated through a 50Ω Resistor to VCC − 2.0V. Note 4: VIHCMR minimum varies 1 to 1 with VEE . VIHCMR maximum varies 1-to-1 with VCC . The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPMIN and 1V. Note 5: Absolute value of the input HIGH and LOW current should not exceed the absolute value of the stated Min or Max specification. Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than 500LFPM maintained. PECL Supply Voltage (VCC ) VEE = 0V 0.0V to +8.0V NECL Supply Voltage (VEE ) VCC = 0V 0.0V to −8.0V PECL DC Input Voltage (VI) VEE = 0V 0.0V to +6.0V NECL DC Input Voltage (VI) VCC = 0V 0.0V to −6.0V DC Output Current (IOUT ) Continuous 50 mA Surge 100 mA Storage Temperature (TSTG ) −65°C to +150°C PECL Power Supply Operating (VEE = 0V) V CC = 3.0V to 3.8V NECL Power Supply Operating (VCC = 0V) V EE = −3.8V to −3.0V Free Air Operating Temperature (TA) −40°C to +85°C Symbol Parameter −40°C2 5 °C8 5 °C Units Min Typ Max Min Typ Max Min Typ Max IEE Power Supply Current 24 28 24 28 25 30 mA VOH Output HIGH Voltage (Note 3) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV VOL Output LOW Voltage (Note 3) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV VIH Input HIGH Voltage (Single Ended) 2135 2420 2135 2420 2135 2420 mV VIL Input LOW Voltage (Single Ended) 1490 1825 1490 1825 1490 1825 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 4) V V IIH Input HIGH Current (Note 5) 150 150 150 µA IIL Input LOW Current (Note 5) D 0.5 0.5 0.5 µA D −600 −600 −600

3 www.fairchildsemi.com 100LVEL11 Note 6: Input and output parameters vary 1 to 1 with VCC . VEE can vary ±0.3V. Note 7: Outputs are terminated through a 50Ω Resistor to VCC − 2.0V. Note 8: VIHCMR minimum varies 1-to-1 with VEE . VIHCMR maximum varies 1 to 1 with VCC . The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPMIN and 1V. Note 9: Absolute value of the input HIGH and LOW current should not exceed the absolute value of the stated Min or Max specification. Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than 500LFPM maintained. Note 10: VEE can vary ±0.3V. Note 11: Measured using a 750 mV input swing centered at VCC − 1.32V; 50% duty cycle clock source; tr = tf = 250 ps (20% - 80%) at fIN =1 MHz. All loading with 50Ω to VCC − 2.0V. Note 12: Within-device skew defined as identical transitions on similar paths through a device. Note 13: Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device under identical conditions. Symbol Parameter −40°C2 5 °C8 5 °C Units Min Typ Max Min Typ Max Min Typ Max IEE Power Supply Current 24 28 24 28 25 30 mA VOH Output HIGH Voltage (Note 7) −1085 −1005 −880 −1025 −955 −880 −1025 −955 −880 mV VOL Output LOW Voltage (Note 7) −1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV VIH Input HIGH Voltage (Single Ended)−1165 −880 −1165 −880 −1165 −880 mV VIL Input LOW Voltage (Single Ended)−1810 −1475 −1810 −1475 −1810 -1475 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 8) V IIH Input HIGH Current (Note 9) 150 150 150 µA IIL Input LOW Current (Note 9) D 0.5 0.5 0.5 µA D −600 −600 −600 Symbol Parameter −40°C2 5 °C8 5 °C Units Figure Min Typ Max Min Typ Max Min Typ Max Number fMAX Maximum Toggle Frequency 1 1 1 GHz tPLH , tPHL Propagation Delay to Output 215 385 235 330 405 250 435 ps Figure 1 tSKEW Within Device Skew (Note 12) 5 20 5 20 5 20 ps Duty Cycle Skew (Note 13) 5 20 5 20 5 20 tJITTER Cycle-to-Cycle Jitter TBD TBD TBD VPP Input Swing 200 1000 200 1000 200 1000 mV Figure 1 tr, tf Output Rise Times Q (20% to 80%) 120 320 120 320 120 320 ps Figure 2

5 www.fairchildsemi.com 100LVEL11 Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M08A

www.fairchildsemi.com 6 100LVEL11 3.3V ECL 1:2 Differential Fanout Buffer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com