STSJ100NH3LL_05 STMICROELECTRONICS | Alldatasheet

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Table 3: Absolute Maximum ratings Table 4: Thermal Data Table 5: Avalanche Characteristics ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) Table 6: On /Off Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VGS Gate- source Voltage ± 16 V ID (2) Drain Current (continuous) at TC = 25°C 100 A ID (1) Drain Current (continuous) at TC = 25°C 25 A ID Drain Current (continuous) at TC = 100°C 15.6 A IDM (3) Drain Current (pulsed) 100 A Ptot(2) Total Dissipation at TC = 25°C 70 W Ptot(1) Total Dissipation at TC = 25°C 3 W Rthj-c Rthj-pcb(4) Tj Tstg Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Operating Junction Temperature Storage Temperature Max Max 1.8 150 -55 to 150 °C/W °C/W Symbol Parameter Max Value Unit IAV Not-Repetitive Avalanche Current (pulse width limited by Tj max) 12.5 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAV, VDD = 24 V) 1.3 J Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250µA, VGS = 0 30 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS =Max Rating ,TC = 125°C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 16V ±100 nA VGS(th) Gate Threshold VoltageVDS = VGS , ID = 250µA 1 V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 12.5A VGS = 4.5V, ID = 12.5A 0.0032 0.004 0.0035 0.005 Ω Ω

ELECTRICAL CHARACTERISTICS (CONTINUED) Table 7: Dynamic Table 8: Switching On Table 9: Switching Off Table 10: Source Drain Diode Notes 1. This value is noted according to Rthj-pcb 2. This value is noted according to Rthj-c 3. Pulse width limited by safe operating area 4. When Mounted on 1 inch² FR-4 board, 2 oz Cu (t ≤ 10 sec.) 5. Pulsed: pulse duration=300µs, duty cycle 1.5% Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (5) Forward Transconductance VDS =10V, ID = 12.5A 30 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 4450 655 pF pF pF R G Gate Input Resistance f=1MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 1 2 3 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 15V, ID = 12.5A R G = 4.7Ω , VGS = 10V (see Figure 15) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD =15V, ID =25A VGS =4.5V (see Figure 17) 12.5 40 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 15V, ID = 12.5A R G = 4.7Ω , VGS = 10V (see Figure 15) ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM Source-drain Current Source-drain Current (pulsed) 100 A A VSD (5) Forward On Voltage ISD = 25A ,VGS = 0 1.3 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 25A, di/dt = 100A/µs VDD = 25V, Tj = 150°C (see Figure 16) 2.1 ns nC A

Table 11: Allowable Iav vs. Time in Avalanche The previous curve gives the single pulse safe operating area for unclamped inductive loads, under the following conditions: PD(AVE) =0.5*(1.3*BVDSS *IAV ) EAS(AR) =PD(AVE) *tAV Where: IAV is the Allowable Current in Avalanche PD(AVE) is the Average Power Dissipation in Avalanche (Single Pulse) tAV isthe Time in Avalanche

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at:

DIM. mm. inch A 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45° (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 e4 2.79 0.110 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M0 . 6 0 . 0 2 3 S8 ° ( m a x . ) PowerSO-8™ MECHANICAL DATA

Table 12: Revision History Date Revision Description of Changes 14-Sep-2004 2 Preliminary Data. 23-May-2005 3 New values on table 5 29-Jun-2005 4 New R G value on table 6 16-Nov-2005 5 Complete version

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America