082AC

TL082 STMICROELECTRONICS | Alldatasheet

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Technical content

n WIDE COMMON-MODE (UP TO V CC +) AND DIFFERENTIAL VOLTAGE RANGE n LOW INPUT BIAS AND OFFSET CURRENT n OUTPUT SHORT-CIRCUIT PROTECTION n HIGH INPUT IMPEDANCE J–FET INPUT STAGE n INTERNAL FREQUENCY COMPENSATION n LATCH UP FREE OPERATION n HIGH SLEW RATE : 16V/µs (typ)

DESCRIPTION

The TL082, TL082A and TL082B are high speed J–FET input dual operational amplifiers incorpo- rating well matched, high voltage J–FET and bipo- lar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset current, and low offset voltage temper- ature coefficient. ORDER CODE N= Dual in Line Package (DIP) D= Small Outline Package (SO) - also available in Tape & Reel (DT) P= Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) PIN CONNECTIONS (top view) Part Number Temperature Range Package NDP TL082M/AM/BM -55 °C, +125°C ••• TL082I/AI/BI -40 °C, +105°C ••• TL082C/AC/BC 0 °C, +70°C ••• Example :TL082CD, TL082IN N DIP8 (Plastic Package) D SO8 (Plastic Micropackage) P TSSOP8 (Thin Shrink Small Outline Package) + - 1 - Offset null 1 2 - Inverting input 1 3 - Non-inverting input 1 4-V CC 5 - Non-inverting input 2 6 - Inverting input 2 7 - Output 2 8-V CC TL082 TL082A - TL082B GENERAL PURPOSE J-FET DUAL OPERATIONAL AMPLIFIERS March 2002

Symbol Parameter TL082M, AM, BM TL082I, AI, BI TL082C, AC, BC Unit VCC Supply voltage - note1) 1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC + and VCC ± 18 V Vi Input Voltage - note2) 2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. ± 15 V Vid Differential Input Voltage - note3) 3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. ± 30 V Ptot Power Dissipation 680 mW Output Short-circuit Duration - note4) 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded Infinite Toper Operating Free-air Temperature Range -55 to +125 -40 to +105 0 to +70 °C Tstg Storage Temperature Range -65 to +150 °C Output Non-inverting input Inverting input VCC VCC 200 ΩΩ100 Ω100 1.3k 1/2 TL08230k 35k 35k Ω1001.3k 8.2k

ELECTRICAL CHARACTERISTICS

VCC = ±15V, Tamb = +25°C (unless otherwise specified) Symbol Parameter TL082I,M,AC,AI,AM, BC,BI,BM TL082C Unit Vio Input Offset Voltage (Rs = 50Ω ) Tamb = +25°C TL082 TL082A TL082B Tmin ≤ Tamb ≤ Tmax TL082 TL082A TL082B 31 0 mV DV io Input Offset Voltage Drift 10 10 µV/°C Iio Input Offset Current - note1) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 51 0 0 5 100 pA nA Iib Input Bias Current -note 1 Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 20 200 20 400 pA nA Avd Large Signal Voltage Gain (R L =2 kΩ ,Vo = ±10V) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 200 25 200 V/mV SVR Supply Voltage Rejection Ratio (RS = 50Ω) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 86 70 dB ICC Supply Current, no load Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 1.4 2.5 2.5 1.4 2.5 2.5 mA V icm Input Common Mode Voltage Range ± 11 +15 -12 ±11 +15 -12 V CMR Common Mode Rejection Ratio (RS = 50Ω) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 86 70 dB Ios Output Short-circuit Current Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 40 60 40 60 mA ±Vopp Output Voltage Swing Tamb = +25°CR L = 2 k Ω RL = 10kΩ Tmin ≤ Tamb ≤ Tmax RL = 2kΩ RL = 10kΩ 13.5 13.5 V SR Slew Rate (Tamb = +25°C) Vin= 10V, RL =2 kΩ ,C L = 100pF, unity gain 8 16 8 16 V/µs tr Rise Time (Tamb = +25°C) Vin= 20mV, RL =2 kΩ ,C L = 100pF, unity gain 0.1 0.1 µs Kov Overshoot (Tamb = +25°C) Vin= 20mV, RL =2 kΩ ,C L = 100pF, unity gain 10 10 GBP Gain Bandwidth Product (Tamb = +25°C) Vin= 10mV, RL =2 kΩ ,C L = 100pF, f= 100kHz 2.5 4 2.5 4 MHz R i Input Resistance 1012 1012 Ω

Total Harmonic Distortion (Tamb = +25°C), f= 1kHz, RL =2 kΩ ,CL = 100pF, Av = 20dB, Vo =2 Vpp 0.01 0.01 en Equivalent Input Noise Voltage R S = 100Ω, f = 1KHz 15 15 ∅ m Phase Margin 45 45 degrees Vo1/Vo2 Channel Separation Av = 100 120 120 dB 1. The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature. Symbol Parameter TL082I,M,AC,AI,AM, BC,BI,BM TL082C Unit nV Hz

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus FREQUENCY MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus FREQUENCY MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus LOAD RESISTANCE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus FREQUENCY MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus FREE AIR TEMP. MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE versus SUPPLY VOLTAGE 02 4 68 1 0 12 14 16 MAXIMUM PEAK-TO-PEAKOUTPUT VOLTAGE (V) R L =1 0kΩ Tamb = +25°C SUPPLY VOLTAGE ( V)

INPUT BIAS CURRENT versus FREE AIR TEMPERATURE LARGE SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT versus FREQUENCY SUPPLY CURRENT PER AMPLIFIER versus FREE AIR TEMPERATURE LARGE SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION versus FREE AIR TEMP . TOTAL POWER DISSIPATION versus FREE AIR TEMPERATURE SUPPLY CURRENT PER AMPLIFIER versus SUPPLY VOLTAGE 100 0.1 0.01 INPUT BIAS CURRENT (nA) -50 -25 0 25 50 75 100 125 TEMPERATURE ( °C) V CC = 15V FREQUENCY (Hz) DIFFERENTIAL VOLTAGE AMPLIFICATION (V/V) 100 100 1K 10K 100K 10M 1M DIFFERENTIAL VOLTAGE AMPLIFICATION (left scale) 180 R= 2 k Ω C = 100pF V= 1 5 V T = +125 C L L CC amb PHASE SHIFT (right s ca le) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 SUPPLY CURRENT (mA) -75 -50 -25 0 25 50 75 100 125 TEMPERATURE ( °C) V CC = 15V No signa l No load 1000 400 200 100 DIFFERENTIAL VOLTAGE AMPLIFICATION (V/V) -75 -50 -25 0 25 50 75 100 125 TEMPERATURE ( °C) R L =2 kΩ V O = 10V V CC = 15V 250 225 200 175 150 125 100 TOTAL POWER DISSIPATION (mW)-75 -50 -25 0 25 50 75 100 125 TEMPERATURE ( °C) V CC = 15V No signal No load 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 SUPPLYCURRENT (mA) 24 6 8 10 12 14 16 No signal No load = +25°CTamb SUPPLY VOLTAGE ( V)

COMMON MODE REJECTION RATIO versus FREE AIR TEMPERATURE OUTPUT VOLTAGE versus ELAPSED TIME VOLTAGE FOLLOWER LARGE SIGNAL PULSE RESPONSE EQUIVALENT INPUT NOISE VOLTAGE versus FREQUENCY TOTAL HARMONIC DISTORTION versus FREQUENCY -50 -25 0 25 50 75 100 125 COMMON MODE MODE REJECTION RATIO (dB) TEMPERATURE ( °C) -75 R L =1 0k Ω =1 5 VV CC tr OUTPUT VOLTAGE (mV) TIME (µs) 10% 90% OVER SH OO T R L=2 kΩ Tamb =+ 2 5°C V CC = 15V 0 0.5 1 1.5 2 2.5 3 3.5 INPUT AND OUTPUT VOLTAGES (V) TIME (µs) =1 5 VV CC R L =2k Ω = 100pFC L Tamb =+ 2 5 C OUTPUT INP UT EQUIVALENTINPUT NOISE VOLTAGE (nV/VHz) 10 40 100 400 1k 4k 10k 40k 100k FREQUENCY (Hz) A V =1 0 R S = 100Ω Tamb = +25°C VCC = 15V 0.4 0.1 0.04 0.01 0.004 0.001 TOTAL HARMONIC DISTORTION (%) 100 400 1k 4k 10k 40k 100k FREQUENCY (Hz) A V =1 T amb = +25°C V CC = 15V =6 VV O (rms) A V =1 T amb = +25°C =6 VV O (rms) V CC = 15V

PARAMETER MEASUREMENT INFORMATION Figure 1 :Voltage Follower Figure 2 :Gain-of-10 Inverting Amplifier TYPICAL APPLICATIONS 100KHz QUADRUPLE OSCILLATOR -eI TL082 R L C L= 100pF 1k Ω 10k Ω eo -TL082 TL082 18pF 88.4kΩ 18pF 88.4kΩ 88.4kΩ 18pF 1N 4148 1N 4148 18k Ω * -15V 1k Ω 1k Ω 18k Ω * +15V 6 cosω t 6 sinω t * These resistors values may be adjusted for a symmetrical output

8 PINS - PLASTIC DIP

Dim. Millimeters Inches A 3.32 0.131 a1 0.51 0.020 B 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 D 10.92 0.430 E 7.95 9.75 0.313 0.384 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 6.6 0260 i 5.08 0.200 L 3.18 3.81 0.125 0.150 Z 1.52 0.060

8 PINS - PLASTIC MICROPACKAGE (SO)

Dim. Millimeters Inches A 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.020 c1 45 ° (typ.) D 4.8 5.0 0.189 0.197 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.150 0.157 L 0.4 1.27 0.016 0.050 M 0.6 0.024 S8 ° (max.) b A s L C E D M 8 5 1 4 F

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8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE

Dim. Millimeters Inches A 1.20 0.05 A1 0.05 0.15 0.01 0.006 b 0.19 0.30 0.007 0.15 c 0.09 0.20 0.003 0.012 E 6.40 0.252 e 0.65 0.025 k0 ° 8° 0° 8° L1 1.000 0.039 C L 8 5 c 0.25mm .010 inch GAGE PLANE k L E SEATING PLANE A D b PIN 1 IDENTIFICATION e