02069-DSH-001-D

02069-DSH-001-D MA-COM | Alldatasheet

Document overview

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Technical content

Features

 High speed operation; suitable for SFP/SFF applications from 155Mbps to 4.3 Gbps.  Supports Common Anode VCSEL, Common Cathode VCSEL, or FP LASER. May be used with or without a monitor photodiode.  Programmable temperature comp ensation. Modulation output and bias output can be controlled using the programmable module controller M02088 or a few discrete resistors.  Supports DDMI (SFF-8472) diagnostics.  DC or AC coupled modulation drive.  Peaking circuit to optimize VCSEL response.  Low overshoot allows high ex tinction ratio with low jitter.  Supports E-PON burst mode with no extra components  Automatic Laser Power Cont rol, with “Slow-Start”.  3.3V or 5V operation VCC3 -1.3V Internal 3.3V reg. Input Buf f er Output Buf f er Laser Driver Automatic Power Control (laser bias current) TX Disable Saf ety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ SVCC and IBOUT_CC OUT- OUT+ GND0 IBOUT_CA and SGND IPIN DISDLY DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwrMON DIN- DIN+ Internal Power Bus GND CC SEL

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Mindspeed Proprietary and Confidential M02069 Data Sheet

Ordering Information

Part Number Package Operating Temperature M02069-12 * QFN24 M02069-EVM Combination Electrical and Optical Evaluation board * The letter “G” designator after the part number indicates that the device is RoHS-compliant. Refer to www.mindspeed.com for additional information.

Revision History

A Advance October 2003 x Initial Release. B Advance November 2003 x Revision B Release. C Preliminary February 2004 x Revision C Release, Preliminary. D Released March 2005 x Revision D Release. New data sheet format. Changes to Absolute Maximum Ratings, Operating Temperature, AC and DC specifications. New section on video operation. Pin ConfigurationTypical Eye Diagram VCC DIN+ DIN- VCC3SEL MODMON BIASMON CAPC VCC3 PEAKADJ TCSLOPE FAIL RESET DISDLY TXPWRMON APCSET IPIN GND0 OUT+ OUT- SVCC/ IBOUTCC CCSEL MODSET IBOUTCA/ SGNDDIS 71 2 1924 GND, connect to PCB ground

4 X 4 mm

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1.0 Product Specification

1.1 Absolute Maximum Ratings

These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged. Reli - able operation at these extremes for any length of time is not implied. Table 1-1. Absolute Maximum Ratings Symbol Parameter Rating Units VCC Power supply voltage -0.4 to +6.0 V VCC3 3.3V power supply voltage -0.4 to +4.0 V TSTG Storage temperature -65 to +150 °C IBIASOUTCA (MAX) Maximum bias output current for common anode laser 75 mA IBIASOUTCC (MAX) Maximum bias output current for common cathode laser 30 mA IMODCA (MAX) Maximum modulation current for common anode laser 70 mA IMODCC (MAX) Maximum modulation current for common cathode laser 30 mA DIN+/- Data inputs -0.4 to VCC3 + 0.4 V DIS Disable input -0.4 to VCC + 0.4 V BIASMON, MODMON Bias and modulation output current mirror compliance voltage -0.4 to VCC3 + 0.4 V IPIN Photodiode anode voltage -0.4 to VCC3 + 0.4 V IPIN Sink or Source current 2.0 mA FAIL Status flag -0.4 to VCC + 0.4 V APCSET, MODSET Set inputs -0.4 to VCC3 + 0.4 V TCSLOPE Temperature compensation slope -0.4 to VCC3 + 0.4 V OUT+, OUT- Output -0.4 to VCC3 + 0.4 V

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Mindspeed Proprietary and Confidential M02069 Data Sheet

1.2 Recommended Operating Conditions

1.3 DC Characteristics

(VCC = +3.05V to +3.55V or 4.75V to 5.5V, TA = -40 °C to +95 °C, unless otherwise noted) Typical values for common anode are at VCC = 3.3 V, IBOUTCA = 20 mA, IMOD = 20 mA, TA = 25 °C, unless otherwise noted. Typical values for common cathode are at VCC = 3.3 V, IBOUTCC = 5 mA, IMOD = 5 mA, TA = 25 °C, unless otherwise noted Table 1-2. Recommended Operating Conditions Parameter Rating Units Power supply (VCC-GND) 3.3 ± 7.5% or 5.0 + 10%,-5% V Operating ambient -40 to + 95 °C Table 1-3. DC Characteristics Symbol Parameter Conditions Min. Typ. Max. Units ICC Supply current excluding IMOD and IBIAS PEAKADJ high (no peaking adjust) Common anode operation(1) Common cathode operation(1) Additional current when PEAKADJ is used. Additional current when operating from a 5V supply(2) mA IBOUTCA Bias current adjust range, common anode mode V(IBIASOUT) > 0.7V 1 50 mA IBOUTCC Bias current adjust range, common cathode mode V(IBIASOUT) < 2.5V 0.5 15 mA IBOFF Bias current with optical output disabled DIS = high V(IBOUTCA) = VCC3 for common anode operation. V(IBOUTCC) = 0V for common cathode operation. – – 150 µA Ratio of IBIAS current to BIASMON current CCSEL low, common anode mode CCSEL high, common cathode mode – 45.7 13.5 – A/A VMD Monitor diode reverse bias voltage 1.5 – – V IMD Monitor diode current adjustment range Adjusted with RAPCSET 10 – 1500 µA Ratio of TxPwrMON current to monitor photodiode current

1 A/A

02069-DSH-001-D Mindspeed Technologies™ 5 Mindspeed Proprietary and Confidential CMD_MAX Maximum monitor photodiode capacitance for APC loop stability. Includes all associated parasitic capacitances. 100 pF TTL/CMOS input high voltage (DIS) 2.0 – 5.5 V TTL/CMOS input low voltage (DIS) – – 0.8 V CMOS input high voltage (VCC3 SEL) 2.4 V CMOS input low voltage (VCC3 SEL) 1.2 V Logic output high voltage (FAIL) With external 10kΩ pull-up to VCC. VCC - 0.6 – – V Logic output low voltage (FAIL) For 6.8k to 10k ohm resistor when pulled up to 5V For 4.7k to 10k ohm resistor when pulled up to 3.3V – – 0.4 V RIN Differential input impedance Data inputs -- 6800 – Ω VSELF Self-biased common-mode input voltage -- VCC3 - 1.3 -- V VINCM Common-mode input compliance voltage Data inputs VCC3 - 1.45 – VCC3-[VIN(Diff)]/4 V VIN(DIFF) Differential input voltage = 2 x (DIN+HIGH - DIN+LOW) 200 – 2400 mVpp VCC3THL (3) 3.3V supply detection, lower threshold 2.5 2.8 2.9 V VCC3THH (3) 3.3V supply detection, upper threshold 3.65 3.8 4.1 V VCC5THL 5V supply detection, lower threshold 3.9 4.25 4.65 V VCC5THH 5V supply detection, upper threshold 5.45 5.8 6.2 V VREF1 Reference voltage for MOD SET 1.8 1.3 1.4 V VAPCSET Reference voltage for APCSET 1.35 V VBL Bias_OK lower voltage threshold 0.88 1.0 1.05 V Table 1-3. DC Characteristics Symbol Parameter Conditions Min. Typ. Max. Units

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Mindspeed Proprietary and Confidential M02069 Data Sheet

1.4 AC Characteristics

(VCC = 3.05 V to 3.55V or 4.7V to 5.5V, TA = -40 °C to +95 °C, unless otherwise noted) Typical values for common anode are at VCC = 3.3 V, IBOUTCA = 20 mA, IMOD = 20 mA, TA = 25 °C, unless otherwise noted. Typical values for common cathode are at VCC = 3.3 V, IBOUTCC = 5 mA, IMOD = 5 mA, TA = 25 °C, unless otherwise noted. VBH Bias_OK upper voltage threshold 1.45 1.6 1.7 V VFAULTL (4) Lower voltage threshold for fault inputs IBOUT CA, OUT+, CAPC, and MODSET FAIL asserts if any of these signals fall below this value. 300 400 mV VFAULTH (5) Upper voltage threshold for fault inputs IBOUT CC FAIL asserts if any of these signals fall above this value. 2.6 2.9 VCC3 - 0.2 V VSELFL Self bias voltage for IBOUTCA and OUT+ During disable state 0.5 1.65 2.0 V VSELFH Self bias voltage for IBOUTCC During disable state 0 1.25 V Notes: 1. Excludes bias and modulation currents. 2. Bias and modulation currents add directly to power supply current in 5V applications. The additional supply current noted excludes these currents. 3. VCC3 “supply OK” circuitry monitors the internally regulated 3.3V supply when VCC = 5V (VCC3SEL =low). When VCC = 3.3V, VCC3 “supply OK” circuitry monitors VCC (VCC3SEL =high). 4. A low level at IBOUTCA does not trigger a fault condition during common cathode operation. 5. A low level at IBOUTCC does not trigger a fault condition during common anode operation. Table 1-4. AC Characteristics Symbol Parameter Conditions Min. Typ. Max. Units. IMOD Modulation current adjust range Common Cathode Mode OUT+ and OUT- AC coupled into 50Ω load. Common Anode Mode OUT+ and OUT- DC coupled into 25Ω load.(1) – 15 mA IMOD(OFF) (2) Modulation current with output disabled DIS = high – – 150 µA Ratio of modulation current to MOD MON current CCSEL = high, RLOAD = 50Ω CCSEL = low – 30 – A/A IMOD-TC Programmable range for modulation current temperature coefficient Adjustable using TCSLOPE 0 – 104 ppm/°C TTCSTART Temperature at which modulation current TC compensation enables 20 °C Table 1-3. DC Characteristics Symbol Parameter Conditions Min. Typ. Max. Units

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1.5 Safety Logic Timing

(VCC = 3.05 V to 3.55V or 4.7V to 5.5V, TA = -40 °C to +95 °C, unless otherwise noted) Typical values for common anode are at VCC = 3.3 V, IBOUTCA = 20 mA, IMOD = 20 mA, TA = 25 °C, unless otherwise noted. Typical values for common cathode are at VCC = 3.3 V, IBOUTCC = 5 mA, IMOD = 5 mA, TA = 25 °C, unless otherwise noted. tr Modulation output rise time 20% to 80% into 25 Ω(3). For IMOD from 3 mA to 30 mA. Measured using 11110000 pattern at 2.5Gbps. – 67 80 ps tf Modulation output fall time – 67 80 ps OSOFF Overshoot of modulation output current in the “off” direction into 25 Ω load -- 1 2 % RJ Random jitter – 0.8 – psrms DJ Deterministic jitter K28.5 pattern at 4.3 Gbps (includes pulse width distortion) 10 23 pspp Notes: 1. Minimum voltage at OUT+ > 0.7V. 2. The current through the laser in this state can be made negligible by adding a 1k Ω or less resistor in parallel with the laser. 3. The M02069 is designed to drive 25Ω loads. External resistance should be added in series or parallel to the Laser to create this load impedance. In common cathode mode, 50Ω resistors internal to the M02069 are in parallel with the laser.. Table 1-5. Safety Logic Timing Symbol Parameter Conditions Min. Typ. Max. Units. t_off DIS assert time Rising edge of DIS to fall of output signal below 10% of nominal(1) 10 µs t_on DIS negate time Falling edge of DIS to rise of output signal above 90% of nominal(1) 1 ms t_init Time to initialize(2) Includes reset of FAIL; from power on after Supply_OK or from negation of DIS during reset of FAIL condition 2 3 5 ms t_fault Laser fault time - from fault condition to assertion of FAIL From occurrence of fault condition or when Supply_OK is beyond specified range 100 µs t_reset DIS time to start reset DIS or ENA pulse width required to initialize safety circuitry or reset a latched fault 10(3) µs t_onBM DIS negate (turn-on) time during burst-mode operation Using integrated switch at SVCC (3.3V operation) (4) 300 500 ns t_offBM DIS assert (turn-off) time during burst-mode operation Using integrated switch at SVCC (3.3V operation) (4) 200 500 ns Notes: 1. With CAPC = 2.2nF 2. User-adjustable. Specifications reflect timing with no external RESET capacitor. 3. With < 1nF capacitor from RESET pin to ground. 4. Imod > 12mA Table 1-4. AC Characteristics Symbol Parameter Conditions Min. Typ. Max. Units.

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Mindspeed Proprietary and Confidential M02069 Data Sheet Figure 1-1. Safety Logic Timing Characteristics Hot Plug (DIS Low) VCC3 and VCC5 status FAIL DIS LASER OUTPUT (low) (low) VCC3 and VCC5 “OK” t_on < 1ms, (300 us typ.) Slow Rise on Vcc=3.3V at Power-up (DIS Low) VCC3 FAIL DIS LASER OUTPUT (low) (low) 3.3V t_on < 1ms, (300 us typ.) VCC 3.3V FAIL state at power-up will depend on pull-up voltage

02069-DSH-001-D Mindspeed Technologies™ 9 Mindspeed Proprietary and Confidential Slow Rise on Vcc=5V at Power-up (DIS Low) Transmitter Enable (DIS transition Low) VCC3 FAIL DIS LASER OUTPUT (low) (low) 3.3V t_on < 1ms, (300 us typ.) VCC 5V VCC3 and VCC5 status FAIL DIS LASER OUTPUT (low) (low) VCC3 and VCC5 “OK” t_on < 1ms, (300 us typ.) (high) Fault Recovery BehaviourTransmitter Disable (DIS transition high) VCC3 and VCC5 status FAIL DIS LASER OUTPUT (low) VCC3 and VCC5 “OK” t_off < 10 us, (1 us typ.) (high) Fault recovery at: MODSET. CAPC, OUT+, IBOUTCA or IBOUTCC FAIL DIS LASER OUTPUT Fault Removed t_reset, 10 us, min. FAIL remains high until reset by DIS going high t_on < 1ms

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Mindspeed Proprietary and Confidential M02069 Data Sheet Figure 1-2. Relationship Between Data Inputs and Modulation Outputs Response to Fault Fault at: APCSET FAIL DIS LASER OUTPUT Fault Remains t_reset, 10 us, min. t_init < 5ms, (3 ms typ.) Unsuccessful Fault Reset Attempt Fault at: MODSET. CAPC, OUTP, IBOUTCC or IBOUTCA FAIL DIS LASER OUTPUT Fault Occurs t_fault < 100 us, (4 us typ.) DIN+ DIN- 100 mV - 1200 mV VIN(DIFF) 200 mV - 2400 mV VOUT- > 0.7V GND VOUT+

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2.0 Functional Description

2.1 Pin Definitions

Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function 1 VCC Power supply, 5V or 3.3V.

2 DIN+

Positive data input. Self biased. Compatible with AC coupled PECL, AC coupled CML, and DC-coupled PECL (when VCC = 3.3V). When DIN+ is high, OUT+ will sink current. 3 DIN- See DIN+ drawing Negative data input. Self biased Compatible with AC coupled PECL, AC coupled CML, and DC-coupled PECL (when V CC = 3.3V). VCC3 DIN+, DIN- VCC3-1.3V 4 k Ω VCC

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Mindspeed Proprietary and Confidential M02069 Data Sheet

4 VCC3SEL

3.3V VCC Select. Connect to VCC for VCC = 3.3V operation. Connect to GND for VCC = 5V operation.

5 DIS

Bias and modulation output disable (TTL/CMOS). When high or left floating, the bias and modulation outputs are disabled. Set low for normal operation.

6 FAIL

Safety circuit fault output (TTL/CMOS). Goes high when a safety logic fault is detected. This output will also be high when DIS is high. Requires an external pull-up. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function 72 k Ω VCC3SEL 190 Ω VCC VCC3 80 k Ω DIS 7 kΩ VCC3 VCC FAIL VCC

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7 RESET

Safety circuit reset. Leave open for normal operation or add a capacitor to ground to extend the reset time. Connect to GND to disable window comparators at APCSET

8 DISDLY

Disable delay control. Connect to ground for normal operation. In burst mode operation add a capacitor from this pin to ground to set the maximum disable time. Disable times greater than this maximum will engage the “slow-start” circuitry.

9 MODMON

Modulation Current Monitor. Connect to the corresponding pin on the M02088 or through a resistor to GND. The current through this pin is typically 1/50th of the MODULATION current to the laser when CCSEL is low or 1/25th the MODULATION current when CCSEL is high. This pin may be left open if the feature is not needed and the M02069 current consumption will be reduced by 0.5mA typically. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function RESET 190 Ω VCC VCC3 DISDLY 190 Ω VCC 190 Ω MODMON VCC VCC3

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Mindspeed Proprietary and Confidential M02069 Data Sheet

10 BIASMON See MODMON drawing

Bias Current Monitor. Connect to the corresponding pin on the M02088 or through a resistor to GND. The current through this pin is typically: 1/45.7th of the BIAS current to the laser when CCSEL is low 1/13.5th of the BIAS current to the laser when CCSEL is high This pin may be left open if the feature is not needed and the M02069 current consumption will be reduced by 0.5 mA typically.

11 TxPwrMON

Transmit Power Monitor. Connect to the corresponding pin on the M02088 or through a resistor to GND. The current through this pin is approximately the same as the photodiode current into I PIN. The current out of this pin is low pass filtered (no external filtering required). This pin may be left open if the feature is not needed and the M02069 current consumption will be reduced by the IPIN current.

12 APCSET

Average Power Control, laser bias current adjustment. Connect to the corresponding pin on the M02088 or to a resistor between this pin and ground to set the bias current to the laser. The APC loop will adjust the laser bias current to maintain a voltage at APCSET of approximately 1.3V. The current sourced from this pin is approximately the same as the current into IPIN. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function 33 Ω TxPwrMON VCC VCC3 APCSET VCC VCC3

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13 IPIN

For CCSEL low - Current input from monitor photodiode anode. The APC loop will adjust the laser bias current to maintain a voltage at APCSET of approximately 1.3V and at this pin of approximately one VGS. For CCSEL high - Current source for monitor photodiode cathode. The APC loop will adjust the laser bias current to maintain a voltage at APCSET of approximately 1.3V and at this pin of approximately one VGS below VCC3. IBOUTCA (CCSEL = low) Laser bias current output for common anode lasers (CCSEL must be low). Connect directly to laser cathode or at higher bit rates through a ferrite or a resistor to isolate the capacitance of this pin from the modulation drive, (~ 6pF). Maintain a voltage at least 0.7V above GND at this pin SGND (CCSEL = high) Switched ground connection for common cathode lasers (CCSEL must be high). Provides redundant shutdown during a disable or fault condition. This switch is disabled during common anode operation. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function 33 Ω IPIN VCC VCC3 IBOUTCA VCC SGND VCC

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Mindspeed Proprietary and Confidential M02069 Data Sheet

15 GNDO

Ground for output stage. May be connected directly to circuit board ground. At high bit rates (>2Gb/s) an optional inductor or ferrite may be added to reduce switching transients.

16 OUT+

Positive modulation current output (AC or DC coupled to cathode of laser in common anode designs). Sinks current when DIN+ is HIGH. Maintain a voltage > 0.7V at this pin.

17 OUT- See OUT+ drawing

Negative modulation current output (AC coupled to anode of laser in common cathode designs). Sinks current when DIN- is HIGH Maintain a voltage > 0.7V at this pin. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function GND0 VCC OUT+ VCC GND0

02069-DSH-001-D Mindspeed Technologies™ 17 Mindspeed Proprietary and Confidential SVCC (CCSEL = low) Switched VCC. Supplies laser current for common anode designs. (CCSEL must be LOW). Provides redundant shutdown during a disable or fault condition. This switch is disabled during common cathode operation. IBOUTCC (CCSEL = high) Laser bias current output for common cathode laser designs (CCSEL must be high). Connect directly to laser anode or at higher bit rates through a ferrite or a resistor to isolate the capacitance of this pin from the modulation drive. Maintain a voltage of < 2.5V at this pin.

19 CCSEL

Laser select input. When high, common cathode operation is selected; IBOUTCC and SGND are functional and internal 50Ω output terminations are switched in at the modulation outputs OUT+ and OUT-. When low or floating, common anode operation is selected; IBOUTCA and SVCC are functional and the 50Ω internal termination resistors at OUT+ and OUT- are disconnected. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function SVCC VCC VCC3 VCC VCC3 IBOUT CC 12 kΩ 48 k Ω CCSEL 24 kΩ VCC VCC3

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Mindspeed Proprietary and Confidential M02069 Data Sheet

20 CAPC

Automatic power control loop dominant pole capacitor. (Connect a capacitor between this pin and VCC3.) A nominal capacitance of 2.2nF will give a bias current enable time of less than 1 ms.

21 VCC3

3.3V applications - Power supply input. Connect to VCC. 5V applications - Do not connect to 5V. Internally generated 3.3V power supply output. Do not attach to non-M02069 circuitry.

22 PEAKADJ

Peaking adjustment input. A resistor (2kΩ to 20kΩ) between this pin and ground sets the amount of peaking current on OUT- to improve the fall time of the laser output. The peaking current is approximately (5 * (1.3V / 2 kΩ + resistance to ground)). Connect to VCC3 to disable peaking control. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function 100 Ω CAPC VCC VCC3 VCC VCC 1.8 kΩ PEAKADJ VCC VCC3 1.28V

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23 MODSET

Modulation current control. Connect a resistor to ground to set the modulation current.

24 TCSLOPE See MODSET drawing

Modulation current temperature compensation slope adjustment. Connect a resistor to ground to set the temperature coefficient. Leave open to minimize the temperature compensation coefficient. CENTER PAD GND Ground. Must be connected to ground for proper operation. This is the only package ground connection. Table 2-1. Pin Definitions Pin Number Pin Name Pin equivalent load Function 190 Ω MODSET VCC VCC3 1.28V

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Mindspeed Proprietary and Confidential M02069 Data Sheet Figure 2-1. Pin Assignments for M02069 Device VCC DIN+ DIN- VCC3SEL MODMON BIASMON CAPC VCC3 PEAKADJ TCSLOPE FAIL RESET DISDLY TXPWRMON APCSET IPIN GND0 OUT+ OUT- SVCC/ IBOUTCC CCSEL MODSET IBOUTCA/ SGNDDIS 71 2 1924 GND, connect to PCB ground

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3.0 Functional Description

3.1 Overview

The M02069 is a highly integrated laser driver intended for applications to 4.3 Gbps. Many features are user-adjustable, including common anode or common cathode laser mode, the APC (automatic power control) loop bias control (via a monitor photodiode), modulation current, temperature compensation control of modulation current, and peaking adjustment. The part may be operated from a 3.3V or 5V supply. For E-PON and other burst-mode applications, the part supports fast and accurate turn-on and turn-off of the laser bias and modulation currents. Safety circuitry is also included to provide a latched shut-down of laser bias and modulation current if a fault condi- tion occurs. An internal VCC switch provides redundant shutdown when operating the device in common anode configuration. An internal ground switch provides redundant shutdown when operating the device in common cath- ode configuration. Modulation, bias, and transmit power monitor current mirrors are provided for DDMI applications and allow moni - toring without disturbing the analog signal path.

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Mindspeed Proprietary and Confidential M02069 Data Sheet Figure 3-1. M02069 Block Diagram Example VCC3 -1.3V Internal 3.3V reg. Input B u ffe r Output B u ffe r Laser Driver Automatic Power Control (laser bias current) TX Disable Saf ety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ SVCC and IBOUT_CC OUT- OUT+ GND0 IBOUT_CA and SGND IPIN DISDLY DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwrMON DIN- DIN+ Internal Power Bus GND CC SEL

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3.2 Features

• High speed operation; suitable for SFP/SFF applications from 155Mbps to 4.3 Gbps.  Supports Common Anode VCSEL, Common Cathode VCSEL, or FP LASER. May be used with or without a monitor photodiode.  Programmable temperature compensation. Modulation output and bias output can be controlled using the pro - grammable module controller M02088 or a few discrete resistors.  Supports DDMI (SFF-8472) diagnostics.  DC or AC coupled modulation drive.  Peaking circuit to optimize VCSEL response.  Low overshoot allows high ex tinction ratio with low jitter.  Supports E-PON burst mode with no extra components  Automatic Laser Power Control, with “Slow-Start”.  3.3V or 5V operation

3.3 General Description

3.3.1 Detailed Description

The M02069 laser driver consists of the following circuitry: an internal regulator, common anode/common cathode configuration control, bias current generator and automatic power control, data inputs, peaking adjust, modulation current control, modulator output, laser fail indication, disable control, and monitor outputs for the bias current, modulation current, and transmitted power.

3.3.2 Internal Regulator

The M02069 contains an internal 3.3V regulator so high bit rate performance can be achieved with 5V or 3.3V power supply. When operating from a 5V supply (VCC is connected to +5V), an internal regulator provides a voltage of approxi- mately 3.3V to the majority of the on-chip circuitry. The on-chip regulator is internally compensated, requiring no external components. When a 3.3V supply is used (V CC and VCC3 connected to 3.3V) the regulator is switched off and the internal circuitry is powered directly through the VCC3 supply pin. The decision as to whether or not the internal regulator is required is made via the VCC3SEL pin, which also determines whether the safety circuitry needs to monitor for proper +5V supply voltage. SVCC is sourced from VCC3 through a switch for common anode applications (this pin becomes IBOUT_CC in com- mon cathode applications). When a fault condition is present, FAIL will assert and the switch sourcing SVCC will open so no current can pass through the laser. SVCC does not need any external capacitance, if capacitance to ground is added at SVCC it should be less than or equal to 100pF.

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Mindspeed Proprietary and Confidential M02069 Data Sheet VCC and VCC3 status are internally monitored by the M02069 during power-up and normal operation. During power-up the “slow-start” circuitry requires that VCC and VCC3 each reach an acceptable level before enabling bias or modulation current.

3.3.3 Common Cathode/Common Anode Configuration Control

When CCSEL is programmed high, the M02069 is configured for common cathode lasers. When CCSEL is low, the M02069 is configured for common anode lasers. The state of the CCSEL pin determines: 1. whether bias current is sourced or sunk 2. whether monitor photodiode current is sunk or sourced 3. whether internal termination resistors at OUT+ and OUT- are active 4. whether the redundant safety switch disconnects VCC or GND from the output circuitry. The affected pins are OUT+, OUT-, SVCC/IBOUTCC, and SGND/IBOUTCA. The Table 3-2 below shows the configu- ration of each pin for the 2 states of CCSEL. Table 3-1. Pin Connection for 3.3V and 5V V CC Pin Connection For: VCC = 3.3V VCC = 5V Pins Dependent on VCC Voltage VCC3 (pin 21) Connect to VCC Reference for CAPC and PEAKADJ CAPC (pin 20) Capacitor between CAPC and VCC3 or VCC Capacitor between CAPC and VCC3 (not VCC) PEAKADJ (pin 22) Connect to VCC3 or VCC to disable Connect to VCC3 to disable (not VCC) VCC3SEL (pin 4) Connect to VCC3 or VCC Connect to GND

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3.3.4 Bias Current Generator and Automatic Power Control

The M02069 can either source or sink bias current for the laser diode depending on whether it is in common anode or common cathode mode. In common cathode mode (CCSEL high) IBOUTCC will source current. In common anode mode (CCSEL low) IBOUTCA will sink current. Regardless of whether the M02069 is configured for common anode or common cathode mode, the following infor- mation applies. To maintain constant average optical power, the M02069 incorporates a control loop to compensate for the changes in laser threshold current over temperature and lifetime. The bias current will be determined by the value of the external resistor RAPCSET and the transfer efficiency between the laser and monitor photodiode. The photo current from the monitor photodiode mounted in the laser package is sunk or sourced at IPIN. This photo current is mirrored and an equivalent current is sourced from pins TxPwrMON and APCSET. The APC loop adjusts the laser bias current (hence the monitor diode photo current) to maintain a voltage of 1.3V at APC SET. RAPCSET * IPIN = 1.3 V The APC loop has a time constant determined by CAPC, RAPCSET and the transfer efficiency between the laser and monitor photodiode. The larger the CAPC capacitor the lower the bandwidth of the loop and the larger the RAPCSET resistor the lower the bandwidth of the loop. In general, it is recommended that at least 2.2 nF of external capacitance be added externally between C APC and VCC3 to assure loop stability. With use of a 2.2 nF capacitor, the bias current can reach 90% of its final value within 1 millisecond. Table 3-2. Pin Connection for Common Anode and Common Cathode Laser Modes Pin Connection When: CCSEL = High CCSEL = Low Pins Dependent on CCSEL Setting Pin 18 SVCC Inactive Supply for laser and all output load components. IBOUTCC Laser bias source current. Inactive Pin 14 SGND Ground for laser and all output load components Inactive IBOUTCA Inactive Laser bias sink current. Pin 13 IPIN Monitor photodiode source current Monitor photodiode sink current Pin 22 PEAKADJ Controls Negative going edge of OUT- Controls Negative going edge of OUT-, (do not use) Internal 50Ω pull-up resistors on OUT+ and OUT- Active Inactive Ratio of Bias current to BIASMON current 13.5:1 45.7:1 Ratio of Modulation current to MODMON current 30:1 65:1

26 Mindspeed Technologies™ 02069-DSH-001-D

Mindspeed Proprietary and Confidential M02069 Data Sheet In Common Anode mode with a 2.2nF CAPC capacitor the APC loop bandwidth is less than 30 kHz for almost all combinations of RAPCSET and transfer efficiency., which should be adequate for bit rates of 155Mbps. (and all higher bit rates). In Common Cathode mode with a 2.2nF CAPC capacitor the APC loop bandwidth will be slightly higher, but should be less than 40 kHz for almost all combinations of RAPCSET and transfer efficiency. Contact the factory with your specific values of CAPC, RAPCSET, and transfer efficiency to determine the maximum APC loop bandwidth in your application. The bias generator also includes a bias current monitor mirror (BIASMON), whose output current is typically 1/ 45.7th of the bias current in common anode mode (CCSEL = low) or 1/13.5th of the bias current in common cath - ode mode (CCSEL = high). This pin can be connected directly to an M02088 DDMI module controller or through a resistor to ground. If this function is not needed this pin can be left open. The M02069 can be used without a monitor photodiode by connecting BIASMON to APCSET (see Figure 3-7 and Figure 4-3). In this case the M02069 will increase the bias current (hence the BIASMON current) to the laser until the voltage at APCSET is approximately 1.3V.

3.3.5 Data Inputs

The inputs to the data buffers are self-biased through 4 kΩ resistors to an internal voltage VTT which is approxi- mately VCC3 - 1.3V. Both CML and PECL inputs signals can be AC coupled to the M02069, or in 3.3V applications PECL inputs can be DC coupled to the data inputs. In most applications the data inputs are AC coupled with con- trolled impedance pcb traces which will need to be terminated externally with a 100Ω or 150Ω resistor between the + and - inputs.

3.3.6 Peak Adjust

Some VCSELs do not turn off quickly without peaking the negative going edge. In common cathode applications, peaking on this edge can be added with a resistor connected between the PEAK- ADJ input and GND. The amount of peaking is approximately Peaking current = 5 * (1.3V / 2 KΩ + resistance to ground). The resistance to ground should be between 2 KΩ and 20 KΩ. (Which will result in a peaking currents from 2.6mA to 260 µA.) Peaking control can be disabled by connecting PEAKADJ to VCC3, resulting in no peaking current and reducing supply current by approximately 2 mA. In common anode configuration the PEAKADJ pin should be connected to VCC3. Note: Unlike the rest of the signal currents in the M02069, the output Peak Adjust current is unbalanced (single- sided drive). The designer should be aware that the use of peaking may result in unwanted EMI emissions. If EMI problems are traced to the use of peaking, high frequency decoupling (10pF capacitor or smaller) may be needed on the V CC line.

3.3.7 Modulation Control

There are two programmable control lines for controlling the modulation current and its temperature compensation. These inputs can be programmed simply with a resistor to ground or they can be digitally controlled by the Mind speed module controller M02088.

02069-DSH-001-D Mindspeed Technologies™ 27 Mindspeed Proprietary and Confidential The modulation current amplitude is controlled by the MODSET input pin. The modulation current is temperature compensated by the TCSLOPE input. If the temperature compensation at TCSLOPE is disabled, the modulation output current is simply: IOUT = 42 x (1.3V / RMODSET) when CCSEL is low and IOUT = 22 x (1.3V / RMODSET) when CCSEL is high and a 50Ω VCSEL is used. Where RMODSET is the resistance from pin MODSET to ground. To temperature compensate the modulation current, choose RTCSLOPE to meet the following relationship: RTCSLOPE = 19.5*(TC)-1.5, where TC is the desired slope of the modulation current from 25°C to 85°C in%/°C and RTCSLOPE is in kΩ. If no temperature compensation is desired, leave RTCSLOPE open. In any case, RTCSLOPE will have negligible effect at M02069 case temperatures below 10°C. For example: Given a common cathode VCSEL with a desired modulation current at low temperatures of 10 mA and a tempera - ture coefficient of -0.5%/°C at high temperatures (which will require a laser driver temperature coefficient of +0.5%). Choose RMODSET = 22 x (1.3V / 10mA) = 2.8kΩ. Choose RTCSLOPE =19.5*(0.5)-1.5 kΩ = 55kΩ. Figure 3-2. Selecting TC SLOPE resistance in common anode configuration -30.00 -20.00 -10.00 0.00 10.00 20.00 30.00 40.00 50.00 60.00 -40 -20 0 20 40 60 80 100 Ambient Temperature in degrees C % change in modulation current RTCslope: 22k 27k 33k 39k 47k 51k 62k 75k 82k 100k 120k 150k 220k 390k 750k open

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3.3.8 Modulator ( Figure 3-4)

The output stages OUT+ and OUT- are designed to drive 25Ω output loads over a wide range of currents and cir- cuit architectures. The VCSEL may be a common anode or common cathode device. The output can be AC, DC, or Differentially coupled depending on the supply voltage and laser configuration. In a common anode configuration with a VCSEL (Figure 4-1), OUT+ should be connected through a capacitor to the VCSEL. A pull-up resistor should be added in parallel to the VCSEL from SVCC to the OUT+ output. The dynamic impedance of the parallel combination of the VCSEL and pull-up resistor should be roughly 25 ohms. A 24 ohm pull-up resistor should also be added from SVCC to OUT- so the currents and voltage swings in the two out puts are balanced. In a common anode configuration with a Fabry-Perot laser (Figure 4-4), OUT+ may be AC, DC, or Differentially coupled to the laser cathode. A resistor should be added in series with the laser such that the dynamic impedance of the series combination of the laser and resistor should be roughly 25 ohms. A 24 ohm pull-up resistor to SV CC is needed on the OUT- output. For common cathode operation with a VCSEL (Figure 4-2), internal 50 ohm terminations are switched in between the OUT+ and OUT- outputs and VCC3. VCSELs with impedances from 25-75Ω can be simply AC coupled to the OUT- output with no additional load matching resistors. In this case OUT+ should be AC coupled to ground through 50Ω. The VCSEL driver output stage is separately grounded from the rest of the circuitry (through GND0). At higher data rates (above 2Gb/s) GND0 may be connected to ground through a minimum of 2 nH of inductance to improve the transient response. A ferrite can also provide the extra isolation (Murata BLM18HG471SN1 or equivalent recom- mended). Figure 3-3. Selecting TC SLOPE resistance in common cathode configuration -30.0 -20.0 -10.0 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 -40 -20 0 20 40 60 80 100 Ambient Temperature in degrees C % change in modulation current RTCslope: 27k 33k 39k 47k 51k 62k 75k 82k 100k 120k 150k 180k 220k 390k 510k open

02069-DSH-001-D Mindspeed Technologies™ 29 Mindspeed Proprietary and Confidential Figure 3-4. Modulator Output

3.3.9 Fail Output

The M02069 has a FAIL alarm output which is compatible with the TX_FAULT signalling requirements of common pluggable module standards. The ESD protection on this pin provides a true open collector output that can withstand significant variation in VCC when signalling between circuit boards. Also, if the M02069 loses power the FAIL output will continue to pull up and signal a fail condition. In a simple static protection scheme used by other ICs the protection diodes would clamp the FAIL signal to ground when the chip loses power.

3.3.10 TX Disable and Disable Delay Control

The DIS pin is used to disable the transmit signal. When the transmit is disabled both the bias and modulation cur- rents are off. The DIS input is compatible with TTL levels regardless of whether VCC = 5V or VCC = 3.3V. In most module appli- cations a pull-up resistor to VCC between 4.7kΩ and 10kΩ is required. Because this pin has an internal 7kΩ resis- tor to VCC, no external pull-up resistor is required. The DISDLY pin is used in conjunction with the DIS pin to control bias current enable time. (The modulation current enable time is always less than 600 ns). Unless the DISDLY pin is programmed for burst mode, the APC loop enable time will be slow (less than 1 ms with a C APC = 2.2nF). When a capacitor C is added to the DISDLY pin, the slow-start circuitry is disabled for typically T = 3 * 106 (sec/F)* C (F) following the DIS high transition. If DIS transitions low during this time, the bias current will quickly return to within 90% of its final value (within less than 500ns). If DIS transitions low after this time the slow-start circuitry will engage and the bias current will not return to its final value for approximately 1ms (depending on the CAPC capaci- tor).

3.3.11 Burst Mode Operation ( Figure 3-5)

The M02069 will meet the timing requirements of EPON with the addition of a capacitor at DISDLY (see paragraph above and Figure 3-5). OUT+ 0.4pF 0.75 nH OUT- GND0 (optional external inductance) * Denotes bond wire internal to MLF pack age 0.75 nH * OUT+ and OUT- s hould not be driven below 0.7V

30 Mindspeed Technologies™ 02069-DSH-001-D

Mindspeed Proprietary and Confidential M02069 Data Sheet As shown in Figure 4-4, the laser should be DC coupled to OUT+. VCC may be 3.3V or 5V. Figure 3-5. DIS and DISLY Timing DIS DISDLY OUT+ IBIASOUT DIS DISDLY OUT+ IBIAS OUT EPON Burst Mode Operation Normal Operation, (slow-start whenever part enabled) t_on BM < 500 ns for I MOD > 10 mAt_off BM < 500 ns t_off < 10µs t_on < 1 ms, depending on C APC

02069-DSH-001-D Mindspeed Technologies™ 31 Mindspeed Proprietary and Confidential

3.3.12 Video Operation

The M02069 can be used to transmit video optical data even in the presence of the pathological pattern. This is done by fully DC coupling the signal from the input to the laser output. In most data communications applications, AC coupling occurs at three points in a laser driver schematic: the data inputs, the APC control, and coupling the modulation current to the laser. In the M02069, DC coupling can be used at all three of these points. With DC coupling the laser output will not be a function of the data input one/zero den sity. The data inputs can be DC coupled using PECL or CML levels. The APC of the bias current is controlled by feedback from the monitor photodiode in the laser package in most communications applications. In video applications this monitor photodiode should not be used if the pathological pattern may occur. Instead, the APC should be controlled in an "open loop" configuration. (Open loop simply means a monitor photodiode is not used). In the open loop configuration the APC is controlled by a resistor or a thermistor network or a look-up table and DAC. This removes AC time constants from the bias current. In Figure 3-6 the BIASmon pin is connected to the APCset pin. In this case the bias current is: IBIAS = 45.7 x (1.35V / RAPCSET) The modulation current output OUT+ can be DC coupled to the laser as shown in Figure 3-6. There are no AC time constants in the modulation current amplitude in this configuration. Figure 3-6. Video Application Block Diagram VCC3 VCC VCC3 For VCC=3.3V, tie VCC3 to VCC. VCC3 -1.3V Internal 3.3V reg. Input Buffer Output Buffer Las er Driver Automatic Power Control (laser bias current) TX Disable Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ SVCC OUT- OUT+ GND0 IBOUT_CA IPIN DISDLY DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwr MON DIN - DIN+ Internal Power Bus CCSEL Connect to V CC when V CC = 3.3V Connect to GND when V CC = 5V VCC3

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3.3.13 Current Monitors

To facilitate complying with laser safety and DDMI1 requirements, output monitors are provided for transmit power (TxPwrMON), bias (BIASMON), and modulation current (MODMON). These outputs will source current proportional to the emitted optical power (TxPwrMON) the bias current (BIASMON) and modulation current (MODMON). These outputs may be connected directly to the corresponding pins on the M02088 module controller. To use these pins without an M02088 they should be terminated with a resistor to ground that sets the desired full- scale voltage (not to exceed 2.5V). If the outputs of these monitors are not needed, TxPwrMON, BIASMON, and MODMON can all be left floating and the chip current consumption will be reduced by the value of the monitor currents.

3.4 Laser Eye Safety

Using this laser driver in the manner described herein does not ensure that the resulting laser transmitter complies with established standards such as IEC 825. Users must take the necessary precautions to ensure that eye safety and other applicable standards are met. Note that determining and implementing the level of fault tolerance required by the applications that this part is going into is the responsibility of the transmitter designer and manufac turer since the application of this device cannot be controlled by Mindspeed. 1 Digital Diagnostic Monitoring Interface for Optical Tranceivers, defined in SFF-8472.

02069-DSH-001-D Mindspeed Technologies™ 33 Mindspeed Proprietary and Confidential

3.4.1 Safety Circuitry

Safety Circuitry in the M02069 will disable the modulation and bias current and assert the FAIL output immediately upon detecting a fault condition. In addition, the supply voltage that sources or sinks the laser current (SV CC or SGND) will immediately go open circuit and prevent any current from passing through the laser. Fault conditions checked by the M02069 include shorts to ground or VCC of all pins which can increase the laser modulation or bias current. For an initialization or power-up sequence to be successful, all the fault detection monitors must signal that the chip is “healthy”. When DIS goes low, pins are checked for shorts to ground or VCC and a FAIL condition is latched if there is a fault. If the state of the pins is OK, a one-shot at the reset pin begins a countdown which will latch a FAIL condition if the bias current has not stabilized to an acceptable level during the one-shot time. The one-shot can be extended with an external capacitor connected from the RESET pin to ground. The one-shot1 width is approximately TONE-SHOT = 3 ms + (0.3 ms/pF)x(external capacitance). Figure 3-7. Safety Circuit Block Diagram 1.The one-shot is actually comprised of an oscillator and 10-bit counter. Vcc Pin 5v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits 5v Mode: AND Vcc3 Pin 3.3v Hi/Lo Limits 3.3v Mode: AND ‘1’ Vcc Pin 5v Hi/Lo Limits VccOK Detection: CrudeFaults Detection: OutP (2061) Cmpc MODset IbiasOut IboutCA > 300mV > 300mV > 300mV > 300mV > 300mV IboutCC < (Vcc3 – 300mV) (2069 – Common Anode) (2069 – Common Cathode) Delay Set SRlatch: Q Reset ONE-SHOT: Start 3ms + Tcapt=0 PULSE NOTE: Pulse stays high if Reset pin is GNDed. RESET optional cap for longer T_init AND Window Compare: HI Limit MPCset LOW Limit OR Set SRlatch: Q ResetAND AND AND BiasOK Detection: OUTPUT_ENABLE VCC_OK CrudeFaults_OK BIAS_OK Latch for CrudeFaults Latch for Bias_OK If chip is ‘healthy’, then Enable the outputs and Start 3msec Reset Pulse(one-shot) (open-collector) FAILout OR DIS

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3.5 Fault Conditions

This section describes the M02069 operating modes during fault conditions. Over voltage, under voltage, pins shorted to VCC and pins shorted to ground are included in the fault Table 3-3. Table 3-3. Circuit Response to Single-Point Fault Conditions Pin Name Circuit Response to Over-voltage Condition or Short to VCC Circuit Response to Under-Voltage Condition or Short to Ground VCC Bias and modulation outputs are disabled once VCC rises above the supply detection (high voltage) threshold (see Table 1-3) Bias and modulation outputs are disabled once VCC drops below the supply detection (low voltage) threshold DIN+, DIN- The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1,2,3) The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1,2,3) VCC3SEL Does not affect laser power. Does not affect laser power. DIS Bias and modulation outputs are disabled. SVCC is opened when CCSEL is low or floating (or SGND is opened when CCSEL is high) Does not affect laser power (normal condition for circuit operation). FAIL Does not affect laser power. Does not affect laser power. RESET Does not affect laser power. Does not affect laser power. MODMON Does not affect laser power. Does not affect laser power. BIASMON Does not affect laser power. Does not affect laser power. TxPWRMON Does not affect laser power. Does not affect laser power. APCSET A fault state occurs.(1) A fault state occurs.(1) IPIN A fault state occurs.(1) A fault state occurs.(1) IBOUTCA (3) The laser will be turned off, then a fault state occurs.(1) A fault state occurs.(1) IBOUTCC (4) A fault state occurs.(1) The laser will be turned off, then a fault state occurs.(1) OUT+(3) Laser modulation is prevented; the APC loop will increase the bias current to compensate for the drop in laser power if it is DC coupled. If the set output power can not be obtained, a fault state occurs. (1,2) A fault state occurs.(1) OUT-(4) Does not affect laser power during common cathode operation because output is AC coupled. Does not affect laser power during common cathode operation because output is AC coupled. SVCC (3) Does not affect laser power. Laser bias current will be shut off and a fault state occurs.(1) CAPC Laser bias current will be shut off, then a fault state occurs.(1) A fault state occurs.(1) VCC3 Bias and modulation outputs are disabled once VCC3 rises above the supply detection (high voltage) threshold Bias and modulation outputs are disabled once VCC3 drops below the supply detection (low voltage) threshold PEAKADJ Does not affect laser power. Does not affect laser power CCSEL Normal operation for common cathode configuration. If the M02069 is configured for common anode drive, a fault state will occur. (1) Normal operation for common anode configuration. If the M02069 is configured for common cathode drive, a fault state will occur. (1) MODSET When the laser is DC coupled in common anode configuration, the APC loop will attempt to compensate for the drop in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1,2) A fault state occurs.(1)

02069-DSH-001-D Mindspeed Technologies™ 35 Mindspeed Proprietary and Confidential TCSLOPE Does not affect laser power. When the laser is DC coupled in common anode configuration, the APC loop will attempt to compensate for any change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1,2) DISDLY Does not affect laser power. Does not affect laser power. Notes: 1. A fault state will assert the FAIL output, disable bias and modulation outputs and will either open the switch at SVCC (CCSEL=high) or SGND (CCSEL=low). 2. Does not affect laser power when the output is AC coupled to the laser. 3. Does not affect laser power during common cathode operation. 4. Does not affect laser power during common anode operation. Table 3-3. Circuit Response to Single-Point Fault Conditions Pin Name Circuit Response to Over-voltage Condition or Short to VCC Circuit Response to Under-Voltage Condition or Short to Ground

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02069-DSH-001-D Mindspeed Technologies™ 37 Mindspeed Proprietary and Confidential

4.0 Applications

4.1 Applications

 EPON FTTH modules  Gigabit Ethernet modules  1G/2G/4G Fibre Channel modules  Digital Video Figure 4-1. Application Diagram, Common Anode VCSEL VCC3 VCC VCC3 For VCC=3.3V, tie VCC3 to VCC. VCC3 -1.3V Internal 3.3V reg. Input Buffer Output Buffer Las er Driver Automatic Power Control (las er bias current) TX Disable Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ SV CC OUT- OUT+ GND0 IBOUT_CA IPIN DISDLY DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwr MON DIN- DIN + Internal Power Bus CCSEL Connect to V CC when V CC = 3.3V Connect to GND when V CC = 5V VCC3 VCC3 (may be DC coupled, but extra bias current will be required for the pull-up resistor on OUT+)

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Mindspeed Proprietary and Confidential M02069 Data Sheet Figure 4-2. Application Diag ram, Common Cathode VCSEL Figure 4-3. Application Diagram, Co mmon Cathode VCSEL w/o Monitor Diode V CC3 -1.3V Internal 3.3V reg. Input Buffer Output Buffer Las er Driver Automatic Power Control (las er bias current) TX Disable Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ OUT- OUT+ GND0 IBOUT_CC IPIN DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwr MON DIN- DIN+ Internal Power Bus VCC3 VCC VCC3 SGND CCSEL DISDLY VCC For VCC=3.3V, tie VCC3 to VCC. Connect to V CC when V CC = 3.3V Connect to GND when V CC = 5V VCC3 -1.3V Internal 3.3V reg. Input Buf f er Output Buf f er Laser Driver Automatic Power Control (laser bias current) TX Disable Saf ety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ OUT- OUT+ GND0 IBOUT_CC IPIN DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwr MON DIN- DIN+ Internal Power Bus VCC3 VCC VCC3 SGND CCSEL DISDLY VCC3 For VCC=3.3V, tie V CC3 to VCC. Connect to V CC when V CC = 3.3V Connect to GND when V CC = 5V

Applications

02069-DSH-001-D Mindspeed Technologies™ 39 Mindspeed Proprietary and Confidential Figure 4-4. Application Diagram, Co mmon Anode FP Laser, DC Coupling VCC3 VCC VCC3 For VCC=3.3V, tie VCC3 to VCC. For EPON operation, add a capacitor to GND at DISDLY. VCC3 -1.3V Internal 3.3V reg. Input Buffer Output Buffer Las er Driver Automatic Power Control (las er bias current) TX Disable Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PEAKADJ SVCC OUT- OUT+ GND0 IBOUT_CA IPIN DISDLY DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwr MON DIN - DIN+ Internal Power Bus CCSEL Connect to V CC when V CC = 3.3V Connect to GND when V CC = 5V VCC3

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Mindspeed Proprietary and Confidential M02069 Data Sheet

02069-DSH-001-D Mindspeed Technologies™ 41 Mindspeed Proprietary and Confidential

5.0 Packaging Specification

5.1 Package Specification

Figure 5-1. QFN24 Package Information Note: View is for a 20 pin package. All dimensions in the tables apply for the 24 pin package

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Mindspeed Proprietary and Confidential M02069 Data Sheet

02069-DSH-001-D Mindspeed Technologies™ 43 Mindspeed Proprietary and Confidential © 2003, 2004, 2005 Mindspeed TechnologiesTM, Inc. All rights reserved. Information in this document is provided in connection with Mindspeed TechnologiesTM ("MindspeedTM") products. These materials are provided by Mindspeed as a service to its customers and may be used for informational pur- poses only. Except as provided in Mindspeed’s Terms and Conditions of Sale for such products or in any sepa- rate agreement related to this document, Mindspeed assumes no liability whatsoever. Mindspeed assumes no responsibility for errors or omissions in these materials. Mindspeed may make changes to specifications and prod- uct descriptions at any time, without notice. Mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF MINDSPEED PRODUCTS INCLUDING LIABILITY OR WAR- RANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLEC- TUAL PROPERTY RIGHT. MINDSPEED FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETE- NESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. MINDSPEED SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSE- QUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. Mindspeed cus- tomers using or selling Mindspeed products for use in such applications do so at their own risk and agree to fully indemnify Mindspeed for any damages resulting from such improper use or sale.

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