02061-DSH-001-G MA-COM | Alldatasheet

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Technical content

Features

 High-speed operation; suitab le for SFP/SFF applications. Typical rise/fall times of 55 ps.  Programmable temperature comp ensation. Modulation output and bias output can be controlled using a few discrete resistors.  Supports DDMI (SFF-8472) diagnostics  DC or AC coupled modulation dr ive. Up to 100 mA modulation current available when AC coupled.  Low overshoot allows high ex tinction ratio with low jitter  Automatic laser power c ontrol, with “Slow-Start”  PECL and CML compatible differential data inputs  Complies with major MSAs (GBIC, SFF, SFF-8472, SFP) including timing requirements  Packaged in a QFN24  3.3 V or 5 V operation  Pulse width adjustment Typical Applications Diagram Input Buffer VCC3 -1.3V Internal 3.3V reg. Input Buffer D - FF Output Buffer Laser Driver Automatic Power Control (laser bias current) Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PWA SHDWNOUT SVCC OUT- OUT+ GND0 IBIASOUT IPIN DIS MODSET TCSLOPE MODMON RESE T BIASMON APCSET CAPC TxPwrMON DIN- DIN+ Internal Power Bus VCC3 VCC VCC VCC3 VCC VCC SCB DISDLY (M02061-12 only) (M02061-21 only) TX Disable

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Ordering Information

Part Number Package Pin Confitguration M02061-12 QFN24 DISDLY function on pin 8 M02061G-12* QFN24 (RoHS Complian t) DISDLY function on pin 8 M02061-21 QFN24 SCB function on pin 8 M02061G-21* QFN24 (RoHS Compliant) SCB function on pin 8 M02061-EVM Combination Optical and Electrical Evaluation board DISDLY function on pin 8 *The G in the part number indicates that this is an RoHS compliant package. Refer to www.mindspeed.com for additional information.

Revision History

G Release July 2012 x Added recommendation for 100 k Ω pull-up resistor at pin 14 IBIASout when pin 18 SVCC is used to control laser current. F Release February 2010 x Added CPRI data rates to front page. Added TJ specification and added equation for TA specification in Table 1-1. E Release February 2006 x Added information for the M02061-21 with pin SCB instead of pin DISDLY. D Release September 2005 x New format. Remove 32 pin package information. Changes to Absolute Maximum Specifications - operating temperature, output voltage. Changes to Recommended Operating Conditions - VCC, operating temperature. Changes to DC Characteristics - ICC, VMD, TxPWRmon, logic inputs and outputs, data inputs, safety logic thresholds. Changes to AC Characteristics - IMOD, Tr, Tf, jitter. C Preliminary March 2004 x Added eye diagram, ; corrected rise/fall times. 2.5Gbps Electrical Eye Diagram Conditions: 80mA modulation current, 2^7-1 PRBS QFN24 Pin Configuration VCC DIN+ DIN- VCC3SEL MODMON BIASMON CAPC VCC3 PWA TCSLOPE FAIL RESET SCB/DISDLY TXPWRMON APCSET IPIN GND0 OUT+ OUT- SVCC SHDWNOUT MODSET IBIASOUTDIS 71 2 1924 4mm x 4mm GND, connect to PCB ground

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1.0 Product Specification

1.1 Absolute Maximum Ratings

These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged. Reliable operation at these extremes for any length of time is not implied. Table 1-1. Absolute Maximum Ratings Symbol Parameter Rating Units VCC Power supply voltage -0.4 to +6.0 V TJ Junction temperature -40 to +110 1 °C VCC3 3.3V power supply voltage -0.4 to +4.0 V TA Operating ambient temperature -40 to +95 2 °C TSTG Storage temperature -65 to +150 °C IBIASOUT (MAX) Maximum bias output current 150 mA IMOD (MAX) Maximum modulation current 140 mA DIN+/- Data inputs 0 to V CC3 + 0.4 V DIS, SCB, VCC3SEL Mode control inputs -0.4 to V CC + 0.4 V BIASMON, MODMON Bias and modulation output current mirror compliance voltage -0.4 to VCC3 + 0.4 V IPIN Photodiode anode voltage -0.4 to V CC3 + 0.4 V IPIN Photo diode current 2 mA FAIL Status flags -0.4 to V CC + 0.4 V PWA, APCSET, MODSET Set inputs -0.4 to V CC3 + 0.4 V TCSTART Temperature compensation start temperature -0.4 to 1.0 V TCSLOPE Temperature compensation slope -0.4 to V CC3 + 0.4 V OUT+, OUT- Output -0.4 to V CC + 0.4 V 1. QFN package: Air Velocity θJA 0 m/s 57 ºC/W 1 m/s 50 ºC/W 2.5 m/s 45 ºC/W The above thermal resistance is based on a 4-layer JEDEC standard board (76.2 x 114.3 mm). 2. The maximum operating ambient temperature is the lesser of 95 °C or TA ≤ TJ(Max) - (θJA (Max) x Q) where Q is the power dissipated in the M02061.

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1.2 Recommended Operating Conditions

1.3 DC Characteristics

(VCC = +3.05V to +3.55V or 4.75V to 5.4V, TA = -40 °C to +95 °C, unless otherwise noted) Typical values are at VCC = 3.3 V, IBIASOUT = 30 mA, IMOD = 30 mA, TA = 25 °C, unless otherwise noted. Table 1-2. Recommended Operating Conditions Parameter Rating Units Power supply (VCC-GND) 3.3 ± 7.5% or 5.0 + 8%, -5% V Operating ambient -40 to + 95 °C Table 1-3. DC Characteristics (1 of 3) Symbol Parameter Conditions Minimum Typical Maximum Units ICC Supply current excluding IMOD and IBIAS PWA high (no pulse width adjust) additional current when PWA used additional current when operating from a 5V supply 1.5 1.5 mA I BIAS Bias current adjust range V(I BIASOUT) > 0.7V For 3.3V operation with an AC coupled laser For 5.0V operation with a DC coupled laser. 100 mA I BIAS(OFF) Bias current with optical output disabled DIS = high V(IBIASOUT) > VCC - 1V – – 300 µA Ratio of IBIAS current to BIASMON current –1 0 0 – A / A VMD Monitor diode reverse bias voltage VCC =3.3V 1.5 – – V IMD Monitor diode current adjustment range Adjusted with RAPCSET 10 – 1500 µA Ratio of TxPwrMON current to monitor photodiode current 0.95 1 1.25 A/A C MD_MAX Maximum monitor photodiode capacitance for APC loop stability. Includes all associated parasitic capacitances. 100 pF TTL/CMOS input high voltage (DIS) 2.0 – 5.4 V

02061-DSH-001-G Mindspeed Technologies® 5 Mindspeed Proprietary and Confidential TTL/CMOS input low voltage (DIS) –– 0 . 8 V CMOS input high voltage (VCC3SEL, SCB) 2.4 V CMOS input low voltage (VCC3SEL, SCB) 1.2 V Logic output high voltage (FAIL) With external 10kΩ pull-up to VCC.V CC - 0.5 – – V Logic output low voltage (FAIL) For 6.8k to 10k Ω resistor when pulled up to 5V. For 4.7k to 10k Ω resistor when pulled up to 3.3V. –– 0 . 4 V RIN Differential input impedance Data inputs – 6800 – Ω VSELF Self-biased common-mode input voltage –V CC3 - 1.3 – V VINCM Common-mode input compliance voltage Data inputs V CC3 - 1.45 – V CC3-[VIN(Diff)]/4 V VIN(DIFF) Differential input voltage = 2 x (D IN+HIGH - DIN+LOW) 200 – 2400 mVpp VCC3THL (1) 3.3V supply detection, lower threshold 2.5 2.8 3.0 V VCC3THH (1) 3.3V supply detection, upper threshold 3.65 3.9 4.25 V VCC5THL 5V supply detection, lower threshold 3.9 4.25 4.65 V VCC5THH 5V supply detection, upper threshold 5.4 5.8 6.1 V VREF1 Reference voltage for MODSET 1.18 1.3 1.4 V VAPCSET Reference voltage for APCSET 1.3 V VBL Bias_OK lower voltage threshold 0.88 1.0 1.05 V Table 1-3. DC Characteristics (2 of 3) Symbol Parameter Conditions Minimum Typical Maximum Units

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1.4 AC Characteristics

(VCC = 3.05 V to 3.55V or 4.75V to 5.4V, TA = -40 °C to +95 °C, unless otherwise noted) Typical values are at VCC = 3.3 V, IBIASOUT = 30 mA, IMOD = 30 mA, 25 ohm load and TA = 25 °C, unless otherwise noted. VBH Bias_OK upper voltage threshold 1.45 1.6 1.7 V VFAULTL Lower voltage threshold for fault inputs IBIASOUT, OUT+, CAPC, AND MODSET FAIL asserts if any of these signals fall below this value. 300 400 mV V OUT_DIS Self bias voltage for IBIASOUT and OUT+ DIS = high 0.5 1.65 2.2 V VSHDWNL SHDWNOUT output low voltage DIS = low, ISHDWNOUT ≤ 100uA V CC - 4 V VSHDWNH SHDWNOUT output high voltage DIS = low, ISHDWNOUT ≤ 10uA V CC - 0.3V V NOTES: 1. When V CC = 5V, VCC3 “supply OK” circuitry monitors the internally regulated 3.3V supply. When VCC = 3.3V, VCC3 “supply OK” circuitry monitors VCC. Table 1-4. AC Characteristics (1 of 2) Symbol Parameter Conditions Minimum Typical Maximum Units IMOD Modulation current range 3.3V operation, AC coupled, OUT+ and OUT- >1.6V 5V operation, DC coupled(1) into a 25Ω load to VCC - 1.2V. OUT+ and OUT- >1.15V – 100 mA IMOD(OFF) Modulation current with output disabled DIS = high – – 300 µA Ratio of modulation current to MODMON current –1 0 0 – A / A IMOD-TC Programmable range for modulation current temperature coefficient Adjustable using TCSLOPE (2) 0–1 0 4 ppm/°C Table 1-3. DC Characteristics (3 of 3) Symbol Parameter Conditions Minimum Typical Maximum Units

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1.5 Safety Logic Timing

(SCB pin low, VCC = 3.05 V to 3.55V or 4.7V to 5.4V, TA = -40 °C to +95 °C, unless otherwise noted) tr Modulation output rise time 20% to 80% into 25 Ω. Measured using 11110000 pattern at 2.5Gbps –5 57 5 p s tf Modulation output fall time – 55 75 ps OS Overshoot of modulation output current in the off direction. into 25 Ω load -- 1 – % RJ Random jitter – 0.8 – ps rms DJ Deterministic jitter Measured into 25 Ω load, 231 - 1 PRBS at 2.7 Gbps K28.5 pattern at 4.25 Gbps (includes pulse width distortion pspp NOTES: 1. Guaranteed by design and characterization. 2. DC coupled operation at 3.3V is not supported. AC coupled operation at 5V is possible provided the outputs never exceed 6V. 3. Pulse width distortion is measured single-ended. Table 1-5. Safety Logic Timing (1 of 2) Symbol Parameter Conditions Minimum Typical Maximum Units t_off DIS assert time Rising edge of DIS to fall of output signal below 10% of nominal(1) 10 μs t_on DIS negate time Falling edge of DIS to rise of output signal above 90% of nominal(1) 1m s t_init Time to initialize (2) Includes reset of FAIL; from power on after Supply_OK or from negation of DIS during reset of FAIL condition 235 m s Table 1-4. AC Characteristics (2 of 2) Symbol Parameter Conditions Minimum Typical Maximum Units (2)

02061-DSH-001-G Mindspeed Technologies® 8 Mindspeed Proprietary and Confidential t_fault Laser fault time - from fault condition to assertion of FAIL From occurrence of fault condition or when Supply_OK is beyond specified range 100 μs t_reset DIS time to start reset DIS pulse wi dth required to initialize safety circuitry or reset a latched fault 10(3) μs tVCC_OK Supply_OK delay time Delay betwee n Supply_OK condition and when outputs are enabled 10 20 μs t_onBM DIS negate (turn-on) time during burst-mode operation IMOD > 20mA; outputs DC coupled (5V operation)(4) 300 500 ns t_offBM DIS assert (turn-off) time during burst-mode operation IMOD > 20mA; outputs DC coupled (5V operation) 200 500 ns NOTES: 1. With CAPC < 2.2nF 2. User-adjustable. Specifications reflect timing with no external RESET capacitor. 3. With < 1nF capacitor from RESET pin to ground. 4. Imod >12mA Figure 1-1. Relationship between Data Inputs and Modulation Outputs Table 1-5. Safety Logic Timing (2 of 2) Symbol Parameter Conditions Minimum Typical Maximum Units DIN+ DIN- 100 mV - 1200 mV VIN(DIFF) 200 mV - 2400 mV VOUT- > 1.60V when VCC5_OR high > 1.15V when VCC5_OR low GND VOUT+

02061-DSH-001-G Mindspeed Technologies® 9 Mindspeed Proprietary and Confidential Figure 1-2. Safety Logic Timing Characteristics, SCB pin low VCC3 FAIL DIS LASER OUTPUT (low) (low) 3.3V t_on < 1ms, (300 μs typ.) VCC VCC3 and VCC5 status FAIL DIS LASER OUTPUT (low) (low) VCC3 and VCC5 “OK” t_on < 1ms, (300 μs typ.) Hot Plug (DIS Low) Slow Rise on Vcc = 5V at Power-up (DIS Low) VCC3 FAIL DIS LASER OUTPUT (low) (low) 3.3V t_on < 1ms, (300 μs typ.) VCC 3.3V FAIL state at power-up will depend on pull-up voltage Slow Rise on Vcc=3.3V at Power-up (DIS Low) VCC3 and VCC5 status FAIL DIS LASER OUTPUT (low) (low) VCC3 and VCC5 “OK” t_on < 1ms, (300 μs typ.) (high) Transmitter Enable (DIS transition Low)

02061-DSH-001-G Mindspeed Technologies® 10 Mindspeed Proprietary and Confidential VCC3 and VCC5 status FAIL DIS LASER OUTPUT (low) VCC3 and VCC5 “OK” t_off < 10 μs, (1 μs typ.) (high) Fault Recovery Behavior Fault recovery at: MODSET. CAPC, OUT+, or IBout FAIL DIS LASER OUTPUT Fault Removed t_reset, 10 μs, min. FAIL remains high until reset by DIS going hight_on < 1ms Transmitter Disable (DIS transition high) Fault at: MODSET. CAPC, OUTP, or IBout FAIL DIS LASER OUTPUT Fault Occurs t_fault < 100 μs, (4 μs typ.) Response to Fault Fault at: APCSET FAIL DIS LASER OUTPUT Fault Remains t_reset, 10 μs, min. t_init < 5ms, (3ms typ.) Unsuccessful Fault Reset Attempt

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2.0 Pin Definitions

Table 2-1 lists pin type definitions and descriptions for the M02061 device. Table 2-1. M02061 Pin Definitions and Descriptions (1 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function 1V CC Power supply 2D IN+ Positive data input. Self biased. Compatible with AC coupled PECL, AC coupled CML, and DC-coupled PECL (VCC = 3.3V). When DIN+ is high, OUT+ sinks current. 3D IN- See D IN+ drawing Negative data input. Self biased Compatible with AC coupled PECL, AC coupled CML, and DC-coupled PECL (VCC = 3.3V). 4 VCC3 SEL 3.3V VCC Select. Connect to VCC3 for VCC = 3.3V operation. Connect to GND for VCC = 5V operation. VCC3 CLK+, CLK- DIN+, DIN-, or VTT 4 k Ω VCC 72 k Ω VCC5_OR 190 Ω VCC VCC3

02061-DSH-001-G Mindspeed Technologies® 12 Mindspeed Proprietary and Confidential 5 DIS Bias and modulation out put disable (TTL/CMOS). 6 FAIL Safety circuit control failure output (TTL/CMOS). Goes high when a safety logic fault is detected. This output will be low when DIS is high. 7 RESET Safety circuit reset. Leave open fo r normal operation or add a capacitor to ground to extend the reset time. Connect to GND to disable window comparators at APCSET Table 2-1. M02061 Pin Definitions and Descriptions (2 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function 80 k Ω DIS 7 kΩ VCC3 VCC FAIL VCC RESET 190 Ω VCC VCC3

02061-DSH-001-G Mindspeed Technologies® 13 Mindspeed Proprietary and Confidential (M02061-21 only) SCB Safety Circuit Bypass. Connect to GN D or leave open for normal operation. Connect to VCC to allow the bias and modulation outputs to operate even if the safety circuitry indicates a fault. (M02061-12 only) DISDLY Disable delay control. Connect to ground for normal operation. In burst mode operation add a capacitor from this pin to ground to set the maximum disable time. Disable times greater than this maximum will engage the “slow-start” circuitry. 9M O D MON Modulation Current Monitor. Connect directly through a resistor to GND (MONPOL high) or to VCC3 (MONPOL low). The current through this pin is approximately 1/100th of the MODULATION current to the laser. This pin may be left open if the feature is not needed and the M02061 current consumption will be reduced by 0.5mA typically. Table 2-1. M02061 Pin Definitions and Descriptions (3 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function 48 k Ω SCB 24 kΩ VCC VCC3 DISDLY 190 Ω VCC 190 Ω MODMON VCC VCC3

02061-DSH-001-G Mindspeed Technologies® 14 Mindspeed Proprietary and Confidential 10 BIAS MON See MODMON drawing Bias Current Monitor. Connect di rectly through a resistor to GND (MONPOL high) or to VCC3 (MONPOL low). The current through this pin is approximately 1/100th of the BIAS current to the laser. This pin may be left open if the feature is not needed and the M02061 current consumption will be reduced by 0.5mA typically. 11 TxPwr MON Transmit Power Monitor. Connect directly through a resistor to GND (MONPOL high) or to VCC3 (MONPOL low). The current through this pin is approximately the same as the photo diode current into IPIN. This pin may be left open if the feature is not needed and the M02061 current consumption will be reduced by the IPIN current. 12 APC SET Average Power Control, laser bias current adjustment. Connect a resistor between this pin and ground to set the bias current to the laser. The APC loop will control the laser bias current to maintain a voltage of approximately 1.3V at this pin. The current through this pin is approximately the same as the current into IPIN. 13 I PIN Current input from monitor photodiode anode. The APC loop will adjust the laser bias current to maintain a voltage at APCSET of approximately 1.3V and at this pin of approximately one VGS. The voltage at this pin will not exceed 1.6V in normal operation Table 2-1. M02061 Pin Definitions and Descriptions (4 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function 33 Ω TxPwrMON VCC VCC3 APCSET VCC VCC3 30 Ω IPIN VCC

02061-DSH-001-G Mindspeed Technologies® 15 Mindspeed Proprietary and Confidential 14 IBIAS OUT Laser bias current output. Connect directly to laser cathode or at higher bit rates through a ferrite or a resistor to isolate the capacitance of this pin from the modulation drive, (~2pF). Maintain a voltage > 0.7V at this pin. Connect 100 kΩ pullup resistor to VCC if pin 18 (SVCC) is used. 15 GND O Ground for output stage. May be connected directly to ground. At high bit rates (>2Gb/s) an optional inductor or ferrite may be added to reduce switching transients. 16 OUT+ Positive modulation current output. Sinks current when D IN+ is HIGH. Maintain a voltage > 1.6V at this pin when VCC3SEL is high. Maintain a voltage > 1.15V at this pin when VCC3SEL is low. 17 OUT- See OUT+ drawing Negative modulatio n current output. Sinks current when DIN- is HIGH Maintain a voltage > 1.6V at this pin when VCC3SEL is high. Maintain a voltage > 1.15V at this pin when VCC3SEL is low. Table 2-1. M02061 Pin Definitions and Descriptions (5 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function IBIASOUT VCC GND0 VCC OUT+ VCC GND0

02061-DSH-001-G Mindspeed Technologies® 16 Mindspeed Proprietary and Confidential 18 SV CC Switched VCC. 3.3V applications - Connect to laser anode. Safety circuitry will open the switch when a fault is detected and no current will flow through the laser. No capacitance is needed on this node. If capacitance to ground is added, do not exceed 100 pF. 5V applications - Disabled, leave open. 19 SHDWN OUT External switched VCC control signal. Use in 5V applications to create an external SVCC. 20 C APC Automatic power control loop dominant pole capacitor. (Connect a capacitor between this pin and V CC3.) A 2.2 nF capacitor will give less than 1ms enable time and a loop bandwidth < 30kHz. Table 2-1. M02061 Pin Definitions and Descriptions (6 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function SVCC VCC VCC3 SHDWNOUT VCC 12 kΩ 100 Ω CAPC VCC

02061-DSH-001-G Mindspeed Technologies® 17 Mindspeed Proprietary and Confidential 21 V CC3 3.3V applications - Power supply input. Connect to VCC. 5V applications - Internally generated 3.3V. Power supply output. Do not attach to non-M02061 circuitry. For 5 V applications add 12 ohms in series with 100 nF to ground at this pin. 22 PWA Pulse Width Adjust. Connect a resi stor to GND to enable, (between 1kΩ and 20kΩ). Connect to VCC3 to disable. 23 MOD SET See PWA drawing Modulation current control. Connect a resistor to ground to set the modulation current. 24 TC SLOPE See PWA drawing Modulation current temperat ure compensation coefficient adjustment. Connect a resistor to ground to set the temperature compensation coefficient. Leave open to disable the temperature compensation. A 51 kΩ resistor will result in a temperature compensation slope of approximately 0.5%/°C. CENTER PAD GND Connect to GND. Table 2-1. M02061 Pin Definitions and Descriptions (7 of 7) 4x4 mm QFN24 Pin Number Pin Name Pin equivalent load Function VCC3 VCC VCC 190 Ω PWA VCC VCC3 1.28V

02061-DSH-001-G Mindspeed Technologies® 18 Mindspeed Proprietary and Confidential Figure 2-1. QFN24 Pinout Information VCC DIN+ DIN- VCC3SEL MODMON BIASMON CAPC VCC3 PWA TCSLOPE FAIL RESET SCB/DISDLY TXPWRMON APCSET IPIN GND0 OUT+ OUT- SVCC SHDWNOUT MODSET IBIASOUTDIS 71 2 1924 4mm x 4mm GND, connect to PCB ground

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3.0 Functional Description

3.1 Overview

The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to 4.25 Gbps. Using differential PECL data inputs, the M02061 supplies the bias and modulation current required to drive an edge-emitting laser. Monitor outputs and internal safety logic in the M02061 combined with the M02088 will support designs requiring DDMI compliance. The M02061 includes automatic power control to maintain a constant average laser output power over temperature and life. In addition, the modulation current can be temperature compensated to minimize variation in extinction ratio over temperature. Many features are user-adjustable, including the APC (automatic power control) loop bias control (via a monitor photo diode), modulation current, temperature compensation control of modulation current, and pulse-width adjustment. The part may be operated from a 3.3V or 5V supply. The driver modulation output can be AC, DC, or Differentially coupled to the laser. Safety circuitry is also included to provide a latched shut-down of laser bias and modulation current if a fault condition occurs. An internal VCC switch provides redundant shutdown when operating the device from a 3.3V supply. Control is provided to allow for a redundant external switch when operating with a 5V supply, if desired. Figure 3-1 details the functional blocks and pin signals for the M02061 device.

02061-DSH-001-G Mindspeed Technologies® 20 Mindspeed Proprietary and Confidential Figure 3-1. M02061 Block Diagram VCC3 -1.3V Automatic Power Control (laser bias current) TX Disable Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PWA SHDWNOUT SVCC OUT- OUT+ GND0 IBIASOUT IPIN DIS MODSET TCSLOPE MODMO N RESET BIASMO N APCSET CAPC TxPwrMO N DIN- DIN+ Internal Power Bus SCB DISDLY (M02061-21 only) (M02061-12 only) D - FF Output Buffer Laser Driver Input Buffer Internal 3.3V reg.

02061-DSH-001-G Mindspeed Technologies® 21 Mindspeed Proprietary and Confidential Figure 3-2. 2.5Gbps Electrical Eye Diagram Conditions: 80mA modulation current, 27-1 PRBS

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3.2 Features

 High speed operation; suitable for SFP/SFF applications from 155Mbps to 4.25 Gbps. Typical rise/fall times of 55 ps.  Programmable temperature compensation. Modulation output and bias output can be controlled using a few discrete resistors.  Supports DDMI (SFF-8472) diagnostics when combined with the M02088.  DC or AC coupled modulation drive. Up to 100mA modulation current available when AC coupled.  Low overshoot allows high extinction ratio with low jitter.  Automatic Laser Power Co ntrol, with “Slow-Start”.  Differential data inputs to minimize pattern dependent jitter, PECL and CML compatible.  Packaged in a QFN24  3.3V or 5V operation

3.3 General Description

The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to 4.25 Gbps. Using differential PECL data inputs, the M02061 supplies the bias and modulation current required to drive an edge-emitting laser. Monitor outputs and internal safety logic support the DDMI requirements. The M02061 laser driver consists of the following circuitry: an internal regulator, bias current generator and automatic power control, data inputs, buffer with pulse width adjust, modulation current control, modulator output, laser fail indication, disable control, and monitor outputs for the bias current, modulation current, and transmitted power.

3.3.1 Internal Regulator

The M02061 contains an internal 3.3V regulator so high bit rate performance can be achieved with 5V or 3.3V power supply. When operating from a 5V supply (VCC is connected to +5V), an internal regulator provides a voltage of approximately 3.3V to the majority of the on-chip circuitry. The on-chip regulator is internally compensated, requiring no external components. However, for 5V operation with high modulation currents, it may be necessary to add 12 ohms in series with 100nF to ground at VCC3 or the internal power supply may dip and cause a fault condition. When a 3.3V supply is used (V CC and VCC3 connected to 3.3V) the regulator is switched off and the internal circuitry is powered directly through the VCC3 supply pin. The decision as to whether or not the internal regulator is required is made via the VCC3SEL pin, which also determines whether the safety circuitry needs to monitor for proper +5V supply voltage. For 3.3V applications, SVCC is sourced from VCC3 through a switch (leave SVCC open for 5V applications). SVCC is to be used to power the anode of the laser diode and the cathode of the photo diode, any resistive or ferrite pull-ups on the OUT+ and OUT - outputs should be connected directly to VCC. When a fault condition is present, FAIL will assert and the switch sourcing SV CC will open so no current can pass through the laser. SVCC does not need any external capacitance, if capacitance to ground is added at SVCC it should be <100 pF . When SVCC is used, add a 100k Ω pullup resistor to VCC at pin 14 (IBIASout). For 5V operation, an analog switch controlled by SHTDWNOUT can be used to source 5V to the laser anode. In the case of a fault condition, SHTDWNOUT will go high and open the analog switch which will result in an open circuit at the laser. SHTDWNOUT is designed to drive a CMOS logic input. An FET transistor may have excessive Miller capacitance and a fault may be signalled if it turns on too slow.

02061-DSH-001-G Mindspeed Technologies® 24 Mindspeed Proprietary and Confidential VCC and VCC3 status are internally monitored by the M02061 during power-up and normal operation. During power-up the “slow-start” circuitry requires that VCC and VCC3 each reach an acceptable level before enabling bias or modulation current.

3.3.2 Bias Current Generator and Automatic Power Control

To maintain constant average optical power, the M02061 incorporates a control loop to compensate for the changes in laser threshold current over temperature and lifetime. The bias current will be determined by the value of the external resistor RAPCSET and the transfer efficiency between the laser and monitor photo diode. The photo current from the monitor photo diode mounted in the laser package is sunk at IPIN. This photo current is mirrored and an equivalent current is sourced from pins TxPwrMON and APCSET. The APC loop adjusts the laser bias current (hence the monitor diode photo current) to maintain a voltage at APCSET of 1 band-gap voltage or ~1.3V. RAPCSET * IPIN = 1.3 V The APC loop has a time constant determined by CAPC, RAPCSET and the transfer efficiency between the laser and monitor photo diode. The larger the CAPC capacitor the lower the bandwidth of the loop and the larger RAPCSET the lower the loop BW. In general, it is recommended that at least 2.2 nF of external capacitance be added externally between CAPC and VCC3. With use of a 2.2 nF capacitor, the bias current can reach 90% of its final value within 1ms, i.e., bias current rise-time is less than 1ms and the APC loop bandwidth is less than 30 kHz, which should be adequate for bit rates of 155Mbps. (and all higher bit rates). The bias generator also includes a bias current monitor mirror (BIASMON), whose output current is typically 1/100th of the bias current. This pin can be connected directly through a resistor to ground. If this function is not needed this pin can be left open.

3.3.3 Data Inputs

Both CML and PECL inputs signals can be AC coupled to the M02061. These inputs are internally biased to approximately VCC3 - 1.3V. In most applications the data inputs are AC coupled with controlled impedance pcb traces which will need to be terminated externally with a 100Ω or 150Ω resistor between the + and - inputs. PECL and CML signals may be DC coupled to the M02061 data inputs when both the M02061 and the source of the input signals are operating from 3.3V supplies. If the M02061 is operating from a 5V supply, PECL and CML Table 3-1. Pin Connection for 3.3V and 5V V CC Pin Connection For: VCC = 3.3V VCC = 5V Pins Dependent on VCC Voltage VCC3 Connect to VCC Reference for CAPC and PWA SVCC Laser Anode OPEN SHDWNOUT OPEN External safety control switch CAPC Capacitor between CAPC and VCC3 or VCC Capacitor between CAPC and VCC3 (not VCC) PWA Connect to VCC3 or VCC to disable Connect to V CC3 to disable (not VCC) VCC3SEL Connect to VCC3 or VCC Connect to GND

02061-DSH-001-G Mindspeed Technologies® 25 Mindspeed Proprietary and Confidential signals may be DC coupled as long as the source of the input signals is operating at a 3.3V supply and the signals are referenced to VCC3 at the M02061.

3.3.4 Pulse Width Adjust

The data output buffer incorporates pulse-width adjustment control to compensate for laser pulse width distortion. A potentiometer can be connected between the PWA input and GND for adjustment (programming resistance should be between 1kΩ and 20kΩ). By adjusting the potentiometer, the pulse-width can be adjusted over a range of approximately ±40 ps. Pulse width control can be disabled by connecting PWA to V CC3, resulting in roughly a 50% crossing point at the output and reducing supply current by approximately 1.5mA.

3.3.5 Modulation Control

There are programmable control lines for controlling the modulation current and its temperature compensation. These inputs can be programmed simply with a resistor to ground. The modulation current amplitude is controlled by the MODSET input pin. The modulation current is temperature compensated by the TCSLOPE inputs. The temperature compensation is independent of the setting. If the temperature compensation at TCSLOPE is disabled, the modulation output current is simply: IOUT = 100 x (1.3V / RMODSET) Where RMODSET is the resistance from pin MODSET to ground. Figure 3-5 is the most accurate method for selecting RTCslope. However, you can also select RTCSLOPE using the following relationship: RTCSLOPE = 19.5*(TC)-1.5, where TC is the desired slope of the modulation current from 25°C to 85°C in%/°C and RTCSLOPE is in kΩ. If no temperature compensation is desired, leave RTCSLOPE open. In any case, RTCSLOPE will have negligible effect at M02061 case temperatures below 10°C. For example: Given a laser with a desired modulation current at low temperatures of 30mA and a temperature coefficient of - 0.5%/°C at high temperatures (which will require a laser driver temperature coefficient of +0.5%). Choose RMODSET = 100 x (1.3V / 30mA) = 4.3kΩ Choose RTCSLOPE =19.5*(0.5)-1.5 kΩ = 56kΩ.

02061-DSH-001-G Mindspeed Technologies® 26 Mindspeed Proprietary and Confidential

3.3.6 Modulator Output

The output stage is designed to drive a 25Ω output load over a wide range of currents and circuit architectures. The laser may be AC, DC, or Differentially coupled depending on the supply voltage. Figure 3-5. TC Slope Compensation Behavior Table 3-2. Modulation Current Maximums Max Modulation Current Max Bias Current VCC=5V, Laser DC coupled 80 60 VCC=5V, Laser AC coupled 80 (1) 60 VCC=3.3V, Laser DC coupled 100 (2) 100 VCC=3.3V, Laser AC coupled 100 100 When differentially coupling, the maximum modulation and bias current is determined by either the AC or DC coupling of the OUT+ or OUT- output, whichever has the minimum rating. 1. When AC coupling the output should never be allowed to swi ng above the absolute voltage rating of the part, which is 6V. -30.00 -20.00 -10.00 0.00 10.00 20.00 30.00 40.00 50.00 60.00 -40 -20 0 20 40 60 80 100 Ambient Temperature in degrees C % change in modulation current RTCslope: 22k 27k 33k 39k 47k 51k 62k 75k 82k 100k 120k 150k 220k 390k 750k open

02061-DSH-001-G Mindspeed Technologies® 27 Mindspeed Proprietary and Confidential When DC coupled, OUT+ should be connected through a series resistor to the laser such that the total impedance seen at the output is 25 ohms. This will result in the optimum pulse response while allowing the maximum modulation current (see Figure 4-2). The output can also be AC coupled to the laser. This is the required operating mode when using a 3.3V supply (unless the laser has a small forward voltage and OUT+ will not go below 1.6V). When AC coupled the dynamic resistance seen by OUT+ should still be 25 ohms. In addition to a resistor in series with the laser, a capacitor is added in series and a ferrite is used to pull up the collector at OUT+ to V CC. When the laser is AC coupled, the OUT - pin is usually tied to the laser anode through an AC coupled series resistor which matches the impedance seen by the OUT+ pad (see Figure 4-1). The output stage also has a separate current path to GND labelled GND0. This isolates the output switching currents from the rest of the system.

3.3.7 Fail Output

The M02061 has a FAIL alarm output which is compatible with the TX_FAULT signalling requirements of common pluggable module standards. The ESD protection on this pin provides a true open collector output that can withstand significant variation in VCC when signalling between circuit boards. Also, if the M02061 loses power the pull-up will signal a fail condition. In a simple static protection scheme used by other ICs the protection diodes would clamp the FAIL signal to ground when the chip loses power. Figure 3-6. Modulator Output OUT+ 0.4pF 0.75 nH OUT- GNDA (optional external inductance) * Denotes bond wire internal to MLF package 0.75 nH * For VCC =5V, OUT+ and OUT- should not be driven below 1.15V For VCC = 3.3V, OUT+ and OUT- should not be driven below 1.6V.

02061-DSH-001-G Mindspeed Technologies® 28 Mindspeed Proprietary and Confidential

3.3.8 TX Disable and Disable Delay Control

The DIS pin is used to disable the transmit signal (both the modulation and bias current are disabled when DIS = high). The DIS input is compatible with TTL levels regardless of whether VCC = 5V or VCC = 3.3V. The external 4.7kΩ and 10kΩ pull-up resistor required by most interface standards is not needed because this pin has an internal 7kΩ resistor to VCC. The DISDL Y pin is used in conjunction with the DIS pin to control bias current enable time. In normal operation the DISDL Y pin should be connected to ground. In this case, each time DIS transitions from high to low the bias current will be enabled by the “slow-start” circuitry (enable time of less than 1 ms with a C APC = 2.2 nF). For burst mode operation a capacitor C is added to the DISDL Y pin, the slow-start circuitry is disabled for approximately T = 3 * 106 (sec/F) * C (F) following the DIS high transition (see figure 8). If the part is enabled (DIS transitions low) during this time the bias and modulation current will quickly return to within 90% of their final value (in less than 500ns). If DIS transitions low after the DISDL Y time the slow-start circuitry will engage and the bias current will not return to its final value for approximately 1ms (depending on the CAPC capacitor value).

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3.3.9 TX Disable Control

The DIS pin is used to disable the transmit signal (both the modulation and bias current are disabled when DIS = high). The DIS input is compatible with TTL levels regardless of whether VCC = 5V or VCC = 3.3V. The external 4.7kΩ and 10kΩ pull-up resistor required by most interface standards is not needed because this pin has an internal 7kΩ resistor to VCC. Figure 3-7. DIS and DISDLY Timing DIS DISDLY OUT+ IBIASOUT DIS DISDLY OUT+ IBIASOUT EPON Burst Mode Operation Normal Operation, (slow-start whenever part enabled) t_on BM < 500ns for I MOD > 10mAt_off BM < 500ns t_off< 10μs t_on< 1ms, depending on C APC

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3.3.10 Monitor Outputs

To facilitate complying with laser safety and DDMI1 requirements, output monitors are provided for transmit power (TxPwrMON) bias (BIASMON) and modulation current (MODMON). These outputs will source current proportional to the emitted optical power (TxPwrMON) the bias current (BIASMON) and modulation current (MODMON). These pins should be terminated with a resistor to ground that sets the desired full-scale voltage (not to exceed VCC3-1V). Using a monitor polarity selection (MONPOL) these monitors can be set to sink current instead of source current. They will then need to be terminated with a resistor to VCC3 and the induced voltage should not exceed 2.5V. If the outputs of these monitors are not needed, MONPOL, TxPwrMON, BIASMON, and MODMON can all be left floating and the chip current consumption will be reduced by the value of the monitor currents.

3.4 Laser Eye Safety

Using this laser driver in the manner described herein does not ensure that the resulting laser transmitter complies with established standards such as IEC 825. Users must take the necessary precautions to ensure that eye safety and other applicable standards are met. Note that determining and implementing the level of fault tolerance required by the applications that this part is going into is the responsibility of the transmitter designer and manufacturer since the application of this device cannot be controlled by Mindspeed.

3.4.1 Safety Circuitry

On the M02061-12 with DISDL Y on pin 8, SCB is internally bonded to ground so SCB is always in a logic low state. When SCB is high the OUTP , BIASout and SVCC outputs will not be disabled when FAIL asserts (FAIL goes high). The outputs are only disabled by making DIS high. The FAIL output will also ignore much of the safety sensing circuitry when SCB is high. However, it will monitor the state of the window comparators at pin APCSET. The bias current is controlled to nominally maintain the voltage at APCSET to 1.3V. The threshold levels at the window comparators around APCSET are specified by the parameters VBH and VBL as shown in the table below. This provides the same level of eye safety protection as our previous generation of laser drivers. The current sourced out of pin APCSET is equal to the current into pin IPIN sourced from the laser monitor photo diode. If the laser is emitting excess power this will be reflected in the IPIN current and the voltage at APCSET will go high and the FAIL pin will assert. If IPIN is not connected to the laser monitor photo diode then the voltage at APCSET will fall and FAIL will assert. When SCB is low, safety circuitry in the M02061 will disable the modulation and bias current and assert the FAIL output immediately upon detecting a fault condition. In addition, the supply voltage that sources the laser (SVCC or an external switch controlled by SHDWNOUT) will immediately go open circuit and prevent any current from passing through the laser. Fault conditions checked by the M02061 include shorts to ground or VCC of all pins which can increase the laser modulation or bias current. For an initialization sequence to be successful, all the fault detection monitors must signal that the chip is “healthy”. When DIS goes low, pins are checked for shorts to ground or VCC and a FAIL condition is latched if there is a fault. If the state of the pins is OK, a one-shot at the reset pin begins a countdown which will latch a FAIL condition if the bias current has not stabilized to an acceptable level during the one-shot time. The one-shot can be extended with an external capacitor connected from the RESET pin to ground. The one-shot1 width is approximately: 1.The one-shot is actually comprised of an oscillator and 10-bit counter.

02061-DSH-001-G Mindspeed Technologies® 31 Mindspeed Proprietary and Confidential TONE-SHOT = 3 ms + (0.3 ms/pF) x (external capacitance).

3.5 Fault Conditions when SCB is Low

This section describes the M02061 operating modes during fault conditions. Over voltage, under voltage, pins shorted to VCC and pins shorted to ground are included in the fault table. Figure 3-8. Safety Circuit Block Diagram, for SCB Pin Low Table 3-3. Circuit Response to Single-poi nt Fault Conditions, when SCB is Low 1 2 (1 of 2) Pin Name Circuit Response to Over-voltage Condition or Short to VCC Circuit Response to Under-Voltage Condition or Short to Ground VCC Bias and modulation outputs are disabled once VCC rises above the supply detection (high voltage) threshold Bias and modulation outputs are disabled once VCC drops below the supply detection (low voltage) threshold DIN+, DIN- The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1, 2) The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1, 2) VCC3SEL Does not affect laser power. D oes not affect laser power. Vcc Pin 5v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits 5v Mode: AND Vcc3 Pin 3.3v Hi/Lo Limits 3.3v Mode: AND ‘1’ Vcc Pin 5v Hi/Lo Limits VccOK Detection: Vcc Pin 5v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits 5v Mode: AND Vcc Pin 5v Hi/Lo Limits Vcc Pin 5v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits 5v Mode: ANDAND Vcc3 Pin 3.3v Hi/Lo Limits 3.3v Mode: AND ‘1’ Vcc Pin 5v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits Vcc3 Pin 3.3v Hi/Lo Limits 3.3v Mode: AND ‘1’ AND ‘1’ Vcc Pin 5v Hi/Lo Limits Vcc Pin 5v Hi/Lo Limits VccOK Detection: CrudeFaults Detection: OutP Capc MODset IBout > 300mV > 300mV > 300mV > 300mV Delay Set SRlatch : Q Reset ONE-SHOT: StartStartStart 3ms + Tcapt=0 PULSE NOTE: Pulse stays high if Reset pin is GNDed . RESET optional cap for longer T_init ANDANDAND Window Compare: HI Limit MPCset LOW Limit OROROR Set SRlatch : QResetANDANDAND ANDANDAND ANDANDAND BiasOK Detection: OUTPUT_ENABLE VCC_OK CrudeFaults_OK BIAS_OK Latch for CrudeFaults Latch for Bias_OK If chip is ‘healthy’, then Enable the outputs and Start 3msec Reset Pulse(one-shot) (open-collector) FAILout (open-collector) FAILout OROR DIS

02061-DSH-001-G Mindspeed Technologies® 32 Mindspeed Proprietary and Confidential DIS Bias and modulation outputs are disabled. 3.3V operation - SVCC is opened. 5V operation - SHDWNOUT goes high. Does not affect laser power (normal condition for circuit operation). FAIL Does not affect laser power . Does not affect laser power. RESET Does not affect laser power . Does not affect laser power. MODMON Does not affect laser power. D oes not affect laser power. BIASMON Does not affect laser power. D oes not affect laser power. TxPWRMON Does not affect laser power. D oes not affect laser power. APCSET A fault state occurs.(1) A fault state occurs.(1) IPIN A fault state occurs.(1) A fault state occurs.(1) IBIASOUT The laser will be turned off, then a fault state occurs.(1) A fault state occurs.(1) OUTP Laser modulation is prevented; the APC loop will increase the bias current to compensate for the drop in laser power if it is DC coupled. If the set output power can not be obtained, a fault state occurs.(1, 2) A fault state occurs.(1) OUTN Does not affect laser power. D oes not affect laser power. SVCC Does not affect laser power. Laser bias current will be shut off and a fault state occurs.(1) CAPC Laser bias current will be shut off, then a fault state occurs.(1) A fault state occurs.(1) VCC3 Bias and modulation outputs are disabled once VCC3 rises above the supply detection (high voltage) threshold Bias and modulation outputs are disabled once VCC3 drops below the supply detection (low voltage) threshold PWA Does not affect laser power . Does not affect laser power SHDWNOUT Does not affect laser power. if this pin is used to control an external switch, laser current is disabled and fault state occurs.(1) Does not affect laser power. MODSET The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1, 2) A fault state occurs.(1) TCSLOPE Does not affect laser power. May affect laser power. If this is the case, the APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs. (1, 2) SCB Does not affect laser power . Does not affect laser power. DISDLY Does not affect laser pow er. Does not affect laser power. NOTES: 1. A fault state will assert the FAIL output, disable bias and modulation outputs and will either open the switch at SVCC (3.3V operation) or SHDWNOUT will go high (5V operation). 2. Does not affect laser power when th e output is AC coupled to the laser. Table 3-3. Circuit Response to Single-poi nt Fault Conditions, when SCB is Low 1 2 (2 of 2) Pin Name Circuit Response to Over-voltage Condition or Short to VCC Circuit Response to Under-Voltage Condition or Short to Ground

02061-DSH-001-G Mindspeed Technologies® 33 Mindspeed Proprietary and Confidential

4.0 Applications Information

4.1 General

 SFP and SFF Modules  1G/2G/4G Fibre Channel modules  Short reach and Metro SONET/SDH Figure 4-1 and Figure 4-2 illustrate typical applications for 3.3/AC coupled and 5V/DC coupled laser. Figure 4-1. Application Diagram, V CC = 3.3V Laser AC Coupled Example Input Buffer VCC3 -1.3V Internal 3.3V reg. Input Buffer D - FF Output Buffer Laser Driver Automatic Power Control (laser bias current) Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PWA SH DWNOUT SVCC OUT- OUT+ GND0 IBIASOUT IPIN DIS MODSET TCSLOPE MODMON RESET BIASMON APCSET CAPC TxPwrMON DIN- DIN+ Internal Power Bus VCC3 VCC VCC 3 VCC VCC SCB DISDLY (M02061-12 only) (M02061-21 only) TX Disable VCC VCC 100k

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4.2 Video Operation

The M02061 can be used to transmit digital video optical data even in the presence of the pathological signal. This is done by fully DC coupling the signal from the input to the laser output.In most data communications applications, AC coupling occurs at 3 points in a laser driver schematic: the data inputs, the APC control, and coupling the modulation current to the laser. In the M02061 DC coupling can be used at all 3 of these points.The data inputs can be DC coupled using PECL or CML levels (see Section 3.3.3, “Data Inputs”). LVDS signals can be DC coupled with level shifting.The APC of the bias current is controlled by feedback from the monitor photo diode in the laser package in most communications applications. In video applications this monitor photo diode should not be used if the pathological pattern may occur. Instead, the APC should be controlled in an “open loop” configuration. (Open loop simply means a monitor photo diode is not used). In the open loop configuration the APC is controlled by a resistor or a thermistor network or a look-up table. This removes AC time constants from the bias current. In Figure 4-3 the BIASmon pin is connected to the APCset pin. In this case the bias current is IBIAS = 100 x (1.3V / RAPCset). The modulation current output OUT+ can be DC coupled to the laser as shown in Figure 4-3. There are no AC time constants in the modulation current amplitude in this configuration. Figure 4-2. Application Diagram, V CC = 5V Laser DC Coupled Example Input Buffer VCC3 -1.3V Internal 3.3V reg. Input Buffer D - FF Output Buffer Laser Driver Automatic Power Control (laser bias current) Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PWA SH DWNOU T SVCC OUT- OUT+ GND0 IBIASOUT IPIN DIS MODSET TCSLOPE MO DMO N RESET BIASMO N APCSET CAPC TxPwrMO N DIN- DIN+ Internal Power Bus VCC3 VCC=5V VCC VCC3 VCC3 VCC SCB DISDLY (M02061-12 only) (M02061-21 only) TX Disable SPST switch

02061-DSH-001-G Mindspeed Technologies® 35 Mindspeed Proprietary and Confidential Figure 4-3. Video Application Block Diagram Input Buffer VCC3 -1.3V Internal 3.3V reg. Input Buffer D - FF Output Buffer Automatic Power Control (laser bias current) Safety Circuitry with Latched Fault Modulation Control VCC VCC3 FAIL VCC3SEL PWA SH DWNOU T SVCC OUT- OUT+ GND0 IBIASOUT IPIN DIS MODSET TCSLOPE MO DMO N RESET BIASMO N APCSET CAPC TxPwrMO N DIN- DIN+ Internal Power Bus VCC3 VCC=5V VCC VCC3 VCC3 VCC SCB DISDLY (M02061-12 only) (M02061-21 only) TX Disable SPST switch Laser Driver

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5.0 Package Specification

Figure 5-1. QFN24 Package Information Note: View is for a 20 pin package. All dimensions in the tables apply for the 24 pin package

www.mindspeed.com General Information: Telephone: (949) 579-3000 Headquarters - Newport Beach 4000 MacArthur Blvd., East Tower Newport Beach, CA 92660 © 2012 Mindspeed Technologies®, Inc. All rights reserved. Information in this document is provided in connection with Mindspeed Technologies® ("Mindspeed®") products. These materials are provided by Mindspeed as a service to its customers and may be used for informational purposes only. Except as provided in Mindspeed’s Terms and Conditions of Sale for such products or in any separate agreement related to this document, Mindspeed assumes no liability whatsoever. Mindspeed assumes no responsibility for errors or omissions in these materials. Mindspeed may make changes to specifications and product descriptions at any time, without notice. Mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF MINDSPEED PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY , OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. MINDSPEED FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. MINDSPEED SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. Mindspeed customers using or selling Mindspeed products for use in such applications do so at their own risk and agree to fully indemnify Mindspeed for any damages resulting from such improper use or sale. 02061-DSH-001-G Mindspeed Technologies® 37 Mindspeed Proprietary and Confidential