TS5A12301E

TS5A12301E IEC Level 4 ESD-protected 0.75-Ω SPDT Analog Switch With 1.8-V Compatible Input Logic datasheet (Rev. C)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SCES707,C]
• PDF pages: 26

Technical content

Copyright © 2016, Texas Instruments Incorporated Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community Reference Design An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TS5A12301E SCES707C –AUGUST 2008–REVISED DECEMBER 2016 TS5A12301EIECLevel4ESD-protected0.75-ΩSPDTAnalogSwitch With1.8-VCompatibleInputLogic

1 Features

1• Low ON-State Resistance (0.75 Ω)

• Low Charge Injection
• Excellent ON-State Resistance Matching
• Isolation in Power-Down Mode, VCC = 0
• Specified Break-Before-Make Switching
• 2.25-V to 5.5-V Power Supply (VCC)
• 6-MΩ Input Pulldown Allows Control Input (IN) to Be Unconnected
• 1.8-V Compatible Control Input Threshold Independent of VCC
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22 – 3000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101)
• ESD Performance COM Port to GND – 8000-V Human-Body Model (A114-B, Class II) – ±8-kV Contact Discharge (IEC 61000-4-2) – ±15-kV Air-Gap Discharge (IEC 61000-4-2)

2 Applications

• Cell Phones
• PDAs
• Portable Instrumentation
• MP3 Players
• Portable Media Players

3 Description

The TS5A12301E device is a bidirectional, 1-channel, single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with excellent channel-to-channel ON-state resistance matching and the break-before-make feature to prevent signal distortion during the transferring of a signal from one path to another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications. The control input (IN) pin can be connected to low-voltage GPIOs, allowing it to be controlled by 1.8-V signals. The TS5A12301E has ±15-kV air-gap discharge and ±8-kV contact discharge ESD protection for the COM port to GND, which makes it compliant with the IEC Level 4 ESD standard (IEC 61000-4-2). Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TS5A12301E DSBGA (6) 1.16 mm × 0.76 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic

SCES707C –AUGUST 2008–REVISED DECEMBER 2016 www.ti.com Product Folder Links: TS5A12301E Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated Table of Contents

12.1 Receiving Notification of Documentation Updates 19

13 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (April 2011) to Revision C Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
• Moved the on-state switch current and on-state peak switch current parameters to the Recommended Operating Changes from Revision A (December 2009) to Revision B Page

B A 2 1 C B A 1 2 C (Laser Marking View) (Bump View) TS5A12301E www.ti.com SCES707C –AUGUST 2008–REVISED DECEMBER 2016 Product Folder Links: TS5A12301E Submit Documentation FeedbackCopyright © 2008–2016, Texas Instruments Incorporated

5 Pin Configuration and Functions

NAME NO. COM B2 I/O Common signal path GND B1 — Ground IN A2 I Digital control: High = COM connected to NO Low = COM connected to NC Floating = COM connected to NC NC C1 I/O Normally closed signal path NO A1 I/O Normally open signal path VCC C2 — Power supply

SCES707C –AUGUST 2008–REVISED DECEMBER 2016 www.ti.com Product Folder Links: TS5A12301E Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The algebraic convention (whereby the most negative value is a minimum and the most positive value is a maximum) (3) All voltages are with respect to ground (unless otherwise specified). (4) This value is limited to 5.5 V maximum. (5) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2) MIN MAX UNIT VCC Supply voltage(3) –0.5 6.5 V VNC, VNO, VCOM Analog voltage(3)(4) –0.5 VCC + 0.5 V IIK Analog port diode current VCC < VNC, VNO, VCOM, or VNC, VNO, VCOM < 0 –50 50 mA VIN Digital input voltage(3)(5) –0.5 6.5 V IIK Digital input clamp current VI < 0 –50 mA ICC, IGND Continuous current through VCC or GND –100 100 mA Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±8000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±8000 Contact discharge (IEC 61000-4-2) 8000 Air-gap discharge (IEC 61000-4-2) 15000 (1) Pulse at 1-ms duration < 10% duty cycle

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage 2.25 5.5 V VNC, VNO, VCOM Analog voltage 0 VCC V VIN Digital input voltage 0 5.5 V INC, INO, ICOM On-state switch current VNC, VNO, VCOM = 0 to VCC –450 450 mA On-state peak switch current(1) VNC, VNO, VCOM = 0 to VCC –700 700 TA Operating temperature –40 85 °C

www.ti.com SCES707C –AUGUST 2008–REVISED DECEMBER 2016 Product Folder Links: TS5A12301E Submit Documentation FeedbackCopyright © 2008–2016, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) The package thermal impedance is calculated in accordance with JESD 51-7.

6.4 Thermal Information

THERMAL METRIC(1) TS5A12301E UNITYFP (DSBGA)

6 PINS

RθJA Junction-to-ambient thermal resistance(2) 123.4 °C/W RθJC(top) Junction-to-case (top) thermal resistance 1.9 °C/W RθJB Junction-to-board thermal resistance 37.6 °C/W ψJT Junction-to-top characterization parameter 0.4 °C/W ψJB Junction-to-board characterization parameter 37.7 °C/W (1) The algebraic convention (whereby the most negative value is a minimum and the most positive value is a maximum)

6.5 Electrical Characteristics – 5-V Supply

VCC = 4.5 V to 5.5 V and TA = –40°C to 85°C (unless otherwise noted)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG SWITCH ron ON-state resistance VNO or VNC = 2.5 V, ICOM = –100 mA, and VCC = 4.5 V (see Figure 12) TA = 25°C 0.5 0.75 Ω TA = –40°C to 85°C 0.8 Δron ON-state resistance match between channels VNO or VNC = 2.5 V, ICOM = –100 mA, and VCC = 4.5 V (see Figure 12) TA = 25°C 0.05 0.1 Ω TA = –40°C to 85°C 0.1 ron(flat) ON-state resistance flatness 0 ≤ (VNO or VNC) ≤ VCC, ICOM = –100 mA, VCC = 4.5 V, and TA = 25°C (see Figure 12) 0.15 ΩVNO or VNC = 1 V, 1.5 V, 2.5 V, ICOM = –100 mA, and VCC = 4.5 V (see Figure 12) TA = 25°C 0.1 0.2 TA = –40°C to 85°C 0.25 INO(OFF), INC (OFF) NO and NC OFF leakage current VNO = 1 V, 4.5 V, VCOM = 4.5 V, 1 V, VNC = open, or VNO = 1 V, 4.5 V, VCOM = 4.5 V, 1 V, VNO = open, and VCC = 5.5 V (see Figure 13) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –100 100 INO(PWROFF), INC (PWROFF) NO and NC PWROFF leakage current VNO or VNC = 0 V to 5.5 V, VCOM = 5.5 V to 0 V, and VCC = 0 V (see Figure 13) TA = 25°C –10 10 µA TA = –40°C to 85°C –10 10 INO(ON) NC and NO ON leakage current VNO = 1 V, 4.5 V, VCOM, VNC = open, or VNC = 1 V, 4.5 V, VCOM, VNO = open, and VCC = 5.5 V (see Figure 14) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –200 200 ICOM(ON) COM ON leakage current VCOM = 1 V, 4.5 V, VNO and VNC = open, or VCOM = 1 V, 4.5 V, VNO or VNC = open, and VCC = 5.5 V (see Figure 14) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –200 200 ICOM(PWROFF) COM OFF leakage current VNO or VNC = 0 V to 5.5 V, VCOM = 5.5 V to 0 V, and VCC = 0 V (see Figure 13) TA = 25°C –10 10 µA TA = –40°C to 85°C –10 10 DIGITAL CONTROL INPUT (IN) VIH Input logic high VCC = 5.5 V and TA = –40°C to 85°C 1.05 5.5 V VIL Input logic low VCC = 5.5 V and TA = –40°C to 85°C 0 0.65 V IIH, IIL Input leakage current VIN = 1.95 V or 0 V, VCC = 5.5 V, and TA = –40°C to 85°C –0.05 0.5 µA rIN Input resistance VIN = 1.95 V, VCC = 5.5 V, and TA = –40°C to 85°C 6 MΩ

SCES707C –AUGUST 2008–REVISED DECEMBER 2016 www.ti.com Product Folder Links: TS5A12301E Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated Electrical Characteristics – 5-V Supply (continued) VCC = 4.5 V to 5.5 V and TA = –40°C to 85°C (unless otherwise noted)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DYNAMIC tON Turnon time VCOM = VCC, RL = 50 Ω, CL= 35 pF (see Figure 16) VCC = 5 V and TA = 25°C 110 225 ns VCC = 4.5 V and TA = –40°C to 85°C 250 tOFF Turnoff time VCOM = VCC, RL = 50 Ω, CL = 35 pF (see Figure 16) VCC = 5 V and TA = 25°C 100 215 ns VCC = 4.5 V and TA = –40°C to 85°C 225 tBBM Break-before-make time VCOM = VCC, RL = 50 Ω, CL = 35 pF (see Figure 17) VCC = 5 V and TA = 25°C 1 10 15 ns VCC = 4.5 V and TA = –40°C to 85°C 1 20 QC Charge injection VGEN = 0, RGEN = 0, CL = 1 nF, VCC = 5 V, and TA = 25°C (see Figure 21) 97 pC CNO(OFF) NO OFF capacitance VNC or VNO = VCC or GND, switch OFF, VCC = 5 V, and TA = 25°C (see Figure 15) 28 pF CNC(ON), CNO(ON) NC and NO ON capacitance VNC or VNO = VCC or GND, switch ON, VCC = 5 V, and TA = 25°C (see Figure 15) 112 pF CCOM(ON) COM ON capacitance VCOM = VCC or GND, switch ON, VCC = 5 V, and TA = 25°C (see Figure 15) 112 pF CI Digital input capacitance VIN = VCC or GND, and TA = 25°C (see Figure 15) 3 pF BW Bandwidth RL = 50 Ω, switch ON, VCC = 5 V, and TA = 25°C (see Figure 18) 55 MHz OISO OFF isolation RL = 50 Ω, f = 1 MHz, VCC = 5 V, and TA = 25°C (see Figure 19) –63 dB XTALK Crosstalk RL = 50 Ω, f = 1 MHz, VCC = 5 V, and TA = 25°C (see Figure 20) –63 dB THD Total harmonic distortion RL = 600 Ω, CL = 50 pF, f = 20 Hz to 20 kHz, VCC = 5 V, and TA = 25°C (see Figure 22) 0.003 SUPPLY ICC Positive supply current VIN = VCC or GND, VCC = 5.5 V, and TA = –40°C to 85°C 10 µA

www.ti.com SCES707C –AUGUST 2008–REVISED DECEMBER 2016 Product Folder Links: TS5A12301E Submit Documentation FeedbackCopyright © 2008–2016, Texas Instruments Incorporated (1) The algebraic convention (whereby the most negative value is a minimum and the most positive value is a maximum) 6.6 Electrical Characteristics – 3.3-V Supply VCC = 3 V to 3.6 V and TA = –40°C to 85°C (unless otherwise noted)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG SWITCH ron ON-state resistance VNO or VNC = 2 V, ICOM = –100 mA, switch ON, and VCC = 3 V (see Figure 12) TA = 25°C 0.75 0.9 Ω TA = –40°C to 85°C 1.2 Δron ON-state resistance match between channels VNO or VNC = 2 V, 0.8 V, ICOM = –100 mA, switch ON, and VCC = 3 V (see Figure 12) TA = 25°C 0.1 0.15 Ω TA = –40°C to 85°C 0.15 ron(flat) ON-state resistance flatness 0 ≤ (VNO or VNC) ≤ VCC, ICOM = –100 mA, switch ON, VCC = 3 V, and TA = 25°C (see Figure 12) 0.2 ΩVNO or VNC = 0.8 V, 2 V, ICOM = –100 mA, switch ON, and VCC = 3 V (see Figure 12) TA = 25°C 0.1 0.2 TA = –40°C to 85°C 0.3 INO(OFF), INC (OFF) NO and NC OFF leakage current VNO = 1 V, 3 V, VCOM = 3 V, 1 V, VNC = open, or VNC = 1 V, 3 V, VCOM = 3 V, 1 V, VNO = open, switch OFF, and VCC = 3.6 V (see Figure 13) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –50 50 INO(PWROFF), INC (PWROFF) NO and NC PWROFF leakage current VNO or VNC = 0 V to 3.6 V, VCOM = 3.6 V to 0 V, switch OFF, and VCC = 0 V (see Figure 13) TA = 25°C –10 10 µA TA = –40°C to 85°C –10 10 INO(ON) NC and NO ON leakage current VNO = 1 V, 3 V, VNC and VCOM = open, or VNC = 1 V, 3 V, VNO and VCOM = open, switch ON, and VCC = 3.6 V (see Figure 14) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –100 100 ICOM(ON) COM ON leakage current VCOM = 1 V, VNO and VNC = open, or VCOM = 3 V, VNO and VNC = open, and VCC = 3.6 V (see Figure 14) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –100 100 ICOM(PWROFF) COM OFF leakage current VNO or VNC = 0 V to 3.6 V, VCOM = 3.6 V to 0 V, and VCC = 0 V (see Figure 13) TA = 25°C –10 10 µA TA = –40°C to 85°C –10 10 DIGITAL CONTROL INPUT (IN) VIH Input logic high VCC = 3.6 V and TA = –40°C to 85°C 1.05 5.5 V VIL Input logic low VCC = 3.6 V and TA = –40°C to 85°C 0 0.65 V IIH, IIL Input leakage current VI = 1.95 V or 0 V, VCC = 3.6 V, and TA = –40°C to 85°C –0.05 0.5 µA rIN Input resistance VI = 1.95 V, VCC = 3.6 V, and TA = –40°C to 85°C 6 MΩ DYNAMIC tON Turnon time VCOM = VCC, RL = 50 Ω, CL= 35 pF (see Figure 16) VCC = 3.3 V and TA = 25°C 72 175 ns VCC = 3 V and TA = –40°C to 85°C 185 tOFF Turnoff time VCOM = VCC, RL = 50 Ω, CL = 35 pF (see Figure 16) VCC = 3.3 V and TA = 25°C 105 165 ns VCC = 3 V and TA = –40°C to 85°C 170 tBBM Break-before-make time VCOM = VCC, RL = 50 Ω, CL = 35 pF, (see Figure 17) VCC = 3.3 V and TA = 25°C 1 16 30 ns VCC = 3 V and TA = –40°C to 85°C 1 35 QC Charge injection VGEN = 0, RGEN = 0, CL = 1 nF (see Figure 21) VCC = 3.3 V and TA = 25°C 97 pC CNO(OFF) NO OFF capacitance VNO = VCC or GND, switch OFF, VCC = 3.3 V, and TA = 25°C (see Figure 15) 28 pF CNC(ON), CNO(ON) NC and NO ON capacitance VNC or VNO = VCC or GND, switch ON, VCC = 3.3 V, and TA = 25°C (see Figure 15) 115 pF

SCES707C –AUGUST 2008–REVISED DECEMBER 2016 www.ti.com Product Folder Links: TS5A12301E Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated Electrical Characteristics – 3.3-V Supply (continued) VCC = 3 V to 3.6 V and TA = –40°C to 85°C (unless otherwise noted)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CCOM(ON) COM ON capacitance VCOM = VCC or GND, switch ON, VCC = 3.3 V, and TA = 25°C (see Figure 15) 115 pF CI Digital input capacitance VIN = VCC or GND, VCC = 3.3 V, and TA = 25°C (see Figure 15) 3 pF BW Bandwidth RL = 50 Ω, switch ON, VCC = 3.3 V, and TA = 25°C (see Figure 18) 54 MHz OISO OFF isolation RL = 50 Ω, f = 1 MHz, VCC = 3.3 V, and TA = 25°C (see Figure 19) –63 dB XTALK Crosstalk RL = 50 Ω, f = 1 MHz, VCC = 3.3 V, and TA = 25°C (see Figure 20) –63 dB THD Total harmonic distortion RL = 600 Ω, CL = 50 pF, f = 20 Hz to 20 kHz, VCC = 3.3 V, and TA = 25°C (see Figure 22) 0.004% SUPPLY ICC Positive supply current VIN = 1.95 V or GND, VCC = 3.6 V, and TA = 25°C 10 µA (1) The algebraic convention (whereby the most negative value is a minimum and the most positive value is a maximum) 6.7 Electrical Characteristics – 2.5-V Supply VCC = 2.25 V to 2.75 V and TA = –40°C to 85°C (unless otherwise noted)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG SWITCH ron ON-state resistance VNO or VNC = 1.8 V, ICOM = –100 mA, switch ON, and VCC = 2.25 V (see Figure 12) TA = 25°C 1.1 1.3 Ω TA = –40°C to 85°C 1.6 Δron ON-state resistance match between channels VNO or VNC = 1.8 V, 0.8 V, ICOM = –100 mA, switch ON, and VCC = 2.25 V (see Figure 12) TA = 25°C 0.15 0.2 Ω TA = –40°C to 85°C 0.2 ron(flat) ON-state resistance flatness 0 ≤ (VNO or VNC) ≤ VCC, ICOM = –100 mA, switch ON, VCC = 2.25 V, and TA = 25°C (see Figure 12) 0.4 ΩVNO or VNC = 0.8 V, 1 V, 1.8 V, ICOM = –100 mA, switch ON, and VCC = 2.25 V (see Figure 12) TA = 25°C 0.25 0.5 TA = –40°C to 85°C 0.6 INO(OFF), INC (OFF) NO and NC OFF leakage current VNO = 0.5 V, 2.2 V, VCOM = 2.2 V, 0.5 V, VNC = open, or VNC = 0.5 V, 2.2 V, VCOM = 2.2 V, 0.5 V, VNO = open, switch OFF, and VCC = 2.75 V (see Figure 13) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –50 50 INO(PWROFF), INC (PWROFF) NO and NC PWROFF leakage current VNO or VNC = 0 V to 2.75 V, VCOM = 2.75 V to 0 V, switch OFF, and VCC = 0 V (see Figure 13) TA = 25°C –10 10 µA TA = –40°C to 85°C –10 10 INO(ON) NC and NO ON leakage current VNO = 0.5 V, 2.2 V, VNC and VCOM = open, or VNC = 2.2 V, 0.5 V, VNO and VCOM = open, switch ON, and VCC = 2.75 V (see Figure 14) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –100 100 ICOM(ON) COM ON leakage current VCOM = 0.5 V, VNO and VNC = open, or VCOM = 2.2 V, VNO and VNC = open, switch ON, and VCC = 2.75 V (see Figure 14) TA = 25°C –20 2 20 nA TA = –40°C to 85°C –100 100 ICOM(PWROFF) COM OFF leakage current VNO or VNC = 0 V to 2.75 V, VCOM = 2.75 V to 0 V, and VCC = 0 V (see Figure 13) TA = 25°C –10 10 µA TA = –40°C to 85°C –10 10

www.ti.com SCES707C –AUGUST 2008–REVISED DECEMBER 2016 Product Folder Links: TS5A12301E Submit Documentation FeedbackCopyright © 2008–2016, Texas Instruments Incorporated Electrical Characteristics – 2.5-V Supply (continued) VCC = 2.25 V to 2.75 V and TA = –40°C to 85°C (unless otherwise noted)(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL CONTROL INPUT (IN) VIH Input logic high VCC = 2.75 V and TA = –40°C to 85°C 1.05 5.5 V VIL Input logic low VCC = 2.75 V and TA = –40°C to 85°C 0 0.65 V IIH, IIL Input leakage current VIN = 1.95 V or 0, VCC = 2.75 V, and TA = –40°C to 85°C –0.05 0.5 µA rIN Input resistance VIN = 1.95 V, VCC = 2.75 V, and TA = –40°C to 85°C 6 MΩ DYNAMIC tON Turnon time VCOM = VCC, RL = 50 Ω, and CL= 35 pF (see Figure 16) VCC = 2.5 V and TA = 25°C 97 170 ns VCC = 2.25 V and TA = –40°C to 85°C 175 tOFF Turnoff time VCOM = VCC, RL = 50 Ω, and CL = 35 pF (see Figure 16) VCC = 2.5 V and TA = 25°C 80 155 ns VCC = 2.25 V and TA = –40°C to 85°C 160 tBBM Break-before-make time VCOM = VCC , RL = 50 Ω, and CL = 35 pF (see Figure 17) VCC = 2.5 V and TA = 25°C 5 18 35 ns VCC = 2.25 V and TA = –40°C to 85°C 5 40 QC Charge injection VGEN = 0, RGEN = 0, CL = 1 nF, VCC = 2.5 V, and TA = 25°C (see Figure 21) 82 pC CNO(OFF) NO OFF capacitance VNO = VCC or GND, switch OFF, VCC = 2.5 V, and TA = 25°C (see Figure 15) 29 pF CNC(ON), CNO(ON) NC and NO ON capacitance VNC or VNO = VCC or GND, switch ON, VCC = 2.5 V, and TA = 25°C (see Figure 15) 116 pF CCOM(ON) COM ON capacitance VCOM = VCC or GND, switch ON, VCC = 2.5 V, and TA = 25°C (see Figure 15) 116 pF CI Digital input capacitance VIN = VCC or GND, VCC = 2.5 V, and TA = 25°C (see Figure 15) 3 pF BW Bandwidth RL = 50 Ω, switch ON, VCC = 2.5 V, and TA = 25°C (see Figure 18) 54 MHz OISO OFF isolation RL = 50 Ω, f = 1 MHz, VCC = 2.5 V, and TA = 25°C (see Figure 19) –63 dB XTALK Crosstalk RL = 50 Ω, f = 1 MHz, VCC = 2.5 V, and TA = 25°C (see Figure 20) –63 dB THD Total harmonic distortion RL = 600 Ω, CL = 50 pF, VCC = 2.5 V, f = 20 Hz to 20 kHz, and TA = 25°C (see Figure 22) 0.008% SUPPLY ICC Positive supply current VIN = 1.95 V or GND, VCC = 2.75 V, and TA = –40°C to 85°C 10 µA

6.8 Typical Characteristics

Figure 1. ron vs VCOM Figure 2. ron vs VCOM Figure 3. ron vs VCOM Figure 4. ICC vs VCC Figure 5. tON/tOFF vs Supply Voltage Figure 6. tON/tOFF vs Temperature

7 Parameter Measurement Information

Figure 12. ON-State Resistance (ron) Figure 13. OFF-State Leakage Current (ICOM(OFF), INC(OFF), ICOM(PWROFF), INC(PWR(FF)) Figure 14. ON-State Leakage Current (ICOM(ON), INC(ON))

8 Detailed Description

8.1 Overview

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Isolation

The TS5A12301E supports 1.8-V logic irrespective to the supply voltage applied to the IC.

8.3.3 Integrated Control Input Pulldown

logic state during power up without needing an external component.

8.4 Device Functional Modes

Table 1 lists the functional modes of the TS5A12301E. Table 1. Function Table

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The switch is bidirectional, so the NO, NC, and COM pins may be used as either inputs or outputs.

9.2 Typical Application

Figure 23. Application Schematic

9.2.1 Design Requirements

resistor, so no external component is required to keep the logic pin in a known state.

9.2.2 Detailed Design Procedure

Recommended Operating Conditions.

9.2.3 Application Curve

Figure 24. ron vs VCOM

10 Power Supply Recommendations

protects the device and signal path. adequate for most applications.

11 Layout

11.1 Layout Guidelines

close to the device as possible. Use large ground planes where possible.

11.2 Layout Example

Figure 25. TS5A12301E Layout

www.ti.com SCES707C –AUGUST 2008–REVISED DECEMBER 2016 Product Folder Links: TS5A12301E Submit Documentation FeedbackCopyright © 2008–2016, Texas Instruments Incorporated

12 Device and Documentation Support

12.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

12.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.3 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 10-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TS5A12301EYFPR Active Production DSBGA (YFP) | 6 3000 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 85 (3W2, 3WN) TS5A12301EYFPR.B Active Production DSBGA (YFP) | 6 3000 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 85 (3W2, 3WN) (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 13-Mar-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 13-Mar-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TS5A12301EYFPR DSBGA YFP 6 3000 220.0 220.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C0.5 MAX 0.19 0.13 0.8 TYP 0.4 TYP

0.4 TYP

6X 0.25 0.21 B E A D 4223410/A 11/2016 DSBGA - 0.5 mm max heightYFP0006 DIE SIZE BALL GRID ARRAY NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. BALL A1 CORNER SEATING PLANE BALL TYP 0.05 C A B C

0.015 C A B

SCALE 10.000 D: Max = E: Max = 1.19 mm, Min = 0.79 mm, Min = 1.13 mm 0.73 mm

www.ti.com EXAMPLE BOARD LAYOUT 6X ( 0.23) (0.4) TYP (0.4) TYP ( 0.23) METAL

0.05 MAX

( 0.23) SOLDER MASK OPENING

0.05 MIN

DSBGA - 0.5 mm max heightYFP0006 DIE SIZE BALL GRID ARRAY NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). SOLDER MASK DETAILS NOT TO SCALE SYMM SYMM LAND PATTERN EXAMPLE SCALE:50X A B C 1 2 NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (0.4) TYP (0.4) TYP METAL TYP 4223410/A 11/2016 DSBGA - 0.5 mm max heightYFP0006 DIE SIZE BALL GRID ARRAY NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. SYMM SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:50X A B C 1 2

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