TNY375-380 POWERINT
Document overview
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Technical content
www.powerint.com May 2007 Energy-Efficient, Off-Line Switcher With Enhanced Peak Power Performance PI-4266-010906 D AC IN DC OUT TinySwitch-PK D S EN/UV BP/M Output Power Table Product3
230 VAC ± 15% 85-265 VAC
TNY375PN 8.5 W 15 W 16.5 W 6 W 11.5 W 12.5 W TNY376PN 10 W 19 W 22 W 7 W 15 W 17 W TNY377PN 13 W 23.5 W 28 W 8 W 18 W 23 W TNY378PN 16 W 28 W 34 W 10 W 21.5 W 27 W TNY379PN 18 W 32 W 39 W 12 W 25 W 31 W TNY380PN 20 W 36.5 W 45 W 14 W 28.5 W 35 W Table 1. Output Power Table.
- Minimum continuous power in a typical non-ventilated enclosed adapter
- Minimum continuous power in an open frame design (see Key Applications
- Packages: P: DIP-8C. Lead free only. See Part Ordering Information.
Applications
Applications with high peak-to-continuous power demands – DVDs, PVRs, active speakers (e.g. PC audio), audio amplifiers, modems, photo printers Applications with high power demands at startup (large output capacitance or motor loads) - PC standby, low voltage motor drives
Description
TinySwitch-PK incorporates a 700 V MOSFET, oscillator, high- voltage switched current source, current limit (user selectable), and thermal shutdown circuitry. A unique peak mode feature boosts current limit and frequency for peak load conditions. The boosted current limit provides the peak output power while the increased peak mode frequency ensures the transformer can be sized for continuous load conditions rather than peak power demands. Figure 1. Typical Peak Power Application.
the internally generated 5.85 V supply. connected from the BP/M pin to a bias winding supply.
- ENABLE/UNDERVOLTAGE (EN/UV) Pin:
1.0 V + VT
Figure 2 Functional Block Diagram. Figure 3. Pin Configuration.
modulation of the threshold current reduces group pulsing. The threshold current is between 75 mA and 115 mA. through an external resistor connected to the DC line voltage. for high voltage power return and control circuit common. simple ON/OFF control to regulate the output voltage. functional block diagram with the most important features. beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled). being required to wait for completion of the full period. adjusts the current limit level accordingly in discrete amounts. optocoupler that is usually connected to this pin. both high frequency decoupling and energy storage. externally through a bias winding as required for TNY377-380. decreases the no-load consumption to below 60 mW. Figure 4. Frequency Jitter.
output voltages are 3.3 V, 5 V, 12 V, and –12 V. optimizes both EMI and energy efficiency. energy efficiency requirements. The input filter circuit (C1, L1 and C2) reduces conducted EMI. of margin to EN55022 Class B conducted EMI limits. designer to select the current limit appropriate for the application. capacitor and is the normal choice for typical applications. dissipation must be minimized. equal to the standard current limit of the next larger device.
400 V C3
250 VAC
Figure 14. TNY376P , Four Output, 7.5 W, 13 W Peak Universal Input Power Supply.
be sized to meet these criteria for AC input designs. Minimum data sheet value of I2f. Transformer primary inductance tolerance of ±10%. Reflected output voltage (V OR) of 135 V. temperature at or below 110 °C. average) output power in two common thermal environments. Table 2. Peak Output Power Capability vs Current Limit Mode Selection.
11 V, 2%
Figure 15. Single 230 VAC Input 20 W Continuous and 45 W Peak Power Supply Using TNY380P .
adjusted to compensate for variations in leakage inductance. Figure 15. The resistor in series with the OVP Zener also limits the maximum current into the BYPASS pin. provide the data sheet supply current equal to I S2 + |IDIS|. high primary capacitance and increased losses that results. capacitor to the area of copper connected to the SOURCE pins. device during common mode line surge events. the package directly between BP and SOURCE pins. presence of a UV resistor which may prevent correct start-up. flux suppliers guidance, specifically avoiding flux contamination. should be kept as small as possible. to act not only as a single point ground, but also as a heatsink. diodes, maximize the PCB area connected to the cathode.
between the negative terminals on the input filter capacitors. optocoupler to prevent noise pick up. increase high frequency radiated EMI. specifications are not exceeded under worst case conditions.
650 V at highest input voltage and peak (overload) output
gives margin for design variation. Power Integrations web site: www.powerint.com. Figure 16. Layout Considerations for TinySwitch-PK Using P Package.
Rev. A 05/07 TNY375-380 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -0 to 125 °C See Figure 17 (Unless Otherwise Specified) Min Typ Max Units Control Functions Output Frequency See Note A fOSC State Machine at Highest Current Limit Level TJ = 25 °C Average 248 264 280 kHz pk-pk Jitter 16 fOSC-Low All Lower Current Limit Levels TJ = 25 °C Average 124 132 140 pk-pk Jitter 8 Maximum Duty Cycle DCMAX S1 Open 62 65 % EN/UV Pin Upper Turnoff Threshold Current IDIS -150 -115 -90 mA EN/UV Pin Voltage VEN IEN/UV = 25 mA 1.8 2.2 2.6 V IEN/UV = -25 mA 0.8 1.2 1.6 DRAIN Supply Current IS1 EN/UV Current > IDIS (MOSFET Not Switching) See Note B 290 mA IS2 EN/UV Open (MOSFET Switching at fOSC) See Note C TNY375 385 520 mA TNY376 460 600 TNY377 570 710 TNY378 740 900 TNY379 870 1060 TNY380 1100 1350 Absolute Maximum Ratings(1,5) Notes: 1. All voltages referenced to SOURCE, TA = 25 °C. 2. Normally limited by internal circuitry. 3. 1/16 in. from case for 5 seconds. 4. Maximum ratings specified may be applied one at a time without causing permanent damage to the product. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability. Thermal Impedance Thermal Impedance: P Package: Notes: 1. Measured on the SOURCE pin close to plastic interface.
Rev. A 05/07 TNY375-380 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -0 to 125 °C See Figure 17 (Unless Otherwise Specified) Min Typ Max Units Control Functions (cont.) BP/M Pin Charge Current ICH1 VBP/M = 0 V, TJ = 25 °C See Note D, E mA ICH2 VBP/M = 4 V, TJ = 25 °C See Note D, E BP/M Pin Voltage VBP/M See Note D 5.6 5.85 6.15 V BP/M Pin Voltage Hysteresis VBP/MH 0.80 0.95 1.20 V BP/M Pin Shunt Voltage VSHUNT IBP = 2 mA 6.0 6.4 6.7 V EN/UV Pin Line Under- voltage Threshold ILUV TJ = 25 °C 22.5 25 27.5 mA Circuit Protection Peak Current Limit (BP/M Capacitor = 0.1 mF) See Note E ILIMITPEAK TNY375 TJ = 25 °C di/dt = 72 mA/ms See Note F 330 355 380 mA TNY376 TJ = 25 °C di/dt = 91 mA/ms See Note F 423 455 487 TNY377 TJ = 25 °C di/dt = 117 mA/ms See Note F 544 585 626 TNY378 TJ = 25 °C di/dt = 143 mA/ms See Note F 665 715 765 TNY379 TJ = 25 °C di/dt = 169 mA/ms See Note F 786 845 904 TNY380 TJ = 25 °C di/dt = 195 mA/ms See Note F 907 975 1043 Peak Current Limit (BP/M Capacitor = 1 mF) See Note E ILIMITPEAKred TNY375 TJ = 25 °C di/dt = 72 mA/ms See Note F 302 325 358 mA TNY376 TJ = 25 °C di/dt = 91 mA/ms See Note F 330 355 391 TNY377 TJ = 25 °C di/dt = 117 mA/ms See Note F 423 455 501 TNY378 TJ = 25 °C di/dt = 143 mA/ms See Note F 544 585 644 TNY379 TJ = 25 °C di/dt = 169 mA/ms See Note F 665 715 787 TNY380 TJ = 25 °C di/dt = 195 mA/ms See Note F 786 845 930
Rev. A 05/07 TNY375-380 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -0 to 125 °C See Figure 17 (Unless Otherwise Specified) Min Typ Max Units Circuit Protection (cont.) Peak Current Limit (BP/M Capacitor = 10 mF) See Note E ILIMITPEAKred TNY375 TJ = 25 °C di/dt = 72 mA/ms See Note F 349 375 413 mA TNY376 TJ = 25 °C di/dt = 91 mA/ms See Note F 465 500 550 TNY377 TJ = 25 °C di/dt = 117 mA/ms See Note F 665 715 787 TNY378 TJ = 25 °C di/dt = 143 mA/ms See Note F 786 845 930 TNY379 TJ = 25 °C di/dt = 169 mA/ms See Note F 907 975 1073 TNY380 TJ = 25 °C di/dt = 195 mA/ms See Note F 1028 1105 1216 Power Coefficient I2f I2f = ILIMITPEAK(TYP) 2 × fOSC(TYP) TJ = 25 °C BP/M Capacitor = 0.1 mF 0.9 × I2f I2f 1.12 × I2f A2Hz I2f = ILIMITPEAKred(TYP) 2 × fOSC(TYP) TJ = 25 °C BP/M Capacitor = 1 mF 0.9 × I2f I2f 1.16 × I2f I2f = ILIMITPEAKinc(TYP) 2 × fOSC(TYP) TJ = 25 °C BP/M Capacitor = 10 mF 0.9 × I2f I2f 1.16 × I2f Initial Current Limit IINIT See Figure 17 TJ = 25 °C, See Note G 0.75 × ILIMIT(MIN) mA Leading Edge Blanking Time tLEB TJ = 25 °C See Note G 190 235 ns Current Limit Delay tILD TJ = 25 °C See Note G, H 200 ns Thermal Shutdown Temperature TSD 135 142 150 °C Thermal Shutdown Hysteresis TSDH 75 °C BP/M Pin Shutdown Threshold Current ISD 4 7 9 mA BP/M Pin Power-Up Reset Threshold Voltage VBP/M(RESET) 1.6 2.6 3.6 V
Rev. A 05/07 TNY375-380 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -0 to 125 °C See Figure 17 (Unless Otherwise Specified) Min Typ Max Units Output ON-State Resistance RDS(ON) TNY375 ID = 28 mA TJ = 25 °C 19 22 W TJ = 100 °C 29 33 TNY376 ID = 35 mA TJ = 25 °C 14 16 TJ = 100 °C 21 24 TNY377 ID = 45 mA TJ = 25 °C 7.8 9.0 TJ = 100 °C 11.7 13.5 TNY378 ID = 55 mA TJ = 25 °C 5.2 6.0 TJ = 100 °C 7.8 9.0 TNY379 ID = 65 mA TJ = 25 °C 3.9 4.5 TJ = 100 °C 5.8 6.7 TNY380 ID = 75 mA TJ = 25 °C 2.6 3.0 TJ = 100 °C 3.9 4.5 OFF-State Drain Leakage Current IDSS1 VBP/M = 6.2 V VEN/UV = 0 V VDS = 560 V TJ = 125 °C See Note I TNY375-376 50 mA TNY377-378 100 TNY379-380 200 IDSS2 VBP/M = 6.2 V VEN/UV = 0 V VDS = 375 V, TJ = 50 °C See Note G, I Breakdown Voltage BVDSS VBP = 6.2 V, VEN/UV = 0 V, See Note J, TJ = 25 °C 700 V DRAIN Supply Voltage 50 V Auto-Restart ON-Time At fOSC tAR TJ = 25 °C See Note K 32 ms Auto-Restart Duty Cycle DCAR TJ = 25 °C 3 %
Rev. A 05/07 TNY375-380 www.powerint.com NOTES: For all BP/M pin capacitor values. IS1 is an accurate estimate of device controller current consumption at no-load, since operating frequency is so low under these conditions. Total device consumption at no-load is the sum of IS1 and IDSS2. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BP/M pin current at 6.1 V. BP/M pin is not intended for sourcing supply current to external circuitry. To ensure correct current limit, it is recommended that nominal 0.1 mF / 1 mF / 10 mF capacitors are used. In addition, the BP/M capacitor value tolerance should be equal to or better than indicated below across the ambient temperature range of the target application. The minimum and maximum capacitor values are guaranteed by characterization. For current limit at other di/dt values, refer to Figure 24. Measurements made with device self-biased. This parameter is derived from characterization. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT specification. IDSS1 is the worst-case OFF state leakage specification at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical specification under worst-case application conditions (rectified 265 VAC) for no-load consumption calculations. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage up to but not exceeding minimum BVDSS. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency). Nominal BP/M Pin Cap Value Tolerance Relative to Nominal Capacitor Value Min Max 0.1 mF -60% +100% 1 mF -50% +100% 10 mF -50% NA
5 W S2
NOTE: This test circuit is not applicable for current limit or output characteristic measurements. Figure 17. General Test Circuit. Figure 18. Duty Cycle Measurement. Figure 19. Output Enable Timing. Figure 20. Current Limit Envelope at fOSC = 132 kHz.
- Package dimensions conform to JEDEC specification
package with .300 inch row spacing.
- Controlling dimensions are inches. Millimeter sizes are
- Dimensions shown do not include mold flash or other
- Pin locations start with Pin 1, and continue counter-clock-
dimple are aids in locating Pin 1. Pin 3 is omitted.
- Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
- Lead width measured at package body.
- Lead spacing measured with the leads constrained to be
- TinySwitch Product Family
- Series Number
- Package Identifier P Plastic DIP-8C
- Pin Finish N Pure Matte Tin (Pb-Free)TNY 378 P N
For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2007, Power Integrations, Inc. Power Integrations Worldwide Sales Support Locations World Headquarters
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