TLV61040-Q1 Automotive Low-Power DC-DC Boost Converter in SOT-23 Package datasheet

Document overview

  • Manufacturer or author: Texas Instruments, Incorporated [SLVSIV1,*]
  • PDF pages: 23

Technical content

TLV61040-Q1 Automotive Low-Power DC-DC Boost Converter in SOT-23 Package

1 Features

  • AEC-Q100 qualified – Device temperature grade 1: –40°C to +125°C ambient operating temperature range
  • Functional Safety-Capable – Documentation available to aid functional safety system design
  • 1.8V to 20V Input voltage range
  • Up to 28V adjustable output voltage range
  • 400mA internal switch current limit
  • Up to 2MHz switching frequency
  • 25µA typical no load quiescent current
  • 0.4µA typical shutdown current
  • Internal soft start
  • Space-saving, 5-pin SOT-23 package

2 Applications

  • Automotive telematics, ecall, and tolling
  • Infotainment and clusters
  • Advanced driver assistance system (ADAS)
  • LCD bias supplies
  • White-LED supplies for LCD backlights
  • Dual-CELL NiMH/NiCd or single-CELL li-ion battery-powered systems
  • Standard 3.3V or 5V to 12V conversions

3 Description

The TLV61040-Q1 devices are high-frequency boost converters for automotive applications. The devices are designed for generating output voltages up to 28V from a pre-regulated low voltage rail, dual-cell NiMH/ NiCd, or a single-cell Li-Ion battery, supporting input voltages from 1.8V to 20V. The TLV61040-Q1 devices operate with a switching frequency up to 2MHz, allowing the use of small external components such as ceramic as well as tantalum output capacitors. Combined with the space- saving, 5-pin SOT-23 package, the TLV61040-Q1 devices accomplish a small overall design size. The TLV61040-Q1 device has an internal 400mA switch current limit, offering lower output voltage ripple and allowing the use of a smaller form factor inductor for lower-power applications. The TLV61040-Q1 devices operate in a pulse frequency modulation (PFM) scheme with constant peak current control. The combination of low quiescent current (25µA typical) and the optimized control scheme enable operation of the devices at high efficiency over the entire load current range.

Package Information

PART NUMBER PACKAGE(1) PACKAGE SIZE(2) TLV61040-Q1 DDC (SOT-23-THN, 5) 2.9mm × 2.8mm (1) For more information, see Section 10. (2) The package size (length × width) is a nominal value and includes pins, where applicable. VIN SW FB GND RFBT RFBB CIN ENOFF ON L COUT VOUTVIN RFF CFF 1.5nF 100kΩ 100kΩ Typical Application Diagram O u t p u t c u r r e n t ( A ) Efficiency (%) 2 0 4 0 6 0 8 0 1 0 0 V i n = 1 . 8 V V i n = 3 . 3 V V i n = 5 V V i n = 9 V V i n = 1 2 V Efficiency vs Output Current, VOUT = 18V TLV61040-Q1 SLVSIV1 – MARCH 2026 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

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4 Pin Configuration and Functions

Figure 4-1. DDC Package 5 Pin SOT-23-THN (Top View) Table 4-1. Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. EN 4 I This pin is the enable pin of the device. Pulling this pin to ground forces the device into shutdown mode reducing the supply current to less than 1µA. This pin must not be left floating and must be terminated. FB 3 I This pin is the feedback pin of the device. Connect this pin to the external voltage divider to program the desired output voltage. GND 2 — Ground SW 1 I Connect the inductor and the Schottky diode to this pin. This pin is the switch pin and is connected to the drain of the internal power MOSFET. VIN 5 I Supply voltage pin (1) I = input, O = output www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TLV61040-Q1

5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Voltage range at terminals (2) VIN,EN –0.3 20.5 V SW –0.3 32 V FB –0.3 6 V Operating junction temperature range, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) All voltage values are with respect to network ground terminal.

5.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002, all pins(1) ±2000 V Charged device model (CDM), per AEC Q100-011, all pins ±750 V (1) AEC Q100-002 indicates that HBM stressing must be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT VIN Input voltage range 1.8 20 V VOUT Output voltage range 4.5 28 V L Inductance range 2.2 10 22 µH CIN Effective input capacitance range 1 10 µF COUT Effective output capacitance range 1 10 120 µF TJ Operating junction temperature –40 125 °C

5.4 Thermal Information

THERMAL METRIC(1) TLV61040-Q1 UNITDDC (SOT23)

5 PINS

RθJA Junction-to-ambient thermal resistance 145.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 77.6 RθJB Junction-to-board thermal resistance 56.5 ψJT Junction-to-top characterization parameter 28.5 ψJB Junction-to-board characterization parameter 54.9 RθJC(bot) Junction-to-case (bottom) thermal resistance NA (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

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5.5 Electrical Characteristics

TJ = –40°C to 150°C, VIN = 5.0V. Typical values are at TJ = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY VIN Input voltage range 1.8 20 V VIN_UVLO Undervoltage lockout threshold VIN_UVLO rising 1.7 1.79 V VIN_UVLO falling 1.55 1.64 VIN_HYS VIN_UVLO hysteresis 150 mV IQ_VIN Quiescent current into VIN pin IC enabled, no load, no switching, VIN = 2.6V to 20V, FB = 1.4V, TJ = –40°C to 125°C 25 50 µA ISD Shutdown current into VIN pin IC disabled, VIN = 2.6V to 20V, TJ= –40°C to 125°C 0.4 2.1 µA IFB_LKG Leakage current into FB pin TJ= –40°C to 125°C 50 nA ISW_LKG Leakage current into SW pin IC disabled, SW = 28V, TJ = –40°C to 125°C 500 nA OUTPUT VOUT Output voltage range 4.5 28 V VREF Reference Voltage at FB pin TJ = –40°C to 125°C 1.209 1.233 1.258 V POWER SWITCH RDS(on) Low-side MOSFET on resistance VIN = 5V, VOUT = 12V 200 mΩ tOFF_min Minimum off time 400 500 ns tON_min Minimum on time 45 150 ns ILIM_SW TLV61040-Q1 Peak switch current limit VIN = 5V 320 400 480 mA Dmin Minimum duty cycle VOUT = 4.5V to 28V 13.5% 16.5% tSTARTUP Soft startup time Internal SS ramp time, from 0V to VREF 2.5 ms LOGIC INTERFACE VEN_H EN Logic high threshold 1.2 V VEN_L EN Logic low threshold 0.4 V REN EN pulldown resistor 1 MΩ PROTECTION TSD Thermal shutdown threshold TJ rising 170 °C TSD_HYS Thermal shutdown hysteresis TJ falling below TSD 20 °C www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TLV61040-Q1

5.6 Typical Characteristics

TLV61040-Q1, TA = 25°C, unless otherwise noted VOUT=5V L = 4.7μH Figure 5-1. Efficiency vs Output Current O u t p u t c u r r e n t ( A ) Efficiency (%) 2 0 4 0 6 0 8 0 1 0 0 V i n = 1 . 8 V V i n = 3 . 3 V V i n = 5 V V i n = 9 V V i n = 1 2 V VOUT = 18V L = 10μH Figure 5-2. Efficiency vs Output Current O u t p u t C u r r e n t ( A ) Efficiency (%) 2 0 4 0 6 0 8 0 1 0 0 V i n = 3 . 3 V V i n = 5 V V i n = 9 V V i n = 1 2 V V i n = 1 5 V V i n = 2 0 V VOUT = 24V L = 22μH Figure 5-3. Efficiency vs Output Current T e m p e r a t u r e (  C ) Quiescent Current (A) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 2 0 2 2 2 4 2 6 2 8 3 0 3 2 3 4 3 6 3 8 4 0 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 1 2 . 0 V V i n = 2 0 . 0 V Figure 5-4. Quiescent Current vs Temperature T e m p e r a t u r e (  C ) Shutdown Current (A) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 . 1 1 . 2 1 . 3 1 . 4 1 . 5 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 1 2 . 0 V V i n = 2 0 . 0 V Figure 5-5. Shutdown Current vs Temperature T e m p e r a t u r e (  C ) Reference Voltage (V) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 . 2 1 . 2 0 5 1 . 2 1 1 . 2 1 5 1 . 2 2 1 . 2 2 5 1 . 2 3 1 . 2 3 5 1 . 2 4 1 . 2 4 5 1 . 2 5 1 . 2 5 5 1 . 2 6 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 1 2 . 0 V V i n = 2 0 . 0 V Figure 5-6. Reference Voltage vs Temperature TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

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6 Detailed Description

6.1 Overview

The TLV61040-Q1 is a high-frequency boost converter dedicated for small-to-medium LCD bias supply and white-LED backlight supplies. The device is designed for generating output voltages up to 28V from a dual-cell NiMH/NiCd, a single-cell device Li-Ion battery, or 3.3V, 5V, 12V standard voltage bus.

6.2 Functional Block Diagram

6.3 Feature Description

6.3.1 Peak Current Control

The internal switch turns on until the inductor current reaches the typical peak current limit (I LIM) of 400mA. Due to the internal propagation delay of typical 60ns, the actual current exceeds the peak current limit threshold by a small amount. Use Equation 1 to calculate the typical peak current limit: I pe ak ty p = I L I M + V I N L × 60 ns (1) where

  • VIN= Input voltage
  • L= Selected inductor value
  • ILIM = Typical peak current limit, 400mA The higher the input voltage and the lower the inductor value, the greater the peak. By selecting the TLV61040-Q1, tailoring the design to the specific application current limit requirements is possible. A lower current limit supports applications requiring lower output power and allows the use of an www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TLV61040-Q1

inductor with a lower current rating and a smaller form factor. A lower current limit typically has a lower output-voltage ripple as well.

6.3.2 Soft Start

The soft-start feature helps the regulator to gradually reach the steady state operating point, therefore reducing start-up stresses and surge. When the input voltage is applied, the output capacitor is charged to VIN through the inductor and high side rectifier diode. After reaching the 1.7V (typical) UVLO rising threshold and EN logic high, the internal soft-start control circuit initiates to ramp the reference voltage with slew rate from 0V to 1.233V within 2.5ms (typical). All inductive step-up converters exhibit high inrush current during start-up if no special precaution is made. This action can cause voltage drops at the input rail during start-up and can result in an unwanted or early system shutdown. The TLV61040-Q1 limits this inrush current by increasing the current limit in two steps starting from ILIM / 4 for 256 cycles to ILIM / 2 for the next 256 cycles, and then full current limit (see Figure 7-2).

6.3.3 Enable

Pulling the enable (EN) to ground shuts down the device, reducing the shutdown current to 0.4µA (typical). Because there is a conductive path from the input to the output through the inductor and Schottky diode, the output voltage is equal to the input voltage during shutdown. The enable pin must be terminated and must not be left floating.

6.3.4 Undervoltage Lockout

An undervoltage lockout prevents misoperation of the device at input voltages below typical 1.55V. When the input voltage is below the undervoltage threshold, the main switch is turned off.

6.3.5 Thermal Shutdown

An internal thermal shutdown is implemented and turns off the internal MOSFETs when the typical junction temperature of 170°C is exceeded. The thermal shutdown has a hysteresis of typically 20°C. This data is based on statistical means and is not tested during the regular mass production of the IC.

6.4 Device Functional Modes

The TLV61040-Q1 operates with an wide input voltage range of 1.8V to 20V and can generate output voltages up to 28V. The device operates in a pulse frequency modulation (PFM) scheme with constant peak current control. This control scheme maintains high efficiency over the entire load current range, and with a switching frequency up to 2MHz, the device enables the use of very small external components. The converter monitors the output voltage, and the feedback voltage is connected to error amplifier with reference voltage of typically 1.233V. The output of error amplifier controls the off-time timer. After the timer ends, the internal switch turns on and the current ramps up. The switch turns off as soon as the inductor current reaches the internally set peak current of typically 400mA. See also Section 6.3.1. The second criteria that turns off the switch is the maximum ON-time of 6µs (typical). This action is to limit the maximum ON-time of the converter to cover for extreme conditions. As the switch is turned off, the external Schottky diode is forward biased, delivering the current to the output. The switch remains off for a minimum of 400ns (typical), or until the off timer is down. Using this PFM peak-current control scheme, the switching frequency of the converter depends on the output current, which results in high efficiency over the entire load current range. TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

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7 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

7.1 Application Information

The TLV61040-Q1 is designed for output voltages up to 28V with an input voltage range of 1.8V to 20V. The TLV61040-Q1 can operate up to 400mA typical peak load current. The device operates in a pulse-frequency- modulation (PFM) scheme with constant peak-current control. This control scheme maintains high efficiency over the entire load current range, and with a switching frequency up to 2MHz, the device enables the use of very small external components.

7.2 Typical Application

The following section provides a step-by-step design approach for configuring the TLV61040-Q1 as a voltage- regulating boost converter for LCD bias supply, as shown in Figure 7-1. VIN SW FB GND RFBT RFBB CIN EN 7.32k 10µF OFF ON L 10µH COUT1 10µF COUT2 10µF 100k VIN = 1.8V to 15V VOUT = 18V RFF CFF 1.5nF 100k Figure 7-1. LCD Bias Supply

7.2.1 Design Requirements

Table 7-1 lists the design parameters for this example. Table 7-1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage 1.8V to 6V or 9V to 15V Output voltage 18V Output current 10mA (VIN = 1.8V to 6V) 50mA (VIN = 9V to 15V) www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TLV61040-Q1

7.2.2 Detailed Design Procedure

7.2.2.1 Inductor Selection, Maximum Load Current

Because the PFM peak-current control scheme is inherently stable, the inductor value does not affect the stability of the regulator. Depending on the application, TI recommends inductor values from 2.2µH to 47µH. And the final inductor value must selected by the following instructions. There are two conditions that limit the maximum inductor value. The maximum inductor value is firstly determined by the maximum on-time of the switch, typically 6µs. The peak current limit of 400mA (typically) must be reached within this 6µs period for proper operation. Use Equation 2 to calculate the maximum inductor value. L max 1 = V IN min × 6 μs I L I M (2) Where:

  • VIN(min)= minimum input voltage
  • ILIM = 400mA The other limitation of maximum inductor value is inductor current ripple cannot be lower than 100mA. The minimum inductor current ripple occurs when load is heavy to trigger minimum off time of 400ns (typically). Use Equation 3 to calculate the maximum inductor value. L max 2 = V OU T − V I N ma x × 400 n s 100 m A (3) Where:
  • VIN(max)= maximum input voltage
  • VOUT= target output voltage The inductor value need to be lower than both Lmax1 and Lmax2. There is also a minimum limitation of the inductor value that the current limit must not be triggered during minimum on-time. Use Equation 4 to calculate the minimum inductor value. L mi n = V I N max × 150 n s I L I M (4) The inductor value can be selected within the limitation. Besides, the inductor value also affects the maximum available load current. The larger the inductor value, the larger the maximum available load current. After selecting the inductor value, maximum available load current must be checked. If the actual load current is higher than maximum available load current, the V OUT drops. Use Equation 5 to calculate the maximum available load current. I L oad ma x = ηL I L I M 2

2 L I L I M

V I N mi n + 400 n s V OU T − V I N min , i f V O UT − V I N mi n L ÷ 400 n s > I L I M ηV I N min V O U T I LI M − V OU T − V I N min

2 L × 400 n s , i f

V OU T − V I N mi n L ÷ 400 ns ≤ I L I M (5) Where:

  • VIN(min)= minimum input voltage
  • VOUT= target output voltage
  • ILIM = 400mA
  • L = selected inductor value
  • η = expected converter efficiency. Typically 80% to 95% at maximum available load current TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

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A smaller inductor value gives a higher converter switching frequency, but lowers the efficiency and the maximum available inductor current. The next step is to calculate the switching frequency at the nominal load current using Equation 6: f s w I L o ad = 2 × I L o ad V OU T − V I N ηL I p eak 2 (6) Where:

  • Ipeak = peak current as described in the Peak Current Control section
  • L = selected inductor value
  • ILoad = nominal load current Lastly, the selected inductor must have a saturation current that exceeds the maximum peak current of the converter (as calculated in the Peak Current Control section). Use the maximum value for I LIM for this calculation. Another important inductor parameter is the DC resistance. The lower the DC resistance, the higher the efficiency of the converter. Table 7-2 lists a few typical inductors for LCD bias supply design (see Figure 7-1), but customers must verify and validate the typical inductors to check whether the typical inductors are designed for the customer’s application. Table 7-2. Typical Inductors for LCD Bias Supply PART NUMBER L(μH) DCR MAX (mΩ) SATURATION CURRENT TYPICAL (A) VENDOR(1) XFL3012-223ME 22 630 0.52 Coilcraft XFL3012-103ME 10 306 0.74 Coilcraft XFL3012-472ME 4.7 171 1.2 Coilcraft (1) See the Third-Party Products Disclaimer.

7.2.2.2 Setting The Output Voltage

The output voltage is calculated as: V O U T = 1.233 V × 1 + R FB T R F BB (7) For automotive applications, TO does not recommend a a resistor over 100kΩ. To minimize leakage current from feedback network, TI recommends RFBT as 100kΩ so RFBB can be variable to adjust VOUT. In TLV61040-Q1, the inductor current is limited to 400mA, so during start-up, the output voltage cannot rise fast enough to follow internal reference. Then the internal error amplifier output goes high and even gets saturated. So after V OUT reaches the target, the error amplifier needs time to exit saturation and enter normal regulation. During this time, the V OUT continue rising, causing overshoot. A feedforward capacitor of 1.5nF and a feedforward resistor of 100k Ω across the upper feedback resistor R FBT is required to prevent the overshoot. Without a feedforward resistor, whose value is too small, the TLV61040-Q1 shows double pulses or a pulse burst instead of single pulses at the switch node (SW), causing higher output voltage ripple.

7.2.2.3 Input and Output Capacitor Selection

The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. This ripple voltage is related to the capacitor capacitance and the equivalent series resistance (ESR). Assuming a ceramic capacitor with zero ESR, use Equation 8 to calculate the minimum capacitance needed for a given ripple. C OU T = I L o ad D m ax f s w V r i pp l e (8) www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TLV61040-Q1

Where:

  • ILoad = Nominal load current
  • Dmax = Maximum duty cycle in the application
  • fsw = Switching frequency at the nominal load current as calculated previously
  • Vripple = Target peak to peak output voltage ripple The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are used. Take care when evaluating the derating of a ceramic capacitor under DC bias, aging, and AC signal. For example, the DC bias can significantly reduce capacitance. A ceramic capacitor can lose more than 50% of the capacitance at the rated voltage. Therefore, always leave margin on the voltage rating to make sure of adequate capacitance at the required output voltage. TI recommends using the output capacitor with effective capacitance 10µF, which covers the major applications. TI also recommends placing a small 1µF capacitor right across the rectifier diode cathode to the GND pin of the TLV61040-Q1 to reduce the high RMS current loop inductance. The output capacitor affects the small signal control loop stability of the boost regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable. Increasing the output capacitor makes the output voltage ripple smaller in PWM mode. But if total output capacitance is too large, because the boost converter cannot control inductor current when V IN is close to V OUT, the inductor current increases to a high level during start-up until V OUT is high enough. The larger the COUT and VIN, the higher the peak inrush current. If the peak inductor current is higher than 2.5A, the device has risk to damage. TI recommends total output capacitance for TLV61040-Q1 to be less than 120μF. Table 7-3 lists the recommended capacitor for the TLV61040-Q1. Table 7-3. Recommended Output Capacitors for the TLV61040-Q1 PART NUMBER COUT (µF) RATING PACKAGE VENDOR(1) TMK316BLD106KL 10 25V, X5R 1206 Taiyo Yuden CC1206KKX5R8BB106 10 25V, X5R 1206 Yageo CGA5L1X7R1H106K160AC 10 50V, X7R 1206 TDK (1) See the Third-Party Products Disclaimer. The ceramic capacitors are an excellent choice for the input decoupling of the step-up converter because the ceramic capacitors have extremely low ESR and are available in small footprints. Input capacitors must be located as close as possible to the device. While a 10µF input capacitor or equivalent is sufficient for the most applications, larger values can be used to reduce input current ripple. Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or can even damage the device. Additional "bulk" capacitor (electrolytic or tantalum) in this circumstance, must be placed between CIN and the power source lead to reduce ringing that can occur between the inductance of the power source leads and CIN.

7.2.2.4 Diode Selection

A Schottky diode is the preferred type due to the low forward voltage drop and small reverse recovery charge. Low reverse leakage current is important parameter when selecting the Schottky diode. The diode must be rated to handle the maximum output voltage plus any switching node ringing. Also, the diode must be able to handle the average output current. TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

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7.2.3 Application Curves

Time Scale: 800 s/div IL 500mA/div EN 5V/div VIN = 5V VOUT = 18V RLOAD = 600Ω Figure 7-2. Start-up by EN Waveforms VOUT 10V/div SW 10V/div Time Scale: 2ms/divIL 500mA /div EN 5V/div VIN = 5V VOUT = 18V RLOAD = 600Ω Figure 7-3. Shutdown by EN waveforms VOUT(AC) 20mV/div SW 10V/div Time Scale: 10 s/div IL 500mA/div VIN = 5V VOUT = 18V ILOAD = 5mA Figure 7-4. Switching Waveforms in Steady State VOUT(AC) 20mV/div SW 10V/div Time Scale: 1 s/div IL 500mA/div VIN = 5V VOUT = 18V ILOAD = 30mA Figure 7-5. Switching Waveforms in Steady State VOUT(AC) 50mV/div SW 10V/div Time Scale: 200 s/div IOUT 20mA/div VIN = 5V VOUT = 18V ILOAD = 5mA to 30mA Figure 7-6. Load Transient VOUT(AC) 50mV/div VIN 5V/div Time Scale: 200 s/div IL 500mA/div VIN = 2.6V to 9V VOUT = 18V ILOAD = 15mA Figure 7-7. Line Transient www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TLV61040-Q1

Time Scale: 800 s/div IL 500mA/div EN 5V/div VIN = 12V VOUT = 18V RLOAD = 180Ω Figure 7-8. Start-up by EN waveforms VOUT 10V/div SW 10V/div Time Scale: 800 s/divIL 500mA /div EN 5V/div VIN = 5V VOUT = 18V RLOAD = 180Ω Figure 7-9. Shutdown by EN waveforms VOUT(AC) 20mV/div SW 10V/div Time Scale: 20 s/div IL 500mA/div VIN = 12V VOUT = 18V ILOAD = 5mA Figure 7-10. Switching Waveforms in Steady State VOUT(AC) 20mV/div SW 10V/div Time Scale: 1 s/div IL 500mA/div VIN = 12V VOUT = 18V ILOAD = 0.1A Figure 7-11. Switching Waveforms in Steady State VOUT(AC) 50mV/div SW 10V/div Time Scale: 200 s/div IOUT 50mA/div VIN = 12V VOUT = 18V ILOAD = 10mA to 100mA Figure 7-12. Load Transient VOUT(AC) 50mV/div VIN 10V/div Time Scale: 200 s/div IL 500mA/div VIN = 9V to 15V VOUT = 18V ILOAD = 0.1A Figure 7-13. Line Transient

7.3 Power Supply Recommendations

The device is designed to operate from an input voltage supply range from 1.8V to 20V. The output current of the input power supply must be rated according to the supply voltage, output voltage, and output current of TLV61040-Q1. TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

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7.4 Layout

7.4.1 Layout Guidelines

Typical for all switching power supplies, the layout is an important step in the design, especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator can show noise problems and duty cycle jitter. Figure 7-14 provides an example of layout design with TLV61040-Q1.

  • Place the input capacitor as close as possible to the input pin for good input voltage filtering.
  • Place the inductor and diode as close as possible to the switch pin to minimize the noise coupling into other circuits.
  • Keeping the switching pin and plane area short helps in minimizing the radiated emissions. Make sure to have a very low impedance switch plane to reduce the switching losses, and therefore a trade-off must be made between these two and the switching pin and plane must be optimized.
  • Because the feedback pin and network is noise-sensitive, route the feedback network away from the inductor.
  • Shield the feedback pin and feedback network with a ground plane or trace to minimize noise coupling into this circuit.
  • A star ground connection or ground plane minimizes ground shifts and noise.

7.4.2 Layout Example

Figure 7-14. Layout Diagram www.ti.com TLV61040-Q1 SLVSIV1 – MARCH 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TLV61040-Q1

8 Device and Documentation Support

8.1 Device Support

8.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

8.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

8.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

8.4 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

8.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

9 Revision History

March 2026 * Initial Release

10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. TLV61040-Q1 SLVSIV1 – MARCH 2026 www.ti.com

16 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated

Product Folder Links: TLV61040-Q1

www.ti.com 25-Jul-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TLV61040QDDCRQ1 Active Production SOT-23- THIN (DDC) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 1040Q (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jul-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant TLV61040QDDCRQ1 SOT-23- THIN Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jul-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV61040QDDCRQ1 SOT-23-THIN DDC 5 3000 210.0 185.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 0.20

0.12 TYP

0.25 GAGE PLANE 3.05 2.55 1.1 0.7 0.1

0.0 TYP

5X 0.5 0.3

0.2 C A B

0.6

0.3 TYP

1.9 0 -8 TYP 0.95 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (0.2) (0.15) SOT-23 - 1.1 max heightDDC0005A SMALL OUTLINE TRANSISTOR 4220752/C 08/2024 SEATING PLANE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC MO-193. 4. Support pin may differ or may not be present. 0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

5X (1.1) 5X (0.6) (2.7) 4X (0.95) (R0.05) TYP 4220752/C 08/2024 SOT-23 - 1.1 max heightDDC0005A SMALL OUTLINE TRANSISTOR NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPLOSED METAL SHOWN SCALE:15X SYMM 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDERMASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.7) 4X(0.95) 5X (1.1) 5X (0.6) (R0.05) TYP SOT-23 - 1.1 max heightDDC0005A SMALL OUTLINE TRANSISTOR 4220752/C 08/2024 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:15X SYMM SYMM 3 4

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