TL5001

Pulse-Width-Modulation Control Circuits datasheet (Rev. F)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SLVS084,F]
• PDF pages: 36

Technical content

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 Complete PWM Power Control /C0068 3.6-V to 40-V Operation /C0068 Internal Undervoltage-Lockout Circuit /C0068 Internal Short-Circuit Protection /C0068 Oscillator Frequency. . . 20 kHz to 500 kHz /C0068 Variable Dead Time Provides Control Over Total Range /C0068 ±3% Tolerance on Reference Voltage (TL5001A) /C0068 Available in Q-Temp Automotive HighRel Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards

description

The TL5001 and TL5001A incorporate on a single monolithic chip all the functions required for a pulse-width-modulation (PWM) control circuit. De- signed primarily for power-supply control, the TL5001/A contains an error amplifier, a regulator, an oscillator, a PWM comparator with a dead-time-con- trol input, undervoltage lockout (UVLO), short-circuit protection (SCP), and an open-collector output transistor. The TL5001A has a typical reference voltage tolerance of ±3% compared to ±5% for the TL5001. The error-amplifier common-mode voltage ranges from 0 V to 1.5 V. The noninverting input of the error amplifier is connected to a 1-V reference. Dead-time control (DTC) can be set to provide 0% to 100% dead time by connecting an external resistor between DTC and GND. The oscillator frequency is set by terminating RT with an external resistor to GND. During low V CC conditions, the UVLO circuit turns the output off until VCC recovers to its normal operating range. The TL5001C and TL5001AC are characterized for operation from –20°C to 85°C. The TL5001I and TL5001AI are characterized for operation from –40°C to 85°C. The TL5001Q and TL5001AQ are characterized for operation from –40°C to 125°C. The TL5001M and TL5001AM are characterized for operation from –55°C to 125°C. AVAILABLE OPTIONS PACKAGED DEVICES TA SMALL OUTLINE (D) PLASTIC DIP (P) CERAMIC DIP (JG) CHIP CARRIER (FK) 20°Ct o8 5°C TL5001CD TL5001CP — — –20°C to 85°C TL5001ACD TL5001ACP — — 40°Ct o8 5°C TL5001ID TL5001IP — — –40°C to 85°C TL5001AID TL5001AIP — — 40°Ct o1 2 5°C TL5001QD — — — –40°C to 125°C TL5001AQD — — — 55°Ct o1 2 5°C — — TL5001MJG TL5001MFK –55°C to 125°C — — TL5001AMJG TL5001AMFK The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL5001CDR). Copyright  2002, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. OUT VCC COMP FB GND RT DTC SCP D, JG OR P PACKAGE (TOP VIEW) 1920132 1312119 10 NC RT NC DTC NC NC V CC NC COMP NC NC OUT NC GND NC FB NC SCP NC NC FK PACKAGE (TOP VIEW) On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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schematic for typical application TL5001/A FB COMP VO DTC RT VI SCP VCC TPS1101 GND VO functional block diagram GND OUT SCP COMP FB 4 – DTCRT Comparator 2 SCP PWM/DTC Comparator OSC Comparator 1 SCP Amplifier Error UVLO VCC 2 1 1 V

1.5 V 1 V

2.5 V

noninverting input which typically is within 2% of nominal over the operating temperature range. Figure 1. Error-Amplifier Gain Setting stability. Because the amplifier can only source 45 µA, the total dc load resistance should be 100 kΩ or more. the graph shown in Figure 5.

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Figure 2. Soft-Start Circuit triggering on noise and chattering. the SCP terminal is pulled to ground externally. attempt to maintain the output voltage. SCP comparator 1 starts an RC timing circuit when COMP exceeds 1.5 V. off the TL5001/A output transistor.

Figure 3. SCP Circuit tSCP must be much longer (generally 10 to 15 times) than the converter start-up period or the converter will not start. protection circuit is inactive.

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW FK 1375 mW 11.0 mW/ °C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/ °C 672 mW 546 mW 210 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW recommended operating conditions MIN MAX UNIT Supply voltage, VCC 3.6 40 V Amplifier input voltage, VI(FB) 0 1.5 V Output voltage, VO , OUT 50 V Output current, IO , OUT 20 mA COMP source current 45 µA COMP dc load resistance 100 kΩ Oscillator timing resistor, Rt 15 250 kΩ Oscillator frequency, fosc 20 500 kHz TL5001C, TL5001AC –20 85 O perating ambient temperature TA TL5001I, TL5001AI –40 85 °COperating ambient temperature, TA TL5001Q, TL5001AQ –40 125 TL5001M, TL5001AM –55 125

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 100 kHz (unless otherwise noted) reference PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Output voltage COMP connected to FB 0.95 1 1.05 0.97 1 1.03 V Input regulation VCC = 3.6 V to 40 V 2 12.5 2 12.5 mV TA = –20°C to 25°C (C suffix) –10 –1 10 –10 –1 10 Output voltage change with temperature TA = –40°C to 25°C (I suffix) –10 –1 10 –10 –1 10 mV/V TA = 25°C to 85°C –10 –2 10 –10 –2 10 † All typical values are at TA = 25°C. undervoltage lockout PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Upper threshold voltage TA = 25°C 3 3 V Lower threshold voltage TA = 25°C 2.8 2.8 V Hysteresis TA = 25°C 100 200 100 200 mV Reset threshold voltage TA = 25°C 2.1 2.55 2.1 2.55 V † All typical values are at TA = 25°C. short-circuit protection PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT SCP voltage, latched No pullup 140 185 230 140 185 230 mV SCP voltage, UVLO standby No pullup 60 120 60 120 mV Input source current TA = 25°C –10 –15 –20 –10 –15 –20 µA SCP comparator 1 threshold voltage 1.5 1.5 V † All typical values are at TA = 25°C. oscillator PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Frequency R t = 100 kΩ 100 100 kHz Standard deviation of frequency 15 15 kHz Frequency change with voltage VCC = 3.6 V to 40 V 1 1 kHz TA = –40°C to 25°C –4 –0.4 4 –4 –0.4 4 kHz Frequency change with temperature TA = –20°C to 25°C –4 –0.4 4 –4 –0.4 4 kHz TA = 25°C to 85°C –4 –0.2 4 –4 –0.2 4 kHz Voltage at RT 1 1 V † All typical values are at TA = 25°C.

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 100 kHz (unless otherwise noted) (continued) dead-time control PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Output (source) current µA Input threshold voltage Duty cycle = 0% 0.5 0.7 0.5 0.7 VInput threshold voltage Duty cycle = 100% 1.3 1.5 1.3 1.5 V † All typical values are at TA = 25°C. ‡ Output source current at RT error amplifier PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Input voltage VCC = 3.6 V to 40 V 0 1.5 0 1.5 V Input bias current –160 –500 –160 –500 nA Output voltage swing Positive 1.5 2.3 1.5 2.3 V Output voltage swing Negative 0.3 0.4 0.3 0.4 V Open-loop voltage amplification 80 80 dB Unity-gain bandwidth 1.5 1.5 MHz Output (sink) current VI(FB) = 1.2 V,COMP = 1 V 100 600 100 600 µA Output (source) current VI(FB) = 0.8 V,COMP = 1 V –45 –70 –45 –70 µA † All typical values are at TA = 25°C. output PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Output saturation voltage IO = 10 mA 1.5 2 1.5 2 V Off state current VO = 50 V, VCC = 0 10 10 µAOff-state current VO = 50 V 10 10 µA Short-circuit output current VO = 6 V 40 40 mA † All typical values are at TA = 25°C. total device PARAMETER TEST CONDITIONS TL5001C, TL5001I TL5001AC, TL5001AI UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Standby supply current Off state 1 1.5 1 1.5 mA Average supply current R t = 100 kΩ 1.4 2.1 1.4 2.1 mA † All typical values are at TA = 25°C.

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 100 kHz (unless otherwise noted) reference PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNIT MIN TYP † MAX MIN TYP † MAX Output voltage TA = 25°C COMP connected to FB VOutput voltage TA = MIN to MAX COMP connected to FB V Input regulation TA = MIN to MAX VCC = 3.6 V to 40 V 2 12.5 2 12.5 mV Output voltage change with temper- ature TA = MIN to MAX *–6 2 *6 *–6 2 *6 % † All typical values are at TA = 25°C. *Not production tested. undervoltage lockout PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT U pper threshold voltage TA = MIN, 25°C 3.00 3.00 VUpper threshold voltage TA = MAX 2.55 2.55 V Lower threshold voltage TA = MIN, 25°C 2.8 2.8 VLower threshold voltage TA = MAX 2.0 2.0 V Hysteresis TA = MIN to MAX 100 200 100 200 mV Reset threshold voltage TA = MIN, 25°C 2.10 2.55 2.10 2.55 VReset threshold voltage TA = MAX 0.35 0.63 0.35 0.63 V † All typical values are at TA = 25°C. short-circuit protection PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNIT MIN TYP † MAX MIN TYP † MAX SCP threshold voltage VSCP threshold voltage V SCP voltage, latched TA = MIN to MAX No pullup 140 185 230 140 185 230 mV SCP voltage, UVLO standby TA = MIN to MAX No pullup 60 120 60 120 mV Equivalent timing resistance TA = MIN to MAX 185 185 kΩ SCP comparator 1 threshold voltage TA = MIN to MAX 1.5 1.5 V † All typical values are at TA = 25°C.

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 100 kHz (unless otherwise noted) (continued) oscillator PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNIT MIN TYP † MAX MIN TYP † MAX Frequency TA = MIN to MAX R t = 100 kΩ 100 100 kHz Standard deviation of frequency TA = MIN to MAX 2 2 kHz Frequency change with voltage TA = MIN to MAX VCC = 3.6 V to 40 V 1 1 kHz Frequency change with TA = MIN to MAX kHzFrequency change with temperature TA = MIN to MAX kHz Voltage at RT TA = MIN to MAX 1 1 V † All typical values are at TA = 25°C. *Not production tested. dead-time control PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Output (source) TA =2 5°C Duty cycle = 0% 0.5 0.7 0.5 0.7 Input threshold TA = 25°C Duty cycle = 100% 1.3 1.5 1.3 1.5 Vvoltage TA = MIN to MAX Duty cycle = 0% 0.4 0.7 0.4 0.7 V TA = MIN to MAX Duty cycle = 100% 1.3 1.7 1.3 1.7 † All typical values are at TA = 25°C. ‡ Output source current at RT error amplifier PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Input bias current TA = MIN to MAX –160 –500 –160 –500 nA Output volta ge Positive TA = MIN to MAX 1.5 2.3 1.5 2.3 VOut ut voltage swing Negative TA = MIN to MAX 0.3 0.4 0.3 0.4 V Open-loop voltage amplification TA = MIN to MAX 80 80 dB Unity-gain bandwidth TA = MIN to MAX 1.5 1.5 MHz Output (sink) current TA = MIN to MAX VI(FB) = 1.2 V,COMP = 1 V 100 600 100 600 µA Output (source) current TA = MIN, 25°C VI(FB)=08V COMP = 1 V –45 –70 –45 –70 µAOutput (source) current TA = MAX VI(FB) = 0.8 V, COMP = 1 V –30 –45 –30 –45 µA † All typical values are at TA = 25°C.

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, VCC = 6 V, fosc = 100 kHz (unless otherwise noted) (continued) output PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNIT MIN TYP † MAX MIN TYP † MAX Output saturation voltage TA = MIN to MAX IO = 10 mA 1.5 2 1.5 2 V Off state current TA = MIN to MAX VO = 50 V,VCC = 0 10 10 µAOff-state current TA = MIN to MAX VO = 50 V 10 10 µA Short-circuit output current TA = MIN to MAX VO = 6 V 40 40 mA † All typical values are at TA = 25°C. total device PARAMETER TEST CONDITIONS TL5001Q, TL5001M TL5001AQ, TL5001AM UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Standby supply current Off state TA = MIN to MAX 1 1.5 1 1.5 mA Average supply current TA = MIN to MAX R t = 100 kΩ 1.4 2.1 1.4 2.1 mA † All typical values are at TA = 25°C.

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NOTE A: The waveforms show timing characteristics for an intermittent short circuit and a longer short circuit that is sufficient to activate SCP. Figure 4. PWM Timing Diagram

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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0.5 1.5 0 1 02 03 04 0 – Average Supply Current – mA VCC – Power-Supply Voltage – V R t = 100 kΩ TA = 25 °C AVERAGE SUPPLY CURRENT vs POWER-SUPPLY VOLTAGE ICC Figure 10 0.9 0.8 – 50 – 25 0 – Average Supply Current – mA 1.1 1.2 1.3 25 50 75 100 TA – Ambient Temperature – °C VCC = 6 V R t = 100 kΩ DT Resistance = 100 kΩ ICC AVERAGE SUPPLY CURRENT vs AMBIENT TEMPERATURE Figure 11 1.5 1.2 0.6 0.3 1.8 0.9 10 k 100 k 1 M 10 M PWM Triangle Wave Amplitude Voltage – V fosc – Oscillator Frequency – Hz Voscmin (zero duty cycle) VCC = 6 V TA = 25 °C PWM TRIANGLE WAVE AMPLITUDE VOLTAGE vs OSCILLATOR FREQUENCY Voscmax (100% duty cycle) Figure 12 ERROR AMPLIFIER OUTPUT VOLTAGE vs OUTPUT (SINK) CURRENT – Error Amplifier Output Voltage – VVO IO – Output (Sink) Current – mA 1.5 0.5 0 0.2 0.4 2.5 0.6 VCC = 6 V VI(FB) = 1.2 V TA = 25 °C

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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0 0.5 1 100 120 1.5 2 DTC Voltage – V OUTPUT DUTY CYCLE vs DTC VOLTAGE Output Duty Cycle – % VCC = 6 V R t = 100 kΩ TA = 25 °C Figure 18 02 04 0 – SCP Time-Out Period – ms 60 80 100 120 VCC = 6 V R t = 100 kΩ DT Resistance = 200 kΩ TA = 25 °C C SCP – SCP Capacitance – nF tSCP SCP TIME-OUT PERIOD vs SCP CAPACITANCE Figure 19 – 30 – 20 – 10 0 – 10 – 20 – DTC Output Current – – 40 – 50 – 60 – 30 – 40 – 50 – 60 DT Voltage = 1.3 V TA = 25 °C IO – RT Output Current – µA AµIO(DT) DTC OUTPUT CURRENT vs RT OUTPUT CURRENT Figure 20 0.5 1.5 0 5 10 15 20 – Output Saturation Voltage – V IO – Output (Sink) Current – mA VCE VCC = 6 V TA = 25 °C OUTPUT SATURATION VOLTAGE vs OUTPUT (SINK) CURRENT

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

100 µF 10 V VI 5 V + R1 470 Ω SCP VCC 20 µH 100 µF 10 V 3.3 V GND CR1 MBRS140T3 TPS1101 0.012 µF 5.1 kΩ 7.50 kΩ 56 kΩ 43 kΩ 3.24 kΩ 0.1 µF 1 µF 0.1 µF GND Partial Bill of Materials: U1 TL5001/A Texas Instruments Q1 TPS1101 Texas Instruments LI CTX20-1 or Coiltronics 23 turns of #28 wire on Micrometals No. T50-26B core C1 TPSD107M010R0100 AVX C2 TPSD107M010R0100 AVX CR1 MBRS140T3 Motorola 2.0 kΩ 0.0047 µF NOTES: A. Frequency = 200 kHz B. Duty cycle = 90% max C. Soft-start time constant (TC) = 5.6 ms D. SCP TC = 70 msA Figure 21. Step-Down Converter

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002

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D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0.228 (5,80) 0.244 (6,20) 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.014 (0,35) 0.020 (0,51) A 0.157 (4,00) 0.150 (3,81) 0.044 (1,12) 0.016 (0,40) Seating Plane 0.010 (0,25) PINS ** 0.008 (0,20) NOM A MIN A MAX DIM Gage Plane 0.189 (4,80) (5,00) 0.197 (8,55) (8,75) 0.337 0.344 (9,80) 0.394 (10,00) 0.386 0.004 (0,10) M0.010 (0,25) 0.050 (1,27) 0°–8° NOTES: B. All linear dimensions are in inches (millimeters). C. This drawing is subject to change without notice. D. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). E. Falls within JEDEC MS-012

TL5001, TL5001A PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS084F – APRIL 1994 – REVISED JANUARY 2002 19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/C 11/95

28 TERMINALS SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.740 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold-plated. E. Falls within JEDEC MS-004

www.ti.com 15-Jul-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) 5962-9958301QPA Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 9958301QPA TL5001M 5962-9958302Q2A Active Production LCCC (FK) | 20 55 | TUBE No SNPB N/A for Pkg Type -55 to 125 5962- 9958302Q2A TL5001 AMFKB 5962-9958302QPA Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 9958302QPA TL5001AM TL5001ACD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -20 to 85 5001AC TL5001ACD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AC TL5001ACDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -20 to 85 5001AC TL5001ACDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AC TL5001AID Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 5001AI TL5001AID.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AI TL5001AIDG4 Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 5001AI TL5001AIDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 5001AI TL5001AIDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AI TL5001AIP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL5001AIP TL5001AIP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 125 TL5001AIP TL5001AMFKB Active Production LCCC (FK) | 20 55 | TUBE No SNPB N/A for Pkg Type -55 to 125 5962- 9958302Q2A TL5001 AMFKB TL5001AMFKB.A Active Production LCCC (FK) | 20 55 | TUBE No SNPB N/A for Pkg Type -55 to 125 5962- 9958302Q2A TL5001 AMFKB TL5001AMJGB Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 9958302QPA TL5001AM TL5001AMJGB.A Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 9958302QPA TL5001AM TL5001AQD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ Addendum-Page 1

www.ti.com 15-Jul-2026 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TL5001AQD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001AQDG4 Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001AQDG4.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001AQDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001AQDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001AQDRG4 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001AQDRG4.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001AQ TL5001CD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -25 to 85 5001C TL5001CD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001C TL5001CDG4 Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -25 to 85 5001C TL5001CDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -25 to 85 5001C TL5001CDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001C TL5001CDRG4 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -25 to 85 5001C TL5001CP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -25 to 85 TL5001CP TL5001CP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 125 TL5001CP TL5001CPS Active Production SO (PS) | 8 80 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 T5001 TL5001CPS.A Active Production SO (PS) | 8 80 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 T5001 TL5001CPSR Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -25 to 85 T5001 TL5001CPSR.A Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 T5001 TL5001ID Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 5001I TL5001ID.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001I TL5001IDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 5001I TL5001IDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001I TL5001IP Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL5001IP TL5001IP.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 125 TL5001IP TL5001IPE4 Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 TL5001IP TL5001IPSR Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 Z5001 TL5001IPSR.A Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 Z5001 TL5001MJG Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 TL5001MJG TL5001MJG.A Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 TL5001MJG Addendum-Page 2

www.ti.com 15-Jul-2026 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TL5001MJGB Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 9958301QPA TL5001M TL5001MJGB.A Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 9958301QPA TL5001M TL5001QD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QDG4 Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QDG4.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QDRG4 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q TL5001QDRG4.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 5001Q (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative Addendum-Page 3

www.ti.com 15-Jul-2026 and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TL5001, TL5001A, TL5001AM, TL5001M :

• Catalog : TL5001A , TL5001
• Automotive : TL5001A-Q1 , TL5001A-Q1
• Military : TL5001M , TL5001AM NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Military - QML certified for Military and Defense Applications Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL5001ACDR SOIC D 8 2500 340.5 338.1 20.6 TL5001AIDR SOIC D 8 2500 340.5 338.1 20.6 TL5001AQDR SOIC D 8 2500 350.0 350.0 43.0 TL5001AQDRG4 SOIC D 8 2500 350.0 350.0 43.0 TL5001CDR SOIC D 8 2500 353.0 353.0 32.0 TL5001CPSR SO PS 8 2000 353.0 353.0 32.0 TL5001IDR SOIC D 8 2500 353.0 353.0 32.0 TL5001IPSR SO PS 8 2000 353.0 353.0 32.0 TL5001QDR SOIC D 8 2500 350.0 350.0 43.0 TL5001QDRG4 SOIC D 8 2500 350.0 350.0 43.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) 5962-9958302Q2A FK LCCC 20 55 506.98 12.06 2030 NA TL5001ACD D SOIC 8 75 507 8 3940 4.32 TL5001ACD.A D SOIC 8 75 507 8 3940 4.32 TL5001AID D SOIC 8 75 507 8 3940 4.32 TL5001AID.A D SOIC 8 75 507 8 3940 4.32 TL5001AIDG4 D SOIC 8 75 507 8 3940 4.32 TL5001AIP P PDIP 8 50 506 13.97 11230 4.32 TL5001AIP.A P PDIP 8 50 506 13.97 11230 4.32 TL5001AMFKB FK LCCC 20 55 506.98 12.06 2030 NA TL5001AMFKB.A FK LCCC 20 55 506.98 12.06 2030 NA TL5001AQD D SOIC 8 75 505.46 6.76 3810 4 TL5001AQD.A D SOIC 8 75 505.46 6.76 3810 4 TL5001AQDG4 D SOIC 8 75 505.46 6.76 3810 4 TL5001AQDG4.A D SOIC 8 75 505.46 6.76 3810 4 TL5001CD D SOIC 8 75 507 8 3940 4.32 TL5001CD.A D SOIC 8 75 507 8 3940 4.32 TL5001CDG4 D SOIC 8 75 507 8 3940 4.32 TL5001CP P PDIP 8 50 506 13.97 11230 4.32 TL5001CP.A P PDIP 8 50 506 13.97 11230 4.32 TL5001CPS PS SOP 8 80 530 10.5 4000 4.1 TL5001CPS.A PS SOP 8 80 530 10.5 4000 4.1 TL5001ID D SOIC 8 75 507 8 3940 4.32 TL5001ID.A D SOIC 8 75 507 8 3940 4.32 TL5001IP P PDIP 8 50 506 13.97 11230 4.32 TL5001IP.A P PDIP 8 50 506 13.97 11230 4.32 TL5001IPE4 P PDIP 8 50 506 13.97 11230 4.32 TL5001QD D SOIC 8 75 505.46 6.76 3810 4 TL5001QD.A D SOIC 8 75 505.46 6.76 3810 4 TL5001QDG4 D SOIC 8 75 505.46 6.76 3810 4 Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TL5001QDG4.A D SOIC 8 75 505.46 6.76 3810 4 Pack Materials-Page 4

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. LCCC - 2.03 mm max heightFK 20 LEADLESS CERAMIC CHIP CARRIER8.89 x 8.89, 1.27 mm pitch 4229370\\/A\\

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

www.ti.com PACKAGE OUTLINE 10.16 9.00 7.11 6.22 1.60 0.38 6X 2.54 8X 0.58 0.38 4X 1.65 1.14 0.51 MIN 3.30 MIN

5.08 MAX

7.87 7.37 0.36

0.20 TYP

4X (0.94) CDIP - 5.08 mm max heightJG0008A CERAMIC DUAL IN-LINE PACKAGE 4230036/A 09/2023 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package can be hermetically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification. 5. Falls within MIL STD 1835 GDIP1-T8 SEATING PLANE

0.25 C A B

A B C

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

(7.62) 6X (2.54) 8X ( 1) THRU 7X ( 1.6) (1.6) (R0.05) TYP CDIP - 5.08 mm max heightJG0008A CERAMIC DUAL IN-LINE PACKAGE 4230036/A 09/2023 LAND PATTERN EXAMPLE NON SOLDER MASK DEFINED SCALE: 9X SOLDER MASK OPENING TYP METAL TYP SYMM SYMM 4 5

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