SP4666

SP4666 ZARLINK

Document overview

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Technical content

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DS2219 - 2 .4 SP4666 Prescaler with low current and low radiation The SP4666 is a selectable division ratio high speed divider capable of replacing separate fixed ratio ECL prescalers with a single part in applications with alternative 464 and 4256 division requirements. A switched low pass filter with 23dB points at 5·3MHz and 15·6MHz is connected before the output stage to reduce the harmonic content to a very low level.

FEATURES

■ Switched Low Pass Filter for Very Low Output Radiation ■ Low Supply Current ■ Input Wideband Amplifier ■ High Input Sensitivity ■ High Input Impedance ■ Balanced ECL Outputs ■ Electrostatic Protection † † ESD precautions must be observed Fig. 2 SP4666 block diagram VCC INPUTS OUTPUTS 500 500 VCC 20k 10k 50µA 2mA 464/4256 SELECT FILTER 17V 2·5V p-p 255°C to 1150°C 0°C to180°C ABSOLUTE MAXIMUM RATINGS Supply voltage, VCC Input voltage Storage temperature Operating temperature range

ORDERING INFORMATION

Fig 1. Pin connections - top view MP8 DP8 NC INPUT INPUT 15V OUTPUT OUTPUT 464 /4256 SELECT 115V OUTPUT OUTPUT 464 /4256 SELECT NC INPUT INPUT SP4666 SP4666

ELECTRICAL CHARACTERISTICS

These characteristics are guaranteed over the following conditions (unless otherwise stated): TAMB = 0°C to 180°C, VCC = 4·5V to 5·5V (Test circuit see Fig. 3) Characteristic Supply current, ICC Input sensitivity 50MHz 200MHz to 1050MHz 1050MHz to 1300MHz Input overload Input impedance Output voltage with 12pF load Output impedance Output imbalance Voltage for 4256 operation Voltage for 464 operation Sink current for 4256 operation Conditions Value Typ. Max.Min. Units 0·5 250 mA mV mV mV mV Ω pF V p-p V p-p V p-p V p-p V p-p V p-p Ω V V V µA 2,3 2,3 2,3 6,7 6,7 6,7 500 0·8 0·8 0·4 0·7 0·25 0·6 3·5 2·5 0·5 0·5 0·9 0·35 0·7 500 0·1 Pin V CC = 15V RMS sinewave (50Ω system) See Fig. 6 464 mode, fIN = 100MHz 4256 mode, fIN = 100MHz 464 mode, fIN = 1000MHz 4256 mode, fIN = 1000MHz 464 mode, fIN = 1300MHz 4256 mode, fIN = 1300MHz See note 1 Vpin5 = 0V Fig. 4 Application circuit 12p 15V 0·1 µ OUTPUTS 100p

1 TURN

NOTE: For 464 operation, pin 5 may be left open circuit or connected to 15V Fig. 3 Test circuit 15V 180° HYBRID COUPLER 0·1 µ OUTPUT 12p 12p A 50 Ω SIGNAL GENERATOR B C D 50 Ω SAMPLING SCOPE SP4666 OPEN = 464 CLOSED = 4256 OUTPUT NOTES 1. Pin 5 has an internal pull-up and may be left open-circuit for 464 operation. 2. The difference between the maximum input sensitivity and minimum overload voltage is the guaranteed dynamic range. Input signal levels should be maintained within these limits at all frequencies.

Fig. 5 Typical input sensitivity Fig. 6 Typical input impedance (frequencies in MHz) j0.5 j0.2 2j0.2 2j0.5 2j1 2j2 10.50.2 2j5 2 5 1000 200 500 S11 ZO = 50Ω 1300 0 200 400 600 800 1000 1200 1400 FREQUENCY (MHz) VIN (mV RMS INTO 50Ω ) TYPICAL DEVICE SPECIFICATION LIMIT

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