DATASHEET SEARCH SITE

Document overview

  • Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 27

Technical content

Features

  • Wide Operating Input Vo ltage: 4.5 V to 13.2 V
  • Maximum Continuous Current: 6 A
  • Automatic nFET SOA Protection
  • High-performance MOSFET Switch Low RDS ON: 18 mΩ at VIN = 12 V Low ΔRDSON/ΔVIN: < 0.05 mΩ/V Low ΔRDSON/ΔT: < 0.06 mΩ/°C
  • 2-Level, Pin-selectable V IN Overvoltage Lockout
  • Capacitor-adjustable Inrush Current Control
  • Two stage Current Limit Protection: Resistor-adjustable Active Current Limit Internal Short-circuit Current limit
  • Open Drain FAULT Signaling
  • MOSFET Current Analog Output Monitor: 10 µA/A
  • Fast 4 kΩ Output Discharge
  • Pb-Free / Halogen-Free / RoHS Compliant Packaging Pin Configuration

Applications

  • Enterprise Computin g & Telecom Equipment

5 V and 12 V Point-of-Load Power Distribution

  • PCI/PCIe Adapter Cards
  • General-purpose High-volt age, Power-Rail Switching
  • Multifunction Printers
  • Fan Motor Control ON 1 FAULT CAP GND GND 2 VIN 4 VOUT SEL RSET IOUT VIN VIN 5 VIN 7 VOUT12 VOUT VOUT VIN VOUT 18-pin STQFN 1.6 x 3.0 mm, 0.40mm pitch (Top View) SLG59H1126V

12 V ±10%

3 V FS - Connect

100 k Linear Ramp Control State Machine (CL/SC Detection and Over Temperature Protection) DischargeCMOS Input VIN OVLO 14.4V RSET 30.1 k 47 F RIOUT 84.5 k GND OFF CLOAD 22 F 1 to 22F 0.1 F VLOGIC CIOUT 0.18 nF RPU1 10 k VLOGIC SEL VOUT IOUT ON RSET CAP VIN CIN = C1 + C2 + C3

Revision 1.00 Page 2 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Pin Description

Ordering Information

Pin # Pin Name Type Pin Description

1 ON Input

A low-to-high transition on this pin initiates the operation of the SLG59H1126V’s state machine. ON is an asserted HIGH, level-sensitive CMOS input with ON_VIL < 0.3 V and ON_VIH > 0.9 V. As the ON pin input circuit does not have an internal pull-down resistor, connect this pin to a general-purpose output (GPO) of a microcontroller, an application processor, or a system controller – do not allow this pin to be open-circuited. 2 GND GND Low-current ground termi nal. Connect this pin directly to Pin 3 3G N D G N D Pin 3 is the main ground connection for the SLG59H1126V’s internal charge pump, its gate driver and current-limit circuits as well as its internal state machine. Therefore, use a short, stout connection from Pin 3 to the system’s analog or power plane. 4-8 VIN MOSFET VIN supplies the power for the operation of the SLG59H1126V, its internal control circuitry, and the drain terminal of the nFET power switch. With 5 pins fused together at VIN, connect a 47 µF (or larger) low-ESR capacitor from this pin to ground. Capacitors used at VIN should be rated at 50 V or higher. 9-13 VOUT MOSFET Source terminal of n-channel MOSFET (5 pins fused for VOUT). Connect a 22 µF (or larger) low-ESR capacitor from this pin to ground. Capacitors used at VOUT should be rated at 50 V or higher.

14 SEL Input

As level-sensitive, CMOS inputs with SEL_VIL < 0.3 V and SEL_VIH > 1.65 V, the SEL pin selects one of two VIN overvoltage lockout thresholds. Please see the Applications Section for additional information and the Electrical Characteristics table for the VIN overvoltage thresholds. A logic LOW is achieved by connecting the pin to GND; a logic HIGH achieved by connecting a 10 kΩ external resistor from the pin to the system’s local logic supply.

15 FAULT Output

An open drain output, FAULT is asserted within TFAULTLOW when a VIN overvoltage, a current-limit, or an over-temperature condition is detected. FAULT is deasserted within TFAULTHIGH when the fault condition is removed. Connect an 100 k external resistor from the FAULT pin to local system logic supply.

16 CAP Output

A low-ESR, stable dielectric, ceramic surface-mount capacitor connected from CAP pin to GND sets the VOUT slew rate and overall turn-on time of the SLG59H1126V. For best performance, the range for CSLEW values are 10 nF ≤ CSLEW ≤ 20 nF – please see typical characteristics for additional information. Capacitors used at the CAP pin should be rated at 10 V or higher. Please consult Applications Section on how to select CSLEW based on VOUT slew rate and loading conditions.

17 IOUT Output

IOUT is the SLG59H1126V’s power MOSFET load current monitor output. As an analog current output, this signal when applied to a ground-reference resistor generates a voltage proportional to the current through the n-channel MOSFET. The IOUT transfer characteristic is typically 10 μA/A with a voltage compliance range of 0.5 V ≤ VIOUT ≤ 4 V. Optimal IOUT linearity is exhibited for 0.5 A ≤ IDS ≤ 6 A. In addition, it is recommended to bypass the IOUT pin to GND with a 0.18 nF capacitor.

18 RSET Input

A 1%-tolerance, metal-film resistor between 13.3 k and 91 kΩ sets the SLG59H1126V’s active current limit. A 91 kΩ resistor sets the SLG59H1126V’s active current limit to 1 A and a 13.3 kΩ resistor sets the active current limit to 7 A. Part Number Type Production Flow SLG59H1126V STQFN 18L FC Industrial, -40 C to 85C SLG59H1126VTR STQFN 18L FC (Tape and Reel) Industrial, -40 C to 85 C

Revision 1.00 Page 3 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Absolute Maximum Ratings Parameter Description Conditions Min. Typ. Max. Unit VIN to GND Power Switch Input Voltage to GND Continuous -0.3 -- 16 V Maximum pulsed VIN, pulse width < 0.1 s -- -- 18 V VOUT to GND Power Switch Output Voltage to GND -0.3 -- V IN V ON, SEL, CAP, RSET, IOUT, and FAULT to GND ON, SEL, CAP, RSET, IOUT, and FAULT Pin Voltages to GND -0.3 -- 7 V TS Storage Temperature -65 -- 150 °C ESDHBM ESD Protection Human Body Model 2000 -- -- V ESDCDM ESD Protection Charged Device Model 500 -- -- V MSL Moisture Sensitivity Level 1 JA Thermal Resistance 1.6 x 3.0 mm 18L STQFN; Determined with the device mounted onto a 1 in2, 1 oz. copper pad of FR-4 material -- 40 -- °C/W MOSFET IDSCONT Continuous Current from VIN to VOUT T MOSFET IDSPEAK Peak Current from VIN to VOUT Maximum pulsed switch current, pulse width < 1 ms -- -- 7 A Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of t he device at these or any oth er conditions above those indica ted in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Electrical Characteristics

4.5 V ≤ VIN ≤ 13.2 V; CIN = 47 µF, TA = -40 °C to 85 °C, unless otherwise noted. Typical values are at TA = 25 °C Parameter Description Conditions Min. Typ. Max. Unit VIN Operating Input Voltage 4.5 -- 13.2 V VIN(OVLO) VIN Overvoltage Lockout Threshold VIN ↑; SEL = LOW 5.6 6 6.3 V VIN ↑; SEL = HIGH 13.5 14.4 15.2 V VIN(UVLO) VIN Undervoltage Lockout Threshold VIN ↓ 2.4 -- 3.8 V IQ Quiescent Supply Current ON = HIGH; I DS = 0 A -- 0.5 0.6 mA ISHDN OFF Mode Supply Current ON = LOW; I DS = 0 A -- 1 3 µA RDSON ON Resistance TA = 25 °C; IDS = 0.1 A -- 18 20 mΩ TA = 85 °C; IDS = 0.1 A -- 22 24 mΩ MOSFET IDS Current from VIN to VOUT Continuous -- -- 6 A ILIMIT Short-circuit Current Limit, ISCL VOUT < 0.5 V -- 0.5 -- A TACL Active Current Limit Response Time -- 120 -- µs RDISCHRG Output Discharge Resistance 3.5 4.4 5.3 kΩ IOUT MOSFET Current Analog Monitor Output IDS = 1 A 9.3 10 10.7 µA IDS = 3 A 28.5 30 31.5 µA TIOUT IOUT Response Time to Change in Main MOSFET Current CIOUT = 180 pF; Step load 0 to 2.4 A; 0% to 90% IOUT -- 45 -- µs

Revision 1.00 Page 4 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY CLOAD Output Load Capacitance CLOAD connected from VOUT to GND -- 22 -- µF TON_Delay ON Delay Time 50% ON to 10% VOUT ↑; VIN = 4.5 V; CSLEW = 10 nF; RLOAD = 100 Ω, CLOAD = 10 µF -- 0.3 0.5 ms 50% ON to 10% VOUT ↑; VIN = 12 V; CSLEW = 10 nF; RLOAD = 100 Ω, CLOAD = 10µF -- 0.7 1.2 ms TTotal_ON Total Turn ON Time 50% ON to 90% VOUT ↑ Set by External C SLEW 1 ms 50% ON to 90% VOUT ↑; VIN = 4.5 V; CSLEW = 10 nF; RLOAD = 100 Ω, CLOAD = 10 µF -- 1.4 2.1 ms 50% ON to 90% VOUT ↑; VIN = 12 V; CSLEW = 10 nF; RLOAD = 100 Ω, CLOAD = 10 µF -- 5 8 ms VOUT(SR) VOUT Slew rate 10% VOUT to 90% VOUT ↑ Set by External C SLEW

1 V/ms

10% VOUT to 90% VOUT ↑; VIN = 4.5 to 12 V; CSLEW = 10 nF; RLOAD = 100 Ω, CLOAD = 10 µF 2.7 3.2 3.9 V/ms TOFF_Delay OFF Delay Time 50% ON to VOUT Fall Start ↓; VIN = 4.5 to 12 V; RLOAD = 100 Ω, No CLOAD -- 15 -- µs TFALL VOUT Fall Time 90% VOUT to 10% VOUT; ON = HIGH-to-LOW; VIN = 4.5 to 12 V; RLOAD = 100 Ω, No CLOAD 10.4 12.7 14.3 µs TFAULTLOW FAULT Assertion Time Abnormal Step Load Current event to FAULT↓; IACL = 1 A; VIN = 12 V; RSET = 91 kΩ; switch in 10 Ω load -- 80 -- µs TFAULTHIGH FAULT De-assertion Time Delay to FAULT↑ after fault condition is removed; IACL = 1 A; VIN = 12 V; RSET = 91 kΩ; switch out 10 Ω load -- 180 -- µs FAULTVOL FAULT Output Low Voltage I FAULT = 1 mA -- 0.2 -- V ON_VIH ON Pin Input High Voltage 0.9 -- 5 V ON_VIL ON Pin Input Low Voltage -0.3 0 0.3 V SEL_VIH SEL pin Input High Voltage 1.65 -- 4.5 V SEL_VIL SEL pin Input Low Voltage -0.3 -- 0.3 V ION(Leakage) ON Pin Leakage Current 1 V ≤ ON ≤ 5 V or ON = GND -- -- 1 µA THERMON Thermal Protection Shutdown Threshold -- 150 -- °C THERMOFF Thermal Protection Restart Threshold -- 125 -- °C Notes: 1. Refer to typical Timing Parameter vs. CSLEW performance charts for additional information when available. Electrical Characteristics (continued) 4.5 V ≤ VIN ≤ 13.2 V; CIN = 47 µF, TA = -40 °C to 85 °C, unless otherwise noted. Typical values are at TA = 25 °C Parameter Description Conditions Min. Typ. Max. Unit

Revision 1.00 Page 5 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY TTotal_ON, TON_Delay and Slew Rate Measurement 90% VOUT 50% ON TON_Delay VOUT(SR) (V/ms) ON* VOUT TTotal_ON 10% VOUT 50% ON 10% VOUT TOFF_Delay TFALL 90% VOUT *Rise and Fall Times of the ON Signal are 100 ns

Revision 1.00 Page 6 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Typical Performance Characteristics RDSON vs. Temperature, and VIN IACL vs. Temperature, RSET, and VIN

Revision 1.00 Page 7 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY IACL vs. RSET, and VIN IOUT vs. MOSFET IDS and VIN

Revision 1.00 Page 8 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY IOUT vs. Temperature and MOSFET IDS, and VIN VOUT Slew Rate vs. Temperature, VIN, and CSLEW

Revision 1.00 Page 9 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY TTotal_ON vs. CSLEW, VIN, and Temperature

Revision 1.00 Page 10 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Timing Diagram - Basic Operation including Active Current Limit Protection VIN ON Time LOW HIGH TFAULTHIGH VOUT IDS 90% 10% TON_Delay Active Current Limit Operation FAULT HIGH ISCL IACL ISCL IACL ON TFAULTLOW Nominal Steady State Operation ResumesACL Threshold Triggered Abnormal Step Load Current Event TRISE

Revision 1.00 Page 11 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Timing Diagram - Active Current Limit & Thermal Protection Operation VOUT IDS 90% 10% TON_Delay Active Current Limit Operation Thermal Protection Operation ISCL IACL ISCL IACL TFAULTHIGHFAULT VIN ON Time LOW HIGH Nominal Steady State Operation Resumes TFAULTLOW Die temp > THERMON Abnormal Step Load Current Event TRISE TTotal_ON Die temp < THERMOFF

Revision 1.00 Page 12 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Timing Diagram - Basic Operation including Active Current + Internal FET SOA Protection VIN ON Time LOW HIGH TFAULTHIGH VOUT IDS 90% 10% 0.2s TON_Delay Active C urrent Limit Operation FAULT HIGH ISCL IACL ISCL IACL ON TFAULTLOW ACL Threshold Triggered Nominal Steady State Operation resumes once overload condition is removed Automatic restart after 0.2s “cool off” delay and normal operation resumes if overload condition is removed FET SOA Threshold Triggered and FET is turned off ACL Threshold Triggered Abnormal Step Load Current Event SOA Threshold TRISE Decreasing RLOAD drops VOUT SOA Protection

Figure 9. Typical FAULT de-assertion waveform for VIN = 4.5 V, CLOAD = 10 μF, IACL = 1 A,

Revision 1.00 Page 18 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Applications Information HFET1 Safe Operating Area Explained Silego’s HFET1 integrated power controllers incorporate a numbe r of internal protection featu res that prevents them from damaging themselves or any other circuit or subcircuit downstre am of them. One particular pro tection feature is their Safe Operation Area (SOA) protection. SOA protection is automaticall y activated under overpower and, in some cases, under overcurrent conditions. Overpower SOA is activated if package power dissipation exceeds an internal 5W threshold longer than 2.5 ms. HFET1 devices will quickly switch off (open circuit) upon overpower detection and automatically resume (close) nominal operation once overpower condition no longer exists. One possible way to have an overpower condition trigger SOA protection is when HFET1 products are enabled into heavy output resistive loads and/or into large load capacitors. It is under these conditions to follow care fully the “Safe Start-up Loading ” guidance in the Applications section of the datasheet. During an overcurrent condition, HFET1 devices will try to limit the output current to the level set by the external R SET resistor. Limiting the output current, however, causes an incr eased voltage drop across the FET’s channel because the FET’s RDS ON increased as well. Since the FET’s RDS ON is larger, package power dissipation also increases. If the resultant increase in package power dissipation is higher/equal than 5 W for longer than 2.5 ms, internal SOA protection will be triggered and the FET will open circuit (switch off). Every tim e SOA protection is triggered, all HFET1 devices will automatically attempt to resume nominal operation after 160 ms. Safe Start-up Condition SLG59H1126V has built-in protection to prevent over-heating during start-up into a heavy load. Overloading the VOUT pin with a capacitor and a resistor may result in non-monotonic V OUT ramping. In general, under light loading on VOUT, V OUT ramping can be controlled with CSLEW value. The following equation serves as a guide: where T RISE = Total rise time from 10% VOUT to 90% VOUT VIN = Input Voltage CSLEW = Capacitor value for CAP pin When capacitor and resistor loading on VOUT during start up, the following tables will ensure VOUT ramping is monotonic without triggering internal protection: Note 2: Select the closest-value tolerance capacitor. Safe Start-up Loading for VIN = 12 V (Monotonic Ramp) Slew Rate (V/ms) C SLEW (nF)2 CLOAD (µF) R LOAD (Ω) 1 33.3 500 20 2 16.7 250 20 3 11.1 160 20 4 8.3 120 20 5 6.7 100 20 CSLEW = TRISE VIN x 4.9 µA x 20

Revision 1.00 Page 19 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Setting the SLG59H1126V’s Active Current Limit Note 3: Active Current Limit accuracy is ±15% over voltage range and over temperature range. Setting the SLG59H1126V’s Input Overvoltage Lockout Threshold As shown in the table below, SEL selects the VIN overvoltage threshold at which the SLG59H1126V’s internal state machine will turn OFF (open circuit) the power MOSFET if VIN exceeds the selected threshold. With an activated SLG59H1126V (ON=HIGH) and at any time VIN crosses the programmed VIN overvoltage threshold, the state machine opens the power switch and asserts the FAULT pin within TFAULTLOW. In applications with a deactivated or inactive SLG59H1126V (VIN > VIN(UVLO) and ON = LOW) and if the applied VIN is higher than the programmed VIN(OVLO) threshold, the SLG59H1126V’s state machine will keep the power switch open circuited if the ON pin is toggled LOW-to-HIGH. In these cases, the FAULT pin will also be asserted within TFAULTLOW and will remain asserted until VIN resumes nominal, steady-state operation. In all cases, the SLG59H1126V’s VIN undervoltage lockout threshold is fixed at VIN(UVLO). RSET (kΩ) Active Current Limit (A) 3 91 1 45 2 30 3 15 6 13.3 7 SEL VIN(OVLO) (Typ) 06 V 1 14.4 V

Revision 1.00 Page 20 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Power Dissipation The junction temperature of the SLG59H1126V depends on differen t factors such as board layout, ambient temperature, and other environmental factors. The primary contributor to the increase in the junction temperature of the SLG59H1126V is the power dissipation of its power MOSFET. Its power dissipation and the junction temperature in nominal operating mode can be calculated using the following equations: where: PD = Power dissipation, in Watts (W) RDSON = Power MOSFET ON resistance, in Ohms (Ω) IDS = Output current, in Amps (A) and where: TJ = Junction temperature, in Celsius degrees (°C) θJA = Package thermal resistance, in Celsius degrees per Watt (°C/W) TA = Ambient temperature, in Celsius degrees (°C) In current-limit mode, the SLG59H1126V’s power dissipation can be calculated by taking into account the voltage drop across the power switch (VIN-VOUT) and the magnitude of the output current in current-limit mode (IACL): where: PD = Power dissipation, in Watts (W) VIN = Input Voltage, in Volts (V) RLOAD = Load Resistance, in Ohms (Ω) IACL = Output limited current, in Amps (A) VOUT = RLOAD x IACL PD = RDSON x IDS TJ = PD x θJA + TA PD = (VIN-VOUT) x IACL or PD = (VIN – (RLOAD x IACL)) x IACL

  1. Since the VIN and VOUT pins dissipate most of the heat generated during high-load current operation, it is highly recommended
  2. To minimize the effects of parasitic trace inductance on normal operation, it is recommended to connect input CIN and output
  3. The GND pin should be connected to system analog or power ground plane.
  4. 2 oz. copper is recommended for high current operation.

А HFET1 Evaluation Board for SLG59H1126V is designed according to the statements above and is illustrated on Figure 10. Figure 10. SLG59H1126V Evaluation Board

Revision 1.00 Page 23 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Package Top Marking System Definition 1126V Part Code Pin 1 Identifier WWNNN Date Code + LOT Code ARR Assembly + Rev. Code 1126V - Part ID Field WW - Date Code Field1 NNN - Lot Traceability Code Field1 A - Assembly Site Code Field 2 RR - Part Revision Code Field2 Note 1: Each character in code field can be alphanumeric A-Z and 0-9 Note 2: Character in code field can be alphabetic A-Z

Revision 1.00 Page 24 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Package Drawing and Dimensions 18 Lead TQFN Package 1.6 x 3 mm (Fused Lead) JEDEC MO-220, Variation WCEE

Revision 1.00 Page 25 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY SLG59H1126V 18-pin STQFN PCB Landing Pattern Note: All dimensions shown in micrometers (m)

Revision 1.00 Page 26 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY Tape and Reel Specifications Carrier Tape Drawing and Dimensions Recommended Reflow Soldering Profile Please see IPC/JEDEC J-STD-020: latest revision for reflow prof ile based on package volume of 2.64 mm 3 (nominal). More information can be found at www.jedec.org. Package Type # of Pins Nominal Package Size [mm] Max Units Reel & Hub Size [mm] Leader (min) Trailer (min) Tape Width [mm] Part Pitch [mm]per Reel per Box Pockets Length [mm] Pockets Length [mm] STQFN 18L 1.6x3mm 0.4P FC Green 18 1.6 x 3 x 0.55 3,000 3,000 178 / 60 100 400 100 400 8 4 Package Type Pocket BTM Length Pocket BTM Width Pocket Depth Index Hole Pitch Pocket Pitch Index Hole Diameter Index Hole to Tape Edge Index Hole to Pocket Center Tape Width A0 B0 K0 P0 P1 D0 E F W STQFN 18L 1.6x3mm 0.4P FC Green Refer to EIA-481 specification

Revision 1.00 Page 27 of 27 © 2018 Dialog Semiconductor SLG59H1126V A 12 V, 18 mΩ, 6 A Integrated Power Switch with VIN Lockout Select and MOSFET Current Monitor Output PRELIMINARY

Revision History

12/19/2018 1.00 Production Release