SLA7042M ALLEGRO

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The SLA7042M and SLA7044M are designed for high-efficiency and high-performance microstepping operation of 2-phase, unipolar stepper motors. Microstepping provides improved resolution without limiting step rates, and provides much smoother low-speed motor operation. An automated, innovative packaging technology combined with power NMOS FETs and monolithic CMOS logic/control circuitry advances power multi-chip modules (PMCMs™) toward the complete integration of motion control. Each half of these stepper motor control- ler/drivers operate independently. The 4-bit shift registers are serially loaded with motor phase information and output current-ratio data (eight levels). The combination of user-selectable current-sensing resistor, linearly adjustable reference voltage, and digitally selected output current ratio provides users with a broad, variable range of of full, half, and microstepping motor control (IOUT ≈ [VREF/3 • RS] • Current Ratio). Each PMCM is rated for a maximum motor supply voltage of 46 V and utilizes advanced NMOS FETs for the high-current, high-voltage driver outputs. The avalanche-rated (≥100 V) FETs provide excellent ON resistance, improved body diodes, and very-fast switching. The multi-chip ratings and performance afford significant benefits and advantages for stepper drives when compared to the higher dissipation and slower switching speeds associated with bipolar transistors. Highly automated manufacturing techniques provide low-cost and exception- ally reliable PMCMs suitable for controlling and directly driving a broad range of 2-phase, unipolar stepper motors. The SLA7042M and SLA7044M are identical except for rDS(on) and output current ratings. Complete applications information is given on the following pages. PWM current is regulated by appropriately choosing current-sensing resistors, a voltage reference, and digitally programmable current ratio. Inputs are compatible with 5 V logic and microprocessors. BENEFITS AND FEATURES I Cost-Effective, Multi-Chip Solution I ‘Turn-Key’ Motion-Control Module I Motor Operation to 3 A and 46 V I 3rd Generation High-Voltage FETs I 100 V, Avalanche-Rated NMOS I Low rDS(on) NMOS Outputs I Advanced, Improved Body Diodes I Microstepping Unipolar Drive I High-Efficiency, High-Speed PWM MICROSTEPPING, UNIPOLAR PWM, HIGH-CURRENT MOTOR CONTROLLER/DRIVER Always order by complete part number: SLA7042M . Data Sheet 28202A* REF/ENABLEA VREF VCC Dwg. PK-008 OUTA OUTB SENSEA GROUNDA CNTRL SPLY A VREF VCC OUTA CONTROL/LOGIC OUT B GROUND B REF/ENABLE B CNTRL SPLY B SERIAL DATA A CLOCKA SERIAL DATA B CLOCK B SENSEB STROBEA STROBE B SR/LATCH ø D/A CONTROL/LOGIC ø SR/LATCH D/A ABSOLUTE MAXIMUM RATINGS at TA = +25°C Peak Output Current, Continuous Output Current, IOUT Input Voltage Range, Package Power Dissipation, PD . See Graph Operating Temperature Range, Storage Temperature Range, I Independent PWM Current Control (2-Phase) I Digitally Programmable PWM Current Control I Low Component-Count PWM Drive I Low Internal-Power Dissipation I Electrically Isolated Power Tab I Logic IC- and µP-Compatible Inputs I Machine-Insertable Package SLA7042M AND SLA7044M

MICROSTEPPING, UNIPOLAR PWM, HIGH-CURRENT MOTOR CONTROLLER/DRIVERS

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 FUNCTIONAL BLOCK DIAGRAM Note that channels A and B are electrically isolated. 100 125 150 TEMPERATURE in °C Dwg. GK-018-1 ALLOWABLE PACKAGE POWER DISSIPATION in WATTS R = 5.0°C/W θJM R = 28°C/W θJA ALLOWABLE PACKAGE POWER DISSIPATION PROGRAMMABLE PWM OFF TIMER NOISE FILTER D/A LATCHES SHIFT REG GROUND Dwg. FK-006 VDD SENSE CONTROL SUPPLY OUT A/B OUTA/B REF/ENABLE CHANNEL A PIN NUMBERS CHANNEL B PIN NUMBERS V – 1 DD PHASE STROBE DATA CLOCK ENABLE VREF Copyright © 1995, 1998 Allegro MicroSystems, Inc.

DC ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V unless otherwise noted. Limits Characteristic Symbol Test Conditions Min Typ Max Units FET Leakage Current IDSS VDS = 100 V 4.0 mA FET ON Voltage VDS(ON) SLA7042M, IOUT = 1.2 A 800 mV SLA7044M, IOUT = 3 A 855 mV FET ON Resistance rDS(on) SLA7042M, IOUT = 1.2 A 0.67 Ω SLA7044M, IOUT = 3 A 0.285 Ω Body Diode Forward Voltage VSD SLA7042M, IOUT = –1.2 A 1.2 V SLA7044M, IOUT = –3 A 1.6 V Control Supply Voltage VDD Operating 4.5 5.0 5.5 V Control Supply Current IDD Each controller, VDD = 5.5 V 7.0 mA Logic Input Voltage VIN(1) 3.5 V VIN(0) 1.5 V Logic Input Current IIN(1) VIN(1) = VDD 1.0 µA IIN(0) VIN(0) = 0 –1.0 µA REF/ENABLE Input Voltage VREF/EN DATA, CLOCK, STROBE, and OUT Enabled 0.4 2.5 V DATA, CLOCK, STROBE, and OUT Disabled VDD - 1 V REF/ENABLE Input Current IREF/EN

0 V ≤ VREF/EN ≤ 5 V

±1.0 µA Step Reference SRCR DATA Input = 000X Current Ratio DATA Input = 001X DATA Input = 010X DATA Input = 011X 55.5 First Bit Entered (X) = Phase DATA Input = 100X 71.4 Second Bit Entered = LSB DATA Input = 101X Last Bit Entered = MSB DATA Input = 110X DATA Input = 111X 100 NOTE: Negative current is defined as coming out of (sourcing) the specified device pin. TYPICAL AC CHARACTERISTICS at TA = +25°C, VDD = 5 V, IOUT = 1 A, Logic Levels are VDD and Ground PWM OFF Time Output RiseTime tr Output Fall Time tf Strobe-to-Output Switching Time tpd SLA7042M AND SLA7044M MICROSTEPPING, UNIPOLAR PWM, HIGH-CURRENT MOTOR CONTROLLER/DRIVERS

MICROSTEPPING, UNIPOLAR PWM, HIGH-CURRENT MOTOR CONTROLLER/DRIVERS Worcester, Massachusetts 01615-0036 (508) 853-5000 CLOCK DATA STROBE A B D F E C D A B C Dwg. WK-002 SERIAL PORT TIMING CONDITIONS (TA = +25°C, Logic Levels are VDD and Ground) APPLICATIONS INFORMATION The SLA7042M and SLA7044M modules integrate two CMOS controller ICs and four NMOS FETs. Each half of the device operates independently, although the CLOCK inputs may be connected together and the STROBE inputs may be connected together. Pulling VREF/EN low (<2.5 V) allows the 4- bit shift registers to be serially loaded with motor phase and output currrent ratioing data. The first bit selects the motor phase (logic high = Output A or B, logic low = Output A or B); the next three bits determine the motor current ratio (eight steps, 0% to 100%). The internal D/A converter, in conjunction with a current-sensing resistor and input reference voltage, completes the microstepping current control. Pulling VREF/EN high (within 1 V of VDD) resets the shift register and latches to turn the MOS drivers OFF and inhibits the serial DATA input.

FIGURE 3. ␣COMPLETE CONTROL FIGURE 4. ␣TIMING RELATIONSHIPS and the most-significant bit last. becomes active on a high-to-low transition at STROBE.

The serial DATA input port is enabled (active low) by the REFERENCE/ENABLE input when VREF/EN is between 0.4 V and 2.5 V. With VREF/EN greater than VDD - 1 V, the serial DATA input port is disabled, the outputs are OFF, and the controller/driver will not be affected by changes at the DATA, CLOCK, or STROBE inputs. With VREF/EN between 0.4 V and 2.5 V, the output current limit is a linear function of VREF and the step reference current ratio. IOUT ≈ VREF

  • SRCR 3 • RS In a typical (SLA7042M) application where VDD = 5 V, a VREF/EN between 0.4 V and 2.5 V, and a maximum allowable load current of 1.2 A, the maximum value of RS is 0.69 Ω and IOUTmin is 0.11 A when SRCR is 100% (DATA input = 111X). POWER DISSIPATION CALCULATIONS The SLA7042/44M normally do not require special heat sinking except under unusual circumstances (two phases operating near maximum output current and TA >65°C). However, as with all power drivers, the basic constituents of power dissipation should be evaluated. Conduction losses (internal power dissipation) include: (a) FET output power dissipation (IOUT 2 • rDS(on) or IOUT • VDS(ON)), (b) FET body diode power dissipation (VSD • IOUT), and (c) control circuit power dissipation (VDD • IDD). PACKAGE RATINGS/DERATING FACTORS Thermal calculations must also consider the tempera- ture effects on the output FET ON resistance. The appli- cable thermal ratings for the 18-lead power-tab SIP PMCM package are: RθJA = 28°C/W (junction to ambient with no heat sink) or 4.5 W at +25°C and a derating factor of -36 mW/°C for operation above +25°C. RθJM = 5°C/W (junction to mounting surface). TEMPERATURE EFFECTS ON FET rDS(on) Analyzing safe, reliable operation includes a concern for the relationship of NMOS ON resistance to junction temperature. Device package power calculations must include the increase in ON resistance (producing higher output ON voltages) caused by higher operating junction temperatures. Figure 5 provides a normalized ON resis- tance curve, and all thermal calculations should consider increases from the given +25°C limits, which may be caused by internal heating during normal operation. FIGURE 5.␣ NORMALIZED ON RESISTANCE vs TEMPERATURE 2.0 1.0 -40 +80 +160 0.5 JUNCTION TEMPERATURE in °C NORMALIZED FET ON RESISTANCE Dwg. GK-017 1.5 2.5 +40 +120 The power MOSFET outputs of these devices are similar to the International Rectifier type IRL510 (SLA7042M) and IRL520 (SLA7044M). These devices feature an excellent combination of fast switching, rugged- ized device design, low on-resistance, and cost effective- ness. SLA7042M AND SLA7044M MICROSTEPPING, UNIPOLAR PWM, HIGH-CURRENT MOTOR CONTROLLER/DRIVERS

MICROSTEPPING, UNIPOLAR PWM, HIGH-CURRENT MOTOR CONTROLLER/DRIVERS Worcester, Massachusetts 01615-0036 (508) 853-5000 Dwg. MK-002-18 mm 31±0.2 24.4 ±0.2 16.4 ±0.2 16 ±0.2 9.9 ±0.2 13 ±0.2 ø 3.2 ±0.15 1.68 ±0.4 6.7 ±0.5 3.0 4.0 ±0.7 2.45 ±0.2 4.8 ±0.2 1.7 ±0.1 3.2 ±0.15 x 3.8 31.3 ±0.2 0.65 +0.2 –0.1 0.55 +0.2 –0.1 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Recommended mounting hardware torque: 4.34 – 5.79 lbf•ft (6 – 8 kgf•cm or 0.588 – 0.784 Nm). 3. The shaded area is exposed (electrically isolated) heat spreader. 4. Recommend use of metal-oxide-filled, alkyl-degenerated oil base, silicone grease (Dow Corning 340 or equivalent). Dwg. MK-002-18 in 1.22 ±0.008 0.961 ±0.008 0.646 ±0.008 0.630 ±0.008 0.512 ±0.008 ø 0.126 ±0.006 0.066 ±0.016 0.264 ±0.020 0.118 0.157 ±0.028 0.096 ±0.008 0.189 ±0.008 0.067 ±0.004 0.126 ±0.006 x 0.150 1.232 ±0.008 0.026 +0.008 –0.004 0.022 +0.008 –0.004 0.390 ±0.008 Dimensions in Inches (for reference only) Dimensions in Millimeters (controlling dimensions) The products described here are manufactured in Japan by Sanken Electric Co., Ltd. for sale by Allegro MicroSystems, Inc. Sanken Electric Co., Ltd. and Allegro MicroSystems, Inc. reserve the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of their products. The information included herein is believed to be accurate and reliable. However, Sanken Electric Co., Ltd. and Allegro MicroSystems, Inc. assume no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.