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SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch w/Pre-Emphasis & IEEE 1149.6 datasheet (Rev. M)

Document overview

Manufacturer or author: Texas Instruments, Incorporated [SNLS168,M]
PDF pages: 21

Technical content

2:1 Mux2 2:1 Mux1 Channel 1 Pre-emphasis IN1- IN1+ IN0- IN0+ Channel 0 Pre-emphasis PEM00 PEM01 PEM10 PEM11 EN1 Control Logic SCAN90CP02 www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013 SCAN90CP021.5Gbps2x2LVDSCrosspointSwitchwithPre-EmphasisandIEEE1149.6 Check forSamples: SCAN90CP02 1FEATURES DESCRIPTION The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS 2• 1.5Gbps per Channel crosspointswitch.High speed data paths and flow-• Low Power: 70 mA inDual RepeaterMode throughpinoutminimizeinternaldevicejitter,while@1.5 Gbps configurable0/25/50/100%pre-emphasisovercomes

Low Output Jitter externalISI jittereffectsof lossybackplanesand cables.The differentialinputsinterfacetoLVDS and• Configurable0/25/50/100%Pre-Emphasis Bus LVDS signalssuch as thoseon TI's10-,16-,andDrivesLossy Backplanes and Cables 18- bitBus LVDS SerDes, as well as CML and• Non-BlockingArchitectureAllows 1:2Splitter, LVPECL. The SCAN90CP02 can alsobe used with 2:1Mux, Crossover,and Dual Buffer ASICs and FPGAs. The non-blockingcrosspoint Configurations architectureispin-configurableas a 1:2clockordata splitter,2:1 redundancy mux, crossoverfunction,or• Flow-Through Pinout dual buffer for signal booster and stub hider• LVDS/BLVDS/CML/LVPECL Inputs,LVDS applications.Outputs
SeparateControlofInputsand Outputs Allows interconnect.The 3.3V supply,CMOS process,and LVDS I/Oensurehighperformanceatlow power overforPower Savings theentireindustrial-40to+85°C temperaturerange.• Industrial-40to+85°C Temperature Range
28-Lead UQFN Package, or 32-Lead LQFP Package Block Diagram Figure1. SCAN90CP02 Block Diagram Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2004–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNLS168M –JANUARY 2004–REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS UQFN LQFPPin Pin Pin I/O,Type DescriptionName Number Number DIFFERENTIAL INPUTS COMMON TO ALL MUXES IN0+ 9 9 I,LVDS Invertingand non-invertingdifferentialinputs.LVDS, Bus LVDS, CML, orLVPECL IN0− 10 10 compatible. IN1+ 12 13 I,LVDS Invertingand non-invertingdifferentialinputs.LVDS, Bus LVDS, CML, orLVPECL IN1− 13 14 compatible. SWITCHED DIFFERENTIAL OUTPUTS OUT0+ 27 32 O, LVDS Invertingand non-invertingdifferentialoutputs.OUT0 ± can be connectedtoany one OUT0 − 26 31 pairIN0±,orIN1±.LVDS compatible(1). OUT1+ 24 28 O, LVDS Invertingand non-invertingdifferentialoutputs.OUT1 ± can be connectedtoany one OUT1 − 23 27 pairIN0±,orIN1±.LVDS compatible(1). DIGITAL CONTROL INTERFACE SEL0, 6 7 I,LVTTL SelectControlInputs SEL1 5 6 EN0, EN1 7 8 I,LVTTL OutputEnableInputs 15 17 PEM00, 4 4 I,LVTTL Channel0 OutputPre-emphasisControlInputs PEM01 3 3 PEM10, 2 2 I,LVTTL Channel1 OutputPre-emphasisControlInputs PEM11 1 1 TDI 19 22 I,LVTTL TestData InputtosupportIEEE 1149.1features TDO 20 23 O, LVTTL TestData OutputtosupportIEEE 1149.1features TMS 18 21 I,LVTTL TestMode SelecttosupportIEEE 1149.1features TCK 17 19 I,LVTTL TestClocktosupportIEEE 1149.1features TRST 21 24 I,LVTTL TestResettosupportIEEE 1149.1features N/C 8,28 Not Connected POWER VDD 11,14, 12,16, I,Power VDD = 3.3V±0.3V.Atleast4 lowESR 0.01µF bypasscapacitorsshouldbe 16,22, 18,25, connectedfromVDD toGND plane. 25 29 GND See (2) 5,11,15, Ground referencetoLVDS and CMOS circuitry. 20,26, FortheUQFN package,theDAP isused as theprimaryGND connectiontothe 30 device.The DAP istheexposed metalcontactatthebottomoftheUQFN-28 package.Itshouldbe connectedtothegroundplanewithatleast4 viasforoptimal AC and thermalperformance. (1) The LVDS outputsdo notsupporta multidrop(BLVDS) environment.The LVDS outputcharacteristicsoftheSCAN90CP02 devicehave been optimizedforpoint-to-pointbackplaneand cableapplications. (2) Note thatfortheUQFN package GND isnotan actualpinon thepackage,theGND isconnectedthrutheDAP on theback sideofthe UQFN package.

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(GND) 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 OUT0+ OUT0- GND VDDA OUT1+ OUT1- GND VDD2 PEM11 PEM10 PEM01 PEM00 GND SEL1 SEL0 EN0 IN0+ IN0- GND VDDA IN1+ IN1- GND VDD2 TRST TDO TDI TMS GND TCK VDD1 EN1 SCAN90CP02 www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013 Connection Diagrams Figure2.UQFN Top View Figure3.LQFP Top View DAP = GND CONFIGURATION SELECT TRUTH TABLE (1) SEL0 SEL1 EN0 EN1 OUT0 OUT1 Mode 0 0 0 0 IN0 IN0 1:2Splitter(IN1powered down) 0 1 0 0 IN0 IN1 DualChannelRepeater 1 0 0 0 IN1 IN0 DualChannelSwitch 1 1 0 0 IN1 IN1 1:2Splitter(IN0powered down) 0 1 0 1 IN0 PD SingleChannelRepeater(Channel1 powered down) 1 1 0 1 IN1 PD SingleChannelSwitch(IN0and OUT1 powered down) 0 0 1 0 PD IN0 SingleChannelSwitch(IN1and OUT0 powered down) 0 1 1 0 PD IN1 SingleChannelRepeater(Channel0 powered down) X X 1 1 PD PD BothChannelsinPower Down Mode 0 0 0 1 InvalidState(2) 1 0 0 1 InvalidState(2) 1 0 1 0 InvalidState(2) 1 1 1 0 InvalidState(2) (1) PD = Power Down mode tominimizepower consumption X = Don 'tCare (2) Enteringthesestatesisnotforbidden,however deviceoperationisnotdefinedinthesestates. PRE-EMPHASIS The pre-emphasisisused tocompensate forlongor lossytransmissionmedia.Separatepinsare providedfor each outputto minimizepower consumption.Pre-emphasisisprogrammable to be offor to presetvaluesper Table1. Output Characteristics The outputcharacteristicsof the SCAN90CP02 devicehave been optimizedforpoint-to-pointbackplaneand cableapplications. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SCAN90CP02

(SEL0=0, SEL1=1, EN0=1, EN1=0) OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ Single Channel Crossover Switch (SEL0=1, SEL1=1, EN0=0, EN1=1) Single Channel Repeater (SEL0=0, SEL1=1, EN0=0, EN1=1) OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ Single Channel Crossover Switch (SEL0=0, SEL1=0, EN0=1, EN1=0) 1:2 Splitter (SEL0=1, SEL1=1, EN0=0, EN1=0) Dual Channel Switch (SEL0=1, SEL1=0, EN0=0, EN1=0) OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ Dual Channel Repeater (SEL0=0, SEL1=1, EN0=0, EN1=0) 1:2 Splitter (SEL0=0, SEL1=0, EN0=0, EN1=0) OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ OUT0+ OUT0- OUT1+ OUT1- IN0- IN0+ IN1- IN1+ SCAN90CP02 SNLS168M –JANUARY 2004–REVISED APRIL 2013 www.ti.com Table1.Pre-emphasis ControlSelectionTable Channel 0 Channel 1 Pre-emphasis PEM01 PEM00 PEM11 PEM10 0 0 0 0 0% 0 1 0 1 25% 1 0 1 0 50% 1 1 1 1 100% ApplicationsInformation Figure4. SCAN90CP02 ConfigurationSelectDecode

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www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013 These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. ABSOLUTE MAXIMUM RATINGS (1)(2) SupplyVoltage(VDD ) −0.3Vto+4.0V CMOS InputVoltage −0.3Vto(VDD +0.3V) LVDS ReceiverInputVoltage −0.3Vto+3.6V LVDS DriverOutputVoltage −0.3Vto+3.6V LVDS OutputShortCircuitCurrent 40mA JunctionTemperature +150°C StorageTemperature −65°C to+150°C Lead Temperature(Soldering,4sec.) +260°C Maximum Package Power Dissipationat25°C UQFN-28 4.31W LQFP-32 1.47W Deratingabove 25°C UQFN-28 34.5mW/ °C LQFP-32 11.8mW/ °C ThermalResistance,θJA UQFN-28 29°C/W LQFP-32 85°C/W ESD Rating HBM, 1.5kΩ,100 pF 6.5kV EIAJ,0Ω,200 pF >250V (1) “AbsoluteMaximum Ratings”aretheratingsbeyond whichthesafetyofthedevicecannotbe specified.They arenotmeant toimplythat thedeviceshouldbe operatedattheselimits. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. RECOMMENDED OPERATING CONDITIONS Min Typ Max Unit SupplyVoltage(VDD – GND) 3.0 3.3 3.6 V ReceiverInputVoltage 0 3.6 V OperatingFreeAirTemperature −40 25 85 °C JunctionTemperature 150 °C

ELECTRICAL CHARACTERISTICS

Over recommended operatingsupplyand temperaturerangesunlessotherspecified. Symbol Parameter Conditions Min Typ (1) Max Units LVTTL DC SPECIFICATIONS (SEL0,SEL1, EN1, EN2, PEM00, PEM01, PEM10, PEM11, TDI,TCK, TMS, TRST) VIH HighLevelInputVoltage 2.0 VDD V VIL Low LevelInputVoltage GND 0.8 V IIH HighLevelInputCurrent VIN = VDD = VDDMAX −10 +10 µA IIL Low LevelInputCurrent VIN = VSS ,VDD = VDDMAX −10 +10 µA IILR Low LevelInputCurrent TDI,TMS, TRST -40 -200 µA C IN1 InputCapacitance Any DigitalInputPintoVSS 3.5 pF C OUT1 OutputCapacitance Any DigitalOutputPintoVSS 5.5 pF VCL InputClamp Voltage ICL = −18 mA −1.5 −0.8 V VOH HighLevelOutputVoltage IOH = −12 mA, VDD = 3.0V 2.4 V (TDO) IOH = −100 µA,VDD = 3.0V VDD -0.2 V VOL Low LevelOutputVoltage IOL = 12 mA, VDD = 3.0V 0.5 V (TDO) IOL = 100 µA,VDD = 3.0V 0.2 V IOS OutputShortCircuitCurrent TDO -15 -125 mA (1) Typicalparametersaremeasured atVDD = 3.3V,TA = 25°C. They areforreferencepurposes,and arenotproduction-tested. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SCAN90CP02

SNLS168M –JANUARY 2004–REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Over recommended operatingsupplyand temperaturerangesunlessotherspecified. Symbol Parameter Conditions Min Typ (1) Max Units LVDS INPUT DC SPECIFICATIONS (IN0±,IN1±) VTH DifferentialInputHighThreshold(2) VCM = 0.8Vor1.2Vor3.55V,VDD = 3.6V 0 100 mV VTL DifferentialInputLow Threshold VCM = 0.8Vor1.2Vor3.55V,VDD = 3.6V −100 0 mV VID DifferentialInputVoltage VCM = 0.8Vto3.55V,VDD = 3.6V 100 mV VCMR Common Mode VoltageRange VID = 150 mV, VDD = 3.6V 0.05 3.55 V C IN2 InputCapacitance IN+ orIN− toVSS 3.5 pF IIN InputCurrent VIN = 3.6V,VDD = VDDMAX or0V −10 +10 µA VIN = 0V,VDD = VDDMAX or0V −10 +10 µA LVDS OUTPUT DC SPECIFICATIONS (OUT0 ±,OUT1 ±) VOD DifferentialOutputVoltage, R L = 100Ω between OUT+ and OUT − 250 400 575 mV0% Pre-emphasis(2) ΔVOD Change inVOD between −35 35 mVComplementaryStates VOS OffsetVoltage(3) 1.09 1.25 1.475 V ΔVOS Change inVOS between −35 35 mVComplementaryStates IOS OutputShortCircuitCurrent,One OUT+ orOUT − ShorttoGND −60 -90 mAComplementaryOutput C OUT2 OutputCapacitance OUT+ orOUT − toGND when TRI- 5.5 pFSTATE SUPPLY CURRENT (Static) ICC0 SupplyCurrent Allinputsand outputsenabledand active,terminatedwithdifferentialloadof 42 60 mA 100Ω between OUT+ and OUT-. ICC1 SupplyCurrent-one channel Singlechannelcrossoverswitchorsingle 22 30 mA powered down channelrepeatermodes (1channel active,one channelinpower down mode) ICC2 SupplyCurrent-one inputpowered Splittermode (One inputpowered down, 30 40 mA down bothoutputsactive) ICCZ TRI-STATE SupplyCurrent Bothinput/outputChannelsinPower 1.4 2.5 mADown Mode SWITCHING CHARACTERISTICS — LVDS OUTPUTS (Figure5,Figure6) tLHT DifferentialLow toHighTransition Use an alternating1 and 0 patternat200 70 150 215 psTime Mb/s,measure between 20% and 80% of VOD .tHLT DifferentialHightoLow Transition 50 135 180 psTime tPLHD DifferentialLow toHighPropagation Use an alternating1 and 0 patternat200 0.5 2.4 3.5 nsDelay Mb/s,measure at50% VOD between inputtooutput.tPHLD DifferentialHightoLow Propagation 0.5 2.4 3.5 nsDelay tSKD1 PulseSkew |tPLHD –tPHLD | 55 120 ps tSKCC OutputChanneltoChannelSkew Differenceinpropagationdelay(tPLHD or tPHLD )among alloutputchannelsin 0 130 315 psSplittermode (anyone inputtoall outputs). (2) DifferentialoutputvoltageVOD isdefinedas ABS(OUT+ –OUT −).DifferentialinputvoltageVID isdefinedas ABS(IN+–IN−). (3) OutputoffsetvoltageVOS isdefinedas theaverageoftheLVDS single-endedoutputvoltagesatlogichighand logiclowstates.

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VOS=1.2V typical VID IN- IN+ SCAN90CP02 www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS (continued) Over recommended operatingsupplyand temperaturerangesunlessotherspecified. Symbol Parameter Conditions Min Typ (1) Max Units tJIT Jitter(0% Pre-emphasis)(4) RJ -Alternating1/0@ 750 MHz (5) 1.4 2.5 psrms DJ -K28.5Pattern LQFP 110 140 psp-p 1.5Gbps (6) UQFN 42 75 psp-p TJ -PRBS 223-1Pattern LQFP 113 148 psp-p 1.5Gbps (7) UQFN 93 126 psp-p tON LVDS OutputEnableTime Time fromENx toOUT ± change from 50 110 150 nsTRI-STATE toactive. tOFF LVDS OutputDisableTime Time fromENx toOUT ± change from 5 12 nsactivetoTRI-STATE. tSW LVDS SwitchingTime Time fromconfigurationselect(SELx)to SELx toOUT ± new switchconfigurationeffectivefor 110 150 ns OUT ±. (4) Jitterisnotproductiontested,butspecifiedthroughcharacterizationon a sample basis. (5) Random Jitter,orRJ,ismeasured RMS witha histogramincluding1500 histogramwindow hits.The inputvoltage= VID = 500mV, 50% dutycycleat750MHz, tr = tf= 50ps (20% to80%). (6) DeterministicJitter,orDJ,ismeasured toa histogrammean witha sample sizeof350 hits.The inputvoltage= VID = 500mV, K28.5 patternat1.5Gbps, tr = tf= 50ps (20% to80%).The K28.5patternisrepeatingbitstreamsof(00111110101100000101). (7) TotalJitter,orTJ,ismeasured peak topeak witha histogramincluding3500 window hits.Stimulusand fixturejitterhas been subtracted.The inputvoltage= VID = 500mV, 223-1PRBS patternat1.5Gbps, tr = tf= 50ps (20% to80%). SCAN CIRCUITRY TIMING REQUIREMENTS Symbol Parameter Conditions Min Typ Max Units fMAX Maximum TCK ClockFrequency R L = 500Ω, 25.0 MHz C L = 35 pFtS TDI toTCK, H orL 1.0 ns tH TDI toTCK, H orL 2.0 ns tS TMS toTCK, H orL 2.0 ns tH TMS toTCK, H orL 1.5 ns tW TCK PulseWidth,H orL 10.0 ns tW TRST PulseWidth,L 2.5 ns tREC RecoveryTime,TRST toTCK 2.0 ns TIMING DIAGRAMS Figure5. LVDS Signals Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SCAN90CP02

1.2V OUT± 1.2V 50% 50% 50% 50%OUT+ OUT- tSW tSW tON Load Configuration "A" Load Configuration "B" Configuration "A" Configuration "B" (IN+ - IN-) (OUT+ - OUT-) 0.0V 0.0V tPLHD tPHLD 80% 20% 80% 20% tLHT tHLT VOD OUT- OUT+ (OUT+ - OUT-) SCAN90CP02 SNLS168M –JANUARY 2004–REVISED APRIL 2013 www.ti.com Figure6. LVDS Output TransitionTime Figure7. LVDS Output PropagationDelay Figure8. Configurationand Output Enable/DisableTiming

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150-250: 100: Differential T-Line LVDS Receiver IN+ IN- 100: LVPECL Driver 150-250: OUT+ OUT- 50:50: VCC CML3.3V or CML2.5V Driver 100: Differential T-Line SCAN90CP02 Receiver IN+ IN- 100: OUT+ OUT- SCAN90CP02 Receiver IN+ IN- 100: Differential T-Line 100: LVDS Driver SCAN90CP02 www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013 InputInterfacing The SCAN90CP02 acceptsdifferentialsignalsand allowsimpleAC orDC coupling.Witha wide common mode range,the SCAN90CP02 can be DC-coupled withallcommon differentialdrivers(i.e.LVPECL, LVDS, CML). The followingthreefiguresillustratetypicalDC-coupledinterfacetocommon differentialdrivers. Figure9. TypicalLVDS DriverDC-Coupled InterfacetoSCAN90CP02 Input Figure10. TypicalCML DriverDC-Coupled InterfacetoSCAN90CP02 Input Figure11. TypicalLVPECL DriverDC-Coupled InterfacetoSCAN90CP02 Input Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SCAN90CP02

100: 100: Differential T-Line Differential Receiver SCAN90CP02 Receiver SCAN90CP02 SNLS168M –JANUARY 2004–REVISED APRIL 2013 www.ti.com Output Interfacing The SCAN90CP02 outputssignalsthatarecomplianttotheLVDS standard.Theiroutputscan be DC-coupledto most common differentialreceivers.Figure12 illustratestypicalDC-coupled interfaceto common differential receiversand assumes thatthereceivershave highimpedance inputs.Whilemost differentialreceivershave a common mode inputrange thatcan accommodate LVDS compliantsignals,itis recommended to check respectivereceiver'sdatasheetpriortoimplementingthesuggestedinterfaceimplementation. Figure12. TypicalSCAN90CP02 Output DC-Coupled Interfacetoan LVDS, CML or LVPECL Receiver

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TOTAL JITTER (ps) 120 TEMPERATURE (° C) -40 -20 0 20 40 60 105 110 100 115 100 mV/Div 200 ps/Div 100% 50% 25% POWER SUPPLY CURRENT (mA) 100 BIT DATA RATE (Gbps) 100% Pre-emphasis 50% 25% TOTAL JITTER (ps) 120 BIT DATA RATE (Gbps) 100 VCM = 0.5V VCM = 1.2V VCM = 3.1V VCM = 2.4V SCAN90CP02 www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS FOR UQFN PACKAGE Power Supply Currentvs.BitData Rate TotalJitter(TJ)vs.BitData Rate Dynamic power supplycurrentwas measured whilerunninga PRBS TotalJittermeasured at0V differentialwhilerunninga PRBS 223-1 223-1patternindualchannelrepeatermode. VCC = 3.3V,TA = +25°C, patterninsinglechannelrepeatermode. VCC = 3.3V,TA = +25°C, VID VID = 0.5V,VCM = 1.2V = 0.5V,0% Pre-emphasis Figure13. Figure14. TotalJitter(TJ)vs.Temperature PositiveEdge Transitionvs.Pre-emphasis Level TotalJittermeasured at0V differentialwhilerunninga PRBS 223-1 patternindualchannelrepeatermode. VCC = 3.3V,VID = 0.5V,VCM = 1.2V,1.5Gbps datarate,0% Pre-emphasis Figure15. Figure16. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SCAN90CP02

SNLS168M –JANUARY 2004–REVISED APRIL 2013 www.ti.com DESIGN-FOR-TEST (DFT)FEATURES IEEE 1149.1SUPPORT The SCAN90CP02 supportsa fullycompliantIEEE 1149.1 interface.The Test Access Port(TAP) provides access to boundary scan cellsat each LVTTL I/Oon the deviceforinterconnecttesting.Differentialpinsare includedinthe same boundary scan chainbut insteadcontainIEEE1149.6 cells.IEEE1149.6 isthe improved IEEE standardfortestinghigh-speeddifferentialsignals. RefertotheBSDL filelocatedon TI'swebsiteforthedetailsoftheSCAN90CP02 IEEE 1149.1implementation. IEEE 1149.6SUPPORT AC-coupled differentialinterconnectionson very high speed (1+ Gbps) data paths are not testableusing traditionalIEEE 1149.1 techniques.The IEEE 1149.1 structuresand methods are intendedto teststatic(DC- coupled),singleended networks.IEEE1149.6isspecificallydesignedfortestinghigh-speeddifferential,including AC couplednetworks. The SCAN90CP02 is intendedforhigh-speedsignalingup to 1.5 Gbps and includesIEEE1149.6 on all differentialinputsand outputs. FAULT INSERTION FaultInsertionisa techniqueused toassistintheverificationand debug ofdiagnosticsoftware.Duringsystem testingfaultsare "injected"tosimulatehardwarefailureand thushelpverifythemonitoringsoftwarecan detect and diagnose these faults.In the SCAN90004 an IEEE1149.1 "stuck-at"instructioncan createa stuck-at condition,eitherhighorlow,on any pinorcombinationofpins. A more detaileddescriptionof the stuck-atfeaturecan be found inTexas InstrumentsApplicationsnote AN- 1313(SNLA060 ).

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www.ti.com SNLS168M –JANUARY 2004–REVISED APRIL 2013

REVISION HISTORY

www.ti.com 11-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) SCAN90CP02SP/NOPB Active Production UQFN (NJD) | 28 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 SCP02SP SCAN90CP02SP/NOPB.A Active Production UQFN (NJD) | 28 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 SCP02SP SCAN90CP02VY/NOPB Active Production LQFP (NEY) | 32 250 | JEDEC TRAY (10+1) Yes SN Level-3-260C-168 HR -40 to 85 SCAN90 CP02VY SCAN90CP02VY/NOPB.A Active Production LQFP (NEY) | 32 250 | JEDEC TRAY (10+1) Yes SN Level-3-260C-168 HR -40 to 85 SCAN90 CP02VY (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SCAN90CP02SP/NOPB UQFN NJD 28 1000 208.0 191.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 32X 0.38 0.28 28X 0.8 PIN 1 ID 0.09-0.20 TYP 0.15 0.05 0 -7 4X 5.6 9.4

8.6 TYP

B7.1 6.9 A 7.1 6.9 0.75 0.45 0.25 GAGE PLANE

1.6 MAX

(1.4) 4219901/B 05/2026 LQFP - 1.6 mm max heightNEY0032A PLASTIC QUAD FLATPACK NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration MS-026. 2532

0.2 C A B

OPTIONAL: SHARP CORNERS EXCEPT PIN 1 ID CORNER SEE DETAIL A SEATING PLANE DETAIL A SCALE: 12 0.1 DETAIL A TYPICAL SCALE 1.800

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

32X (1.6) 32X (0.45) (8.5) (8.5) 28X (0.8) (R0.05) TYP 4219901/B 05/2026 LQFP - 1.6 mm max heightNEY0032A PLASTIC QUAD FLATPACK NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE SCALE:8X SYMM SYMM 32 25 9 16 METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS METAL UNDER SOLDER MASK SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 32X (1.6) 32X (0.45) 28X (0.8) (8.5) (8.5) (R0.05) TYP 4219901/B 05/2026 LQFP - 1.6 mm max heightNEY0032A PLASTIC QUAD FLATPACK NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SYMM SYMM 32 25 9 16 SOLDER PASTE EXAMPLE SCALE 8X

www.ti.com SPA28A (Rev A)

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Selected Specification

Texas Instruments SCAN90CP02 overview.

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Summary

1.5 Gbps 2x2 LVDS Crosspoint Switch with Pre-Emphasis and IEEE 1149.6

Description

1.5 Gbps 2x2 LVDS Crosspoint Switch with Pre-Emphasis and IEEE 1149.6

Source title SCAN90CP02_14 Datasheet(PDF) - Texas Instruments

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