SC9200 ETC
Document overview
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Technical content
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 DTMF GENERATORS
DESCRIPTION
The SC9200A/B tone generators are designed formC interfaces. They can be instructed by amC to generate 16 dual tones and 8 single tones from the DTMF pin. The SC9200A provides a serial mode whereas the SC9200B contains a selectable serial/parallel mode interface for various applications such as security systems, home automation, remote control through telephone lines communication system, etc.
FEATURES
- Operating voltage: 2.0V~5.5V * Serial mode for the SC9200A * Serial/parallel mode for the SC9200B * Low standby current * Low total harmonic distortion * 3.58MHz crystal or ceramic resonator DIP-8 SELECTION TABLE Function Part No. Operating Voltage OSC Frequency Interface Package SC9200A 2V-5.5V 3.58MHz Serial 8 DIP/SOP SC9200B 2V-5.5V 3.58MHz Serial/Parallel 14 DIP/SOP PIN CONFIGURATIONS VDD DTMF DATA CLKVSS CE SC9200A 7 8 VDD DTMF DATA CLKV SS CE SC9200B NC S/P
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 BLOCK DIAGRAM 3.58MHz Crystal/Resonator Oscillator DTMF Serial Data Input Circuit Control Circuit DTMF Generator CLK DATA CE Parallel Data Input Circuit D3 D2 D1 D0 ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Value Unit Supply Voltage V SS -0.3~6 V Input Voltage V IN VSS -0.3~VDD +0.3 V Storage Temperature T STG -50~125 °C Operating Temperature T OPR -20~75 °C
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3
ELECTRICAL CHARACTERISTICS
Serial 1.8 Operating Voltage V DD -- Parallel 2.0 -- 5.5 V 2.5V -- 240 2500 Operating Current I DD 5.0V /PS =VDD , D0~D3=V SS , CE =VSS , No load -- 950 3000 mA Low Input Voltage V IL -- -- V SS -- 0.2V DD V High Input Voltage V IH -- -- 0.8V DD -- V DD V 2.5V -- -- 1 Standby Current I STB 5.0V /PS , CE =VDD , No load -- -- 2 mA 2.5V 120 180 270 Pull-high Resistance R P 5.0V VOL =0V 45 68 100 kW DTMF Output Delay Time (Parallel Mode) tDE 5V -- -- t UP +6 t UP +8 ms DTMF Output DC Level V TDC 2V~5.5V DTMF Output 0.45V DD -- 0.75V DD V DTMF Sink Current I TOL 2.5V V DTMF =0.5V -0.1 -- -- mA DTMF Output AC Level V TAC 2.5V Row group, RL=5kW 0.12 0.15 0.18 Vrms Column Pre-emphasis A CR 2.5V Row group=0dB 1 2 3 dB DTMF Output Load R L 2.5V tHD £-23dB 5- -- - kW Tone Signal Distortion t HD 2.5V R L=5kW -- -30 -23 dB Clock Input Rate (Serial Mode) fCLK -- -- -- 100 500 kHz Oscillator Starting Time (When CE is low) tUP 5.0V T h et i m ef r o mCE falling edge to normal oscillator operation -- -- 10 ms System Frequency f OSC -- Crystal=3.5795MHz 3.5759 3.5759 3.5831 MHz
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 PIN DESCRIPTIONS Pin NO. Pin Name I/O Internal Connection Description
1 CE I CMOS IN Pull-high Chip enable, active low
The system oscillator consists of an inverter, a bias resistor, and the required load capacitor on chip. The oscillator function can be implemented by Connect a standard 3.579545MHz crystal to the X1 and X2 terminals. 4V SS -- -- Negative power supply. 5 NC -- -- No connection. 6~9 D0~D
3 I CMOS IN Pull-high
Data inputs for the parallel mode. When the IC is operating in the serial mode, the data input terminals (D0~D3) are included with a pull-high resistor. When the IC is operating in the parallel mode, these pins become floating. 10 /PS IC M O S I N Operation mode selection input /PS =”H”: Parallel mode /PS =”L”: Serial mode
11 CLK I CMOS IN Pull-high
Data synchronous clock input for the serial mode. When the IC is operating in the parallel mode, the input terminal (CLK) is included with a pull-high resistor. When the IC is operating in the serial mode, this pin becomes floating.
12 DATA I CMOS IN Pull-high
Data input terminal for the serial mode. When the IC is operating in the parallel mode, the input terminal (DATA) is included with a pull-high resistor. When the IC is operating in the serial mode, this pin becomes floating.
13 DTMF O CMOS OUT Output terminal of the DTMF signal
14 V DD -- -- Positive power supply, 2.0V~5.5V for normal operation /G3 /G3 /G3 /G3 /G3 /G3 /G3 /G3 /G3
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 FUNCTIONAL DESCRIPTION The SC9200A/B are DTMF generators formC interfaces. They are controlled by amC in the serial mode. 1. Serial mode (SC9200A/B) The SC9200A/B employ a data input, a 5-bit code, and a synchronous clock to transmit a DTMF signal. Every digital of a phone number to be transmitted is selected by a series of inputs that consist of 5-bit data. Of the 5 bits, the D0 (LSB) is the first received bit. The SC9200A/B will latch data on the falling edge of the clock (CLK pin). The relationship between the digital codes and the tone output frequency is shown in Table 1 as for the control timing diagram, refer to Figure 1. Table 1: Digits vs. input data vs. tone output frequency (serial mode) Digit D4 D3 D2 D1 D0 Tone Output Frequency (Hz) 1 0 0 0 0 1 697+1209 2 0 0 0 1 0 697+1336 3 0 0 0 1 1 697+1477 4 0 0 1 0 0 770+1209 5 0 0 1 0 1 770+1336 6 0 0 1 1 0 770+1477 7 0 0 1 1 1 852+1209 8 0 1 0 0 0 852+1336 9 0 1 0 0 1 852+1477 0 0 1 0 1 0 941+1336 * 0 1 0 1 1 941+1209 # 0 1 1 0 0 941+1477 A 0 1 1 0 1 697+1633 B 0 1 1 1 0 770+1633 C 0 1 1 1 1 852+1633 D 0 0 0 0 0 941+1633 - - 10000 6 9 7 - - 10001 7 7 0 - - 10010 8 5 2 - - 10011 9 4 1 -- 1 0 1 0 0 1209 -- 1 0 1 0 1 1336 -- 1 0 1 1 0 1477 -- 1 0 1 1 1 1633 D T M F O F F 11111 - - *Notes: The codes not listed in Table 1 are not used D4 is MSB.
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 Digit 1 DTMF signal 1 1 1 1 1 Digit2 DTMF signal LSB MSB LSB MSB MSBLSB Digit 1 Digit 2 Stop code tUP (Oscillator) CLK DATA CE DTMF S/P Figure 1 2. Parallel mode (SC9200B) The SC9200B provides four data inputs D0~D3 to generate their corresponding DTMF signals. The/PS has to be connected high to select the parallel operation mode. Then the input data codes should be determined. Finally, theCE is connected low to transmit the DTMF signal from the DTMF pin. The TDE time (about 6ms) will be delayed from theCE falling edge to the DTMF signal output. The relationship between the digital codes and the tone output frequency is illustrated in Table 2. As for the control timing diagram, see figure 2. When the system is operating in the parallel mode, D0~D3 are all in the floating state. Thus, these data input pins should not float.
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 Table 2: Digits vs. input data vs. tone output frequency (parallel mode) Digit D3 D2 D1 D0 Tone Output Frequency 1 0001 697+1209 2 0010 697+1336 3 0011 697+1477 4 0100 770+1209 5 0101 770+1336 6 0110 770+1477 7 0111 852+1209 8 1000 852+1336 9 1001 852+1477 0 1010 941+1336 * 1011 941+1209 # 1100 941+1477 A 1101 697+1633 B 1110 770+1633 C 1111 852+1633 D 0000 941+1633 tDE (Oscillator) D0~D3 CE DTMF S/P tDE Figure 2 *Note: The data (D0~D3) should be ready before the CEbecomes low.
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 Tone frequency Output Frequency (Hz) Specified Actual %Error 697 699 +0.29% 770 766 -0.52% 852 847 -0.59% 941 948 +0.74% 1209 1215 +0.50% 1336 1332 -0.30% 1477 1472 -0.34% % Error does not contain the crystal frequency drift APPLICATION CIRCUIT Serial mode VDD DTMF DATA CLK VSS SC9200 VDD 20pF20pF VSS VDD CECE CLK DATA 3.579545MHz /GadC Tone output VDD Serial/parallel mode VDD DTMF DATA CLK VSS SC9200A/B VDD 20pF20pF VSS VDD CECE 3.579545MHz /GadC Tone output VDD CLK DATA S/P 7D 1 NC S/P
Semiconductors/G3 SC9200A/B /G3 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD /G3 Rev: 1.0 2001.02.02 /G3 PACKAGE OUTLINE DIP-8-300-2.54 UNIT: mm 6.40 2.54 1.25 9.20 3.40 5.083.30 7.62 0.25 15 degree 0.46 DIP-14-300-2.54 UNIT:mm 6.40 2.54 3.51 5.083.30 7.62 0.25 15 degree 0.46 19.4 1.50 /G3