RH1056A

RH1056A_15 LINER

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Precision, High Speed, JFET Input Operational Amplifi er The RH1056A JFET input operational amplifi ers combine precision specifi cations with high speed performance. For the fi rst time, 16V/μs slew rate and 6.5MHz gain- bandwidth product are simultaneously achieved with offset voltage of typically 50μV , 1.2μV/°C drift, bias currents of 40pA at 70°C. The wafer lots are processed to L TC’s in-house Class S fl ow to yield circuits usable in stringent military applications. (Note 1) BURN-IN CIRCUIT DESCRIPTION ABSOLUTE MAXIMUM RATINGS TOP VIEW H PACKAGE 8-LEAD TO-5 METAL CAN NC BAL V+ OUT–IN BAL+IN TOP VIEW W PACKAGE 10-LEAD CERPAC NC BAL –IN +IN V NC NC V OUT BAL

PACKAGE INFORMATION

200Ω 10k 20V RH1056A BI –20V

SYMBOL PARAM ETER CONDITIONS NOTES TA = 25°C SUB- GROUP –55°C ≤ TA ≤ 125°C SUB- GROUP UNITSMIN TYP MAX MIN TYP MAX VOS Input Offset Voltage RH1056AMW RH1056AMH 2 300 300 900 1100 2, 3 2, 3 μV μV IOS Input Offset Current Fully Warmed Up TA = 125°C 10 1 1.5 2 pA nA IB Input Bias Current Fully Warmed Up TA = 125°C 45 0 1 3.0 2 pA nA RIN Input Resistance 10 12 Ω AVOL Large-Signal Voltage Gain VS = ±15V , VO = ±10V , RL = 2k VS = ±15V , VO = ±10V , RL = 1k 150 130 40 5,6 V/mV V/mV VO Output Voltage Swing V S = ±15V , RL = 2k ±12 4 ±12 5,6 V VCM Input Common Mode Voltage Range VS = ±15V ±11 1 ±11 2,3 V CMRR Common Mode Rejection Ratio VCM = ±11V VCM = ±10.5V 86 1 85 2,3 dB dB PSRR Power Supply Rejection Ratio VS = ±10V to ±18V VS = ±10V to ±17V 90 1 88 2,3 dB dB IS Supply Current V S = ±15V 6.5 1 mA SR Slew Rate AV = 1, V S = ±15V 10 7 V/μs GBW Gain-Bandwidth Product V S = ±15V 6.5 MHz en Input Noise Voltage Density VS = ±15V , f = 10Hz VS = ±15V , f = 1kHz fA/√Hz fA/√Hz in Input Noise Current Density VS = ±15V , f = 10Hz VS = ±15V , f = 1kHz 1.8 1.8 fA/√Hz fA/√Hz CIN Input Capacitance 4 4 pF (Preirradiation) (Note 3) SYMBOL PARAMETER CONDITIONS NOTES 10KRAD (Si) 20KRAD (Si) 50KRAD (Si) 100KRAD (Si) 200KRAD (Si) UNITSMIN MAX MIN MAX MIN MAX MIN MAX MIN MAX VOS Input Offset Voltage 2 300 300 370 570 870 μV IOS Input Offset Current 4 ±10 ±50 ±150 ±250 ±350 pA IB Input Bias Current 4 ±50 ±250 ±500 ±1000 ±2000 pA AVOL Large-Signal Voltage Gain VO = ±10V , RL ≥ 2k VO = ±10V , RL ≥ 1k 150 130 150 130 150 130 100 V/mV V/mV VO Output Voltage Swing R L ≥ 2k ±12 ±12 ±12 ±12 ±12 V VCM Input Common Mode Voltage Range VS = ±15V ±11 ±11 ±11 ±11 ±11 V CMRR Common Mode Rejection Ratio VCM = ±11V 86 86 86 86 86 dB PSRR Power Supply Rejection Ratio VS = ±10V to ±18V 90 90 90 90 90 dB IS Supply Current 7 7 7 7 7 mA SR Slew Rate A V = 1, VS = ±15V 10 10 9 9 9 V/μs CIN Input Capacitance 3(Typ) 3(Typ) 3(Typ) 3(Typ) 3(Typ) pF TABLE 1: ELECTRICAL CHARACTERISTICS TABLE 1A: ELECTRICAL CHARACTERISTICS (Postirradiation) (Note 5)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. TOTAL DOSE BIAS CIRCUIT TABLE 2: ELECTRICAL TEST REQUIREMENTS 10k 10k 15V 0.1μF 0.1μF RH1056A BC 38V –15V MIL-STD-883 TEST REQUIREMENTS SUBGROUP Final Electrical Test Requirements (Method 5004) 1*,2,3,4,5,6, 7 Group A Test Requirements (Method 5005) 1,2,3,4,5,6, 7 Group B and D for Class S, and Class C and D for Class B** End Point Electrical Parameters (Method 5005) *PDA applies to subgroup 1. See PDA Test Notes. **For D3, D4, B5 and B6 V OS Limit as follows W Package H Package 500μV 700μV PDA Test Notes The PDA is specifi ed as 5% based on failures from group A, subgroup 1, tests after cooldown as the fi nal electrical test in accordance with method 5004 of MIL-STD-883. The verifi ed failures of group A, subgroup 1, after burn-in divided by the total number of devices submitted for burn-in in that lot shall be used to determine the percent for the lot. Linear Technology Corporation reserves the right to test to tighter limits than those given. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Unless otherwise specifi ed, the absolute maximum negative input voltage is equal to the negative power supply voltage. Offset voltage is measured under two different conditions: (a) approximately 0.5 seconds after application of power , (b) at T A = 25°C only, with the chip heated to approximately 45°C to account for chip temperature rise when the device is fully warmed up. TABLE 1A: ELECTRICAL CHARACTERISTICS Note 3: Unless otherwise stated, VS = ± 15V; and VOS, IB and IOS are measured at VCM = 0V . Note 4: The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature, T J. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, P D. TJ = TA + (θJA • PD) where θJA is the thermal resistance from junction to ambient. Note 5: Unless otherwise stated, VS = ±15V , VCM = 0V and TA = 25°C.

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 1989 LT 0209 REV C • PRINTED IN USA ID No. 66-10-0160 Rev C 0209 TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current Common Mode Rejection Ratio Input Offset Current Power Supply Rejection Ratio Input Offset Voltage Open-Loop Gain TOTAL DOSE KRADs (Si) INPUT OFFSET VOLTAGE (mV) 0.6 0.4 0.2 –0.2 –0.4 –0.6 10 100 1000 1056A G01 VS = ±15V VCM= 0V TOTAL DOSE KRADs (Si) OPEN-LOOP GAIN (V/mV) 350 300 250 200 150 100 10 100 1000 1056A G02 VS = ±15V VO = ±10V RL = 2k RL = 1k TOTAL DOSE KRADs (Si) INPUT BIAS CURRENT (nA) 3.0 2.5 2.0 1.5 1.0 0.5 –0.5 10 100 1000 1056A G03 VS = ±15V VCM = 0V TOTAL DOSE KRADs (Si) COMMON MODE REJECTION RATIO (dB) 130 120 110 100 10 100 1000 1056A G04 VS = ±15V VCM = ±11V TOTAL DOSE KRADs (Si) INPUT OFFSET CURRENT (nA) 0.4 0.3 0.2 0.1 –0.1 –0.2 –0.3 10 100 1000 1056A G05 VS = ±15V VCM = 0V TOTAL DOSE KRADs (Si) POWER SUPPLY REJECTION RATIO (dB) 130 120 110 100 10 100 1000 1056A G06 VS = ±10V TO ±18V