RH1014M

RH1014M_15 LINER

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A UGWA WU WARBSOLUTEX I T I S The RH1014M is the first precision quad operational amplifier which directly upgrades designs in the industry standard 8-pin DIP LM124/LM148/OP-11/5156 pin con- figuration. Low offset voltage (300 µV max), low drift (≤2.5µV/°C), low offset current ( ≤1.5nA), and high gain (1.2 million min) combine to make the RH1014M four truly precision amplifers in one package. The wafer lots are processed to Linear Technology’s in- house Class S flow to yield circuits usable in stringent military applications. D UESCRIPTIO , LTC and LT are registered trademarks of Linear Technology Corporation. RH1014M 20V –20V 50k 100Ω 50k RH1014M BI TOP VIEW J PACKAGE 14-LEAD CERAMIC DIP OUT A –IN A +IN A V +IN B –IN B OUT B OUT D –IN D +IN D V +IN C –IN C OUT C TOP VIEW OUT A –IN A +IN A V +IN B –IN B OUT B OUT D –IN D +IN D V +IN C –IN C OUT C W PACKAGE 14-LEAD FLATPAK GLASS SEALED BURN-IN CIRCUIT PACKAGE INFORMATION

(Pre-Irradiation) VS = ±15V, VCM = 0V, unless otherwise noted. TA = 25°C SUB- SUB- SYMBOL PARAMETER CONDITIONS NOTES MIN TYP MAX GROUP MIN TYP MAX GROUP UNITS VOS Input Offset Voltage 300 1 550 2,3 µV 2 450 1 750 3 µV VCM = 0.1V, TA = 125°C 2 750 2 µV ∆VOS Average Tempco of Offset 1 2.5 µV/°C ∆Temp Voltage ∆VOS Long Term VOS Stability 0.5 µV/Mo ∆Time IOS Input Offset Current 10 1 20 2,3 nA 2 10 1 20 2,3 nA IB Input Bias Current 30 1 45 2,3 nA 2 50 1 120 2,3 nA en Input Noise Voltage 0.1Hz to 10Hz 0.55 µVP-P Input Noise Voltage f O = 10Hz 24 nV/ √Hz Density f O = 1000Hz 22 nV/ √Hz in Input Noise Current f O = 10Hz 0.07 pA/ √Hz Density RIN Input Resistance Differential 1 70 M Ω Common Mode 4 G Ω AVOL Large-Signal Voltage Gain V O = ±10V, RL ≥ 2k 1.2 4 0.25 5,6 V/ µV VO = ±10V, RL ≥ 600Ω 0.5 4 V/ µV VO = 5mV to 4V, RL = 500Ω 21 V / µV Input Voltage Range 1 13.5 V 1 –15.0 V 1,2 3.5 V 1,2 0 V CMRR Common-Mode Rejection V CM = 13.5V, –15V 97 1 dB Ratio V CM = 13V, –14.9V 94 2,3 dB PSRR Power Supply Rejection V S = ± 2V to ±18V 100 1 97 2,3 dB Ratio Channel Separation V O = ±10V, RL = 2k 120 1 dB VOUT Output Voltage Swing R L ≥ 2k ±12.5 4 ±11.5 5,6 V Output Low, No Load 2 25 4 mV Output Low, 600Ω to GND 2 10 4 18 5,6 mV Output Low, ISINK = 1mA 2 350 4 mV Output High, No Load 2 4.0 4 V Output High, 600Ω to GND 2 3.4 4 3.1 5,6 V SR Slew Rate 0.2 4 V/ µs IS Supply Current Per Amplifier 0.55 1 0.70 2,3 mA 2 0.50 1 0.65 2,3 mA TABLE 1: ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS NOTES MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS VOS Input Offset Voltage 450 450 600 750 900 µV 2 600 600 750 900 µV IOS Input Offset Current 10 10 15 20 25 nA 2 1 01 01 5 2 0 n A IB Input Bias Current 60 75 100 175 250 nA 2 80 100 125 200 nA 2 3.5 3.5 3.5 3.5 V 2 000 0 V CMRR Common-Mode Rejection V CM = 13V, – 15V 97 97 94 90 86 dB Ratio PSRR Power Supply Rejection V S = ±10V to ±18V 100 98 94 86 80 dB Ratio AVOL Large-Signal Voltage Gain R L ≥ 10k, VO = ±10V 500 200 100 50 25 V/mV Swing Output Low, No Load 2 25 30 40 50 mV Output Low, 600Ω t o G N D 2 1 01 01 0 1 0 m V Output Low, ISINK = 1mA 2 0.6 0.8 1.0 1.6 V Output High, No Load 2 4.0 4.0 4.0 4.0 V Output High, 600Ω to GND 2 3.4 3.2 3.0 2.8 V 2 0.50 0.50 0.50 0.50 mA VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted. TABLE 1A: ELECTRICAL CHARACTERISTICS (Post-Irradiation) 200KRAD(Si)100KRAD(Si)50KRAD(Si)20KRAD(Si)10KRAD(Si) Note 1: Guaranteed by design, characterization, or correlation to other tested parameters. Note 2: Specification applies for VS+ = 5V, VS– = 0V, VCM = 0V, VOUT = 1.4V.

MIL-STD-883 TEST REQUIREMENTS SUBGROUP Final Electrical Test Requirements (Method 5004) 1*,2,3,4,5,6 Group A Test Requirements (Method 5005) 1,2,3,4,5,6 Group B and D for Class S 1,2,3 End Point Electrical Parameters (Method 5005) * PDA applies to subgroup 1. See PDA Test Notes. TABLE 2: ELECTRICAL TEST REQUIRE E TSUW PDA Test Notes The PDA is specified as 5% based on failures from group A, subgroup 1, tests after cooldown as the final electrical test in accordance with method 5004 of MIL-STD-883. The verified failures of group A, subgroup 1, after burn-in divided by the total number of devices submitted for burn-in in that lot shall be used to determine the percent for the lot. Linear Technology Corporation reserves the right to test to tighter limits than those given. TOTAL DOSE BIAS CIRCUIT Negative Slew RatePositive Slew Rate CCHARA TERISTICSUWATYPICALP E RFOR CE TOTAL DOSE KRAD (Si) NEGATIVE SLEW RATE (V/µs) 0.8 0.6 0.4 0.2 10 100 1000 RH1014M G03 VS = ±15V RL = 10k TOTAL DOSE KRAD (Si) POSITIVE SLEW RATE (V/µs) 0.8 0.6 0.4 0.2 10 100 1000 RH1014M G02 VS = ±15V RL = 10k TOTAL DOSE KRAD (Si) SUPPLY CURRENT (mA) 0.8 0.6 0.4 0.2 10 100 1000 RH1014M G01 VS = ±15V RL = 10k Supply Current (Per Amplifier) 15V –15V 10k RH1014M TDBC 10k

CCHARA TERISTICSUWATYPICALP E RFOR CE Power Supply Rejection Ratio TOTAL DOSE KRAD (Si) POWER SUPPLY REJECTION RATIO (dB) 140 130 120 110 100 10 100 1000 RH1014M G09 VS = ±10V TO ±18V TOTAL DOSE KRAD (Si) INPUT NOISE VOLTAGE DENSITY (nV/√Hz) 100 10 100 1000 RH1014M G10 VS = ±15V fO = 10Hz Input Noise Voltage Density TOTAL DOSE KRAD (Si) GAIN BANDWIDTH PRODUCT (kHz) 1000 900 800 700 600 500 400 300 200 100 10 100 1000 RH1014M G11 VS = ±5V RL = 10k Gain Bandwidth Product Open-Loop Gain TOTAL DOSE KRAD (Si) OPEN-LOOP GAIN (dB) 150 140 130 120 110 100 10 100 1000 RH1014M G07 VS = ±15V RL = 10k VOUT = ±10V TOTAL DOSE KRAD (Si) INPUT OFFSET VOLTAGE (µV) 300 200 100 –100 –200 –300 10 100 1000 RH1014M G04 VS = ±15V VCM = 0V Input Offset Voltage Input Offset Current TOTAL DOSE KRAD (Si) INPUT OFFSET CURRENT (nA) 10 100 1000 RH1014M G06 VS = ±15V VCM = 0V Input Bias Current TOTAL DOSE KRAD (Si) INPUT BIAS CURRENT (nA) 10 100 1000 RH1014M G05 VS = ±15V VCM = 0V TOTAL DOSE KRAD (Si) COMMON-MODE REJECTION RATIO (dB) 150 140 130 120 110 100 10 100 1000 RH1014M G08 VS = ±15V –15V ≤ VCM ≤ 13.5V Common-Mode Rejection Ratio Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

© LINEAR TECHNOLOGY CORPORA TION 1 990 LT 1007 REV G • PRINTED IN USA I.D. No. 66-11-1014 Rev. G 1007 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com