P4C422

P4C422 ETC1

Document overview

• Manufacturer or author: Denise
• PDF pages: 6

Technical content

FEATURES

High Speed (Equal Access and Cycle Times) – 10/12/15/20/25/35 ns (Commercial) – 15/20/25 /35 ns (Military) CMOS for Low Power – 495 mW Max. – 10/12/15/20/25 (Commercial) – 495 mW Max. – 15/20/25/35 (Military)

DESCRIPTION

The P4C422 is a 1,024-bit high-speed (10ns) Static RAM with a 256 x 4 organization. The memory requires no clocks or refreshing and has equal access and cycle times. Inputs and outputs are fully TTL compatible. Operation is from a single 5 Volt supply. Easy memory expansion is provided by an active LOW chip select one (CS 1) and active HIGH chip select two (CS2) as well as 3- state outputs. P4C422 ULTRA HIGH SPEED 256 x 4 STATIC CMOS RAM Means Quality, Service and Speed 1Q97 FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATIONS In addition to very high performance and very high den- sity, the device features latch-up protection, single event and upset protection. The P4C422 is offered in several packages: 22-pin 400 mil DIP (plastic and ceramic), 24- pin 300 mil SOIC, 24-pin LCC and 24-pin CERPACK. Devices are offered in both commercial and military temperature ranges. COLUMN DECODER SENSE AMPS

32 X 32

Single 5V±10% Power Supply Separate I/O Fully TTL Compatible Inputs and Outputs Resistant to single event upset and latchup resulting from advanced process and design improvements Standard 22-pin 400 mil DIP, 24-pin 300 mil SOIC, 24-pin LCC package and 24-pin CERPACK package 31 2 2 42 32 2 151413121110 A 1 A 2 A 3 A 4VCC A 0 A 5 A 6 A 7 GND NC D 0 D 1 D 2O 1O 0 CS 2 D 3 O 3 INDEX WE O 2 CS 1 OE NC GND D 0 O 0 D 1 WE CS 2 O 3 V CC OE D 3 O 2 D 2 O 1 A 4 CS1 A 5 GND A 3 A 2 A 1 A 0 A 6 A 7 D 0 O 0 D 1 WE CS 2 O 3 V CC OE D 3 O 2 D 2 O 1 A 4 CS1 NCNC SOIC (S4) CERPACK (F3) SIMILAR TOP VIEW DIP (P3-1, D3-1) TOP VIEW LCC (L4) TOP VIEW

Grade (2) Ambient Temp Gnd Vcc Commercial 0 °C to 70°C 0V 5.0V ±10% Military –55 °C to 125°C 0V 5.0V ±10% DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) P4C422 Min Max VOH Output High Voltage I OH = –5.2 mA, VCC = Min. 2.4 V VOL Output Low Voltage I OL = +8 mA, VCC = Min. 0.4 V VIH Input High Voltage 2.1 V VIL Input Low Voltage 0.8 V VCL Input Clamp Diode Voltage IIN = –10 mA –1.5 V IIX Input Load Current GND ≤ VIN ≤ VCC –10 10 µA IOZ Output Current (High Z) VOL ≤ VOUT ≤ VOH , Output Disabled –10 10 µA IOS Output Short Circuit V CC = Max., VOUT = GND 90 mA Current(3) Symbol Parameter Test Conditions Unit Symbol Parameter Conditions Typ. Unit C IN Input Capacitance VIN = 0V 5 pF C OUT Output Capacitance VOUT = 0V 7 pF CAPACITANCES (4) (VCC = 5.0V, TA = 25°C, f = 1.0MHz) RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit TBIAS Temperature Under –55 to +125 °C Bias TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current 20 mA MAXIMUM RATINGS (1) Symbol Parameter Value Unit V CC Power Supply Pin with –0.5 to +7 V Respect to GND Terminal Voltage with –0.5 to VTERM Respect to GND V CC +0.5 V (up to 7.0V) TA Operating Temperature –55 to +125°C Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. 4. This parameter is sampled and not 100% tested. 5. Transition time is ≤ 3ns for 10, 12, and 15 ns products and ≤ 5ns for 20, 25, and 35 ns products, see Fig 1d. Timing is referenced at input and output levels of 1.5V. The output loading is equivalent to the specified I OL /IOH with a load capacitance of 15 pF (10, 12) or 30 pF (15, 20, 25, 35) as in Fig. 1a and 1b respectively. 6. Transition time is ≤ 3ns for 10, 12, and 15 ns products and ≤ 5ns for 20, 25, and 35 ns products, see Fig 1d. Transition is measured at steady state HIGH level -500mV or steady state LOW level +500mV on the output from a level on the input with load shown in Fig. 1c. 7. t W is measured at tWSA = min.: tWSA is measured at tW = min. POWER DISSIPATION CHARACTERISTICS VS. SPEED Symbol ICC Parameter Dynamic Operating Current Temperature Range Commercial Military -10 N/A -12 N/A -15 -20 -25 -35 Unit mA mA

minimum write recovery times by eliminating the “write recovery glitch.” Reading is performed with chip selct one (CS 1) LOW, chip select two (CS2) HIGH, write enable (WE) HIGH and output enable (OE) LOW. The informa- tion stored in the addressed word is read out on the noninverting outputs (O 0 through O3). The outputs of the memory go to an inactive high impedance state whenever chip select one (CS 1) is HIGH, or during the write operation when write enable (WE) is LOW. An active LOW write enable (WE) controls the writing/ reading operation of the memory. When the chip select one (CS 1) and the write enable (WE) are LOW and the chip select two (CS2) is HIGH, the information on data inputs (D0 through D3) is written into the addressed memory word and preconditions the output circuitry so that true data is present at the outputs when the write cycle is complete. This preconditioning operation insures FUNCTIONAL DESCRIPTION TRUTH TABLE AC ELECTRICAL CHARACTERISTICS—READ CYCLE (VCC = 5V ± 10% except as noted, All Temperature Ranges)(2) Mode CS 2 CSCSCSCSCS1 WEWEWEWEWE OEOEOEOEOE Output Standby L X X X High Z Standby X H X X High Z D OUT Disabled H L X H High Z Read H L H L D OUT Write H L L X High Z TIMING WAVEFORM OF READ CYCLE Notes: H = HIGH L = Low X = Don't Care HIGH Z = Implies outputs are disabled or off. This condition is defined as high impedance state for the P4C422. Sym. tRC tACS tZRCS tAOS tZROS tAA Read Cycle Time (5) Chip Select Time (5) Chip Select to High-Z (6) Output Enable Time Output Enable to High-Z (6) Address Access Time (5) -10* Min Max 7.5 7.5 -12 Min Max -15 Min Max -20 Min Max -25 Min Max -35 Min Max Unit ns ns ns ns ns ns25 *VCC = 5V ± 5% Parameter ADDRESS tRC tAA tACS tAOS tZROS tZRCS DATA VALID CS1 CS 2 OE WE DATA A0–A7 O 0–O 3 OUTPUTS

AC CHARACTERISTICS—WRITE CYCLE (VCC = 5V ± 10% except as noted, All Temperature Ranges)(2) TIMING WAVEFORM OF WRITE CYCLE Parameter Write Cycle Time (5) Write Enable to High-Z (6) Write Recovery Time Write Pulse Width (5,7) Data Setup Time Prior to Write (5) Data Hold Time (5) Address Setup Time (5,7) Address Hold Time (5) Chip Select Setup Time (5) Chip Select Hold Time (5) Sym. tWC tZWS tWR tW tWSD tWHD tWSA tWHA tWSCS tWHCS -10* -12 -15 -20 -25 -35 Unit Min Max Min Max Min Max Min Min Max Min Max ns ns ns ns ns *VCC = 5V ± 5% 225 55 n s 00 0 25 5n s 22 4 55 5 ns 0 002 55n s 22 55 5n s tWRtZWS tWHCS tWHDtWSD tWSA tWSCS tWC CS1 CS 2 WE ADDRESS O 0–O 3 DATA IN D 0–D 3 A0–A7 tW tWHA DATA OUTPUTS

*Military temperature range with MIL-STD-883, Class B compliance. N/A = Not Available 2520 -15DMB -15LMB -15FMB SELECTION GUIDE The P4C422 is available in the following temperature range, speed, and package options. Temperature Range Package Commercial Temperature Plastic DIP SOIC CERDIP LCC CERPACK CERDIP LCC CERPACK Military Temperature Military Pro- cessed* Speed (ns) -10PC -10SC N/A N/A N/A N/A N/A N/A 12 15 -12PC -12SC -15PC -15SC -20PC -20SC -25PC -25SC N/A N/A N/A N/A N/A N/A -15DM -15LM -15FM -20DM -20LM -20FM -25DM -25LM -25FM -20DMB -20LMB -20FMB -25DMB -25LMB -25FMB

ORDERING INFORMATION

Device Type Package Processing P4C422 xxxx Speed 10,12,15, 25, 35 ns Commercial 15,20,25, 35 ns Military 256 x 4 SRAM C 0°C to +70°C M -55˚C to +125˚C MB MIL-STD-883, Class B D CERDIP (400 mil) L Ceramic LCC (400 mil Square) P Plastic DIP (400 mil) S Plastic SOIC (300 mil) F CERPACK The P4C422 is also available as SMD Number: 5962-88594 -35PC -35SC -35DM -35LM -35FM -35DMB -35LMB -35FMB