P400 VISHAY

Document overview

  • Manufacturer or author: Provided By www.digicamel.com(free datasheet download site)
  • PDF pages: 6

Technical content

Document Number: 93755 For tec hnical questions, contact: indmodules@vishay.com www.vishay.com Revision: 05-Nov-09 1 Passivated Assembled Circuit Elements, 40 A P400 Series Vishay High Power Products

FEATURES

  • Glass passivated junctions for greater reliability
  • Electrically isolated base plate
  • Available up to 1200 VRRM/VDRM
  • High dynamic characteristics
  • Wide choice of circuit configurations
  • Simplified mechanical design and assembly
  • UL E78996 approved
  • Compliant to RoHS directive 2002/95/EC

DESCRIPTION

The P400 series of integrated power circuits consists of power thyristors and power diodes configured in a single package. With its isolating base plate, mechanical designs are greatly simplified giving advantages of cost reduction and reduced size. Applications include power su pplies, control circuits and battery chargers. ELECTRICAL SPECIFICATIONS PRODUCT SUMMARY IO 40 A PACE-PAK (D-19) MAJOR RATINGS AND CHARACTERISTICS SYMBOL CHARACTERISTICS VALUES UNITS IO 80 °C 40 A ITSM, IFSM

50 Hz 385

A

60 Hz 400

50 Hz 745

60 Hz 680

I2√t 7450 A 2√s VRRM Range 400 to 1200 V VISOL 2500 V TJ - 40 to 125 °C TStg VOLTAGE RATINGS TYPE NUMBER VRRM/VDRM, MAXIMUM REPETITIVE PEAK REVERSE AND PEAK OFF-STATE VOLTAGE V VRSM, MAXIMUM NON-REPETITIVE PEAK REVERSE VOLTAGE V IRRM MAXIMUM AT TJ MAXIMUM mA P401, P421, P431 400 500 P402, P422, P432 600 700 P403, P423, P433 800 900 P404, P424, P434 1000 1100 P405, P425, P435 1200 1300

www.vishay.com For technical questions, contact: indmodules@vishay.com Document Number: 93755

2 Revision: 05-Nov-09

Vishay High Power Products Passivated Assembled Circuit Elements, 40 A ON-STATE CONDUCTION PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum DC output current at case temperature IO Full bridge circuits 40 A 80 °C Maximum peak, one-cycle non-repetitive on-state or forward current ITSM, IFSM t = 10 ms No voltage reapplied Sinusoidal half wave, initial TJ = TJ maximum 385 A t = 8.3 ms 400 t = 10 ms 100 % VRRM reapplied 325 t = 8.3 ms 340 Maximum I2t for fusing I 2t t = 10 ms No voltage reapplied 745 A2s t = 8.3 ms 680 t = 10 ms 100 % VRRM reapplied 530 t = 8.3 ms 480 Maximum I2√t for fusing I 2√t t = 0.1 ms to 10 ms, no voltage reapplied I2t for time tx = I2√t · √tx 7450 A 2√s Low level value of threshold voltage V T(TO)1 (16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum 0.83 V High level value of threshold voltage V T(TO)2 (I > π x IT(AV)), TJ = TJ maximum 1.03 Low level value of on-state slope resistance r t1 (16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum 9.61 mΩ High level value of on-state slope resistance r t2 (I > π x IT(AV)), TJ = TJ maximum 7.01 Maximum on-state voltage drop V TM ITM = π x IT(AV) TJ = 25 °C 1.4 V Maximum forward voltage drop V FM IFM = π x IF(AV) Maximum non-repetitive rate of rise of turned-on current dI/dt TJ = 125 °C from 0.67 VDRM ITM = π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs 200 A/μs Maximum holding current I H TJ = 25 °C anode supply = 6 V, resistive load 130 mA Maximum latching current I L 250 BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum critical rate of rise of off-state voltage dV/dt T J = 125 °C, exponential to 0.67 VDRM gate open 200 V/μs Maximum peak reverse and off-state leakage current at VRRM, VDRM IRRM, IDRM TJ = 125 °C, gate open circuit 10 mA Maximum peak reverse leakage current I RRM TJ = 25 °C 100 μA RMS isolation voltage V ISOL

50 Hz, circuit to base, all terminals shorted,

TJ = 25 °C, t = 1 s 2500 V

Document Number: 93755 For tec hnical questions, contact: indmodules@vishay.com www.vishay.com Revision: 05-Nov-09 3 P400 Series Passivated Assembled Circuit Elements, 40 A Vishay High Power Products Note (1) A mounting compund is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound Note (1) To complete code refer to Voltage Ratings table, i.e.: For 600 V P40.W complete code is P402W TRIGGERING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum peak gate power P GM 8 WMaximum average gate power P G(AV) 2 Maximum peak gate current I GM 2A Maximum peak negative gate voltage -V GM 10 V Maximum gate voltage required to trigger V GT TJ = - 40 °C Anode supply =

6 V resistive load

VTJ = 25 °C 2 TJ = 125 °C 1 Maximum gate current required to trigger I GT TJ = - 40 °C 90 mATJ = 25 °C 60 TJ = 125 °C 35 Maximum gate voltage that will not trigger V GD TJ = 125 °C, rated VDRM applied 0.2 V Maximum gate current that will not trigger I GD 2m A THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum junction operating and storage temperature range TJ, TStg - 40 to 125 °C Maximum thermal resistance, junction to case per junction RthJC DC operation 1.05 K/WMaximum thermal resistance, case to heatsink RthCS Mounting surface, smooth and greased 0.10 Mounting torque, base to heatsink (1) 4N m Approximate weight 58 g 2.0 oz. CIRCUIT TYPE AND CODING (1) CIRCUIT “0” CIRCUIT “2” CIRCUIT “3” Terminal positions Schematic diagram Single phase hybrid bridge common cathode Single phase hybrid bridge doubler Single phase all SCR bridge Basic series P40. P42. P43. With voltage suppression P40.K P42.K P43.K With freewheeling diode P40.W - - With both voltage suppression and freewheeling diode P40.KW - - AC1 G1- AC2 G2+ AC1 G1- AC2 G2+ AC2 G2- AC1 G3 G1 G4 AC2 AC1 (-) (+) AC1 AC2 (-) (+) AC2 AC1 (-) (+)

www.vishay.com For technical questions, contact: indmodules@vishay.com Document Number: 93755

4 Revision: 05-Nov-09

Vishay High Power Products Passivated Assembled Circuit Elements, 40 A Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink) Fig. 2 - On-State Power Loss Characteristics Fig. 3 - On-State Power Loss Characteristics Fig. 4 - Current Ratings Characteristics Fig. 5 - On-State Voltage Drop Characteristics Maximum Total Power Loss (W) Total Output Current (A) 5 1 01 52 02 5 4030 350 120 100 TJ = 125 °C 180° (sine) 93755_01a Maximum Total Power Loss (W) Maximum Allowable Ambient Temperature (°C) 25 75 50 100 1250 120 100 93755_01b R thSA = 0.

7 K/W -

ΔR

1 K/W

2 K/W

3 K/W

5 K/W

1.5 K/W

10 K/W

Power Loss (W) Average On-State Current (A) 10 2001 5 5 93755_02 Ø Conduction angle RMS limit TJ = 125 °C Per junction 180° 120° 90° 60° 30° Maximum Average On-State Power Loss (W) Average On-State Current (A) 20 3503 0 10 15 255 93755_03 RMS limit TJ = 125 °C Per junction Conduction period Ø DC 180° 120° 90° 60° 30° Maximum Allowable Case Temperature (°C) Total Output Current (A) 10 20 30 4051 5 2 5 3 5 450 100 110 120 130 Fully turned-on 180° (Rect.) 180° (Sine) Per module 93755_04 Instantaneous On-State Current (A) Instantaneous On-State Voltage (V) 100 1000 93755_05 TJ = 125 °C TJ = 25 °C Per junction

Document Number: 93755 For tec hnical questions, contact: indmodules@vishay.com www.vishay.com Revision: 05-Nov-09 5 P400 Series Passivated Assembled Circuit Elements, 40 A Vishay High Power Products Fig. 6 - Maximum Non-Repetitive Surge Current Fig. 7 - Maximum Non-Repetitive Surge Current Fig. 8 - Thermal Impedance ZthJC Characteristics Fig. 9 - Gate Characteristics Peak Half Sine Wave On-State Current (A) Number of Equal Amplitude Half Cycle Current Pulses (N) 10 1001 150 175 200 300 250 325 275 225 350 93755_06 Per junction At any rated load condition and with rated VRRM applied following surge. Initial TJ = 125 °C at 60 Hz 0.0083 s at 50 Hz 0.0100 s Peak Half Sine Wave On-State Current (A) Pulse Train Duration (s) 0.1 10.01 150 200 250 300 350 400 93755_07 Maximum non-repetitive surge current versus pulse train duration. Control of conduction may not be maintained. Initial TJ = 125 °C No voltage reapplied Rated VRRM reapplied Per junction 0.01 0.1 0.0001 0.001 0.01 0.1 1 Square Wave Pulse Duration (s) ZthJC - Transient Thermal Impedance (K/W) 93755_08 Steady state value RthJC = 1.05 K/W (DC operation) Per junction 0.1 100 0.001 93755_09 Instantaneous Gate Current (A) Instantaneous Gate Voltage (V) 0.01 0.1 1 10 100 (1) (2) (3) (4) (1) PGM = 10 W, tp = 5 ms (2) PGM = 20 W, tp = 25 ms (3) PGM = 50 W, tp = 1 ms (4) PGM = 100 W, tp = 500 μs Frequency limited by PG(AV) (b) (a) TJ = 25 °C TJ = 125 °C TJ = 40 °C VGD IGD Rectangular gate pulse (a) Recommended load line for rated dI/dt: 10 V, 20 Ω, t r ≤ 1 μs (b) Recommended load line for rated dI/dt: 10 V, 65 Ω, t r ≤ 1 μs LINKS TO RELATED DOCUMENTS Dimensions www.vishay.com/doc?95335

Document Number: 91000 www.vishay.com Revision: 18-Jul-08 1 Disclaimer Legal Disclaimer Notice Vishay All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all li ability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permit ted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.