P100 VISHAY
Document overview
- Manufacturer or author: Provided By www.digicamel.com(free datasheet download site)
- PDF pages: 6
Technical content
Document Number: 93754 For tec hnical questions, contact: indmodules@vishay.com www.vishay.com Revision: 04-Nov-09 1 Passivated Assembled Circuit Elements, 25 A P100 Series Vishay High Power Products
FEATURES
- Glass passivated junctions for greater reliability
- Electrically isolated base plate
- Available up to 1200 VRRM/VDRM
- High dynamic characteristics
- Wide choice of circuit configurations
- Simplified mechanical design and assembly
- UL E78996 approved
- Compliant to RoHS directive 2002/95/EC
DESCRIPTION
The P100 series of integrated power circuits consists of power thyristors and power diodes configured in a single package. With its isolating base plate, mechanical designs are greatly simplified giving advantages of cost reduction and reduced size. Applications include power su pplies, control circuits and battery chargers. ELECTRICAL SPECIFICATIONS PRODUCT SUMMARY IO 25 A PACE-PAK (D-19) MAJOR RATINGS AND CHARACTERISTICS SYMBOL CHARACTERISTICS VALUES UNITS IO 85 °C 25 A ITSM, IFSM
50 Hz 357
A
60 Hz 375
50 Hz 637
60 Hz 580
I2√t 6365 A 2√s VRRM Range 400 to 1200 V VISOL 2500 V TJ - 40 to 125 °C TStg VOLTAGE RATINGS TYPE NUMBER VRRM/VDRM, MAXIMUM REPETITIVE PEAK REVERSE AND PEAK OFF-STATE VOLTAGE V VRSM, MAXIMUM NON-REPETITIVE PEAK REVERSE VOLTAGE V IRRM MAXIMUM AT TJ MAXIMUM mA P101, P121, P131 400 500 P102, P122, P132 600 700 P103, P123, P133 800 900 P104, P124, P134 1000 1100 P105, P125, P135 1200 1300
www.vishay.com For technical questions, contact: indmodules@vishay.com Document Number: 93754
2 Revision: 04-Nov-09
Vishay High Power Products Passivated Assembled Circuit Elements, 25 A ON-STATE CONDUCTION PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum DC output current at case temperature IO Full bridge 25 A 85 °C Maximum peak, one-cycle non-repetitive on-state or forward current ITSM, IFSM t = 10 ms No voltage reapplied Sinusoidal half wave, initial TJ = TJ maximum 357 A t = 8.3 ms 375 t = 10 ms 100 % VRRM reapplied 300 t = 8.3 ms 315 Maximum I2t for fusing I 2t t = 10 ms No voltage reapplied 637 A2s t = 8.3 ms 580 t = 10 ms 100 % VRRM reapplied 450 t = 8.3 ms 410 Maximum I2√t for fusing I 2√t t = 0.1 ms to 10 ms, no voltage reapplied I2t for time tx = I2√t · √tx 6365 A 2√s Maximum value of threshold voltage VT(TO) TJ = 125 °C 0.82 V Maximum level value of on-state slope resistance rt1 TJ = 125 °C, average power = VT(TO) x IT(AV) + rt + (IT(RMS))2 12 m Ω Maximum on-state voltage drop V TM ITM = π x IT(AV) TJ = 25 °C 1.35 V Maximum forward voltage drop V FM IFM = π x IF(AV) Maximum non-repetitive rate of rise of turned-on current dI/dt TJ = 125 °C from 0.67 VDRM ITM = π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs 200 A/μs Maximum holding current I H TJ = 25 °C anode supply = 6 V, resistive load, gate open 130 mA Maximum latching current I L TJ = 25 °C anode supply = 6 V, resistive load 250 BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum critical rate of rise of off-state voltage dV/dt T J = 125 °C, exponential to 0.67 VDRM gate open 200 V/μs Maximum peak reverse and off-state leakage current at V RRM, VDRM IRRM, IDRM TJ = 125 °C, gate open circuit 10 mA Maximum peak reverse leakage current IRRM TJ = 25 °C 100 μA RMS isolation voltage V ISOL
50 Hz, circuit to base, all terminals shorted,
TJ = 25 °C, t = 1 s 2500 V
Document Number: 93754 For tec hnical questions, contact: indmodules@vishay.com www.vishay.com Revision: 04-Nov-09 3 P100 Series Passivated Assembled Circuit Elements, 25 A Vishay High Power Products Note (1) A mounting compund is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound Note (1) To complete code refer to Voltage Ratings table, i.e.: For 600 V P10.W complete code is P102W TRIGGERING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum peak gate power P GM 8 WMaximum average gate power P G(AV) 2 Maximum peak gate current I GM 2A Maximum peak negative gate voltage -V GM 10 V Maximum gate voltage required to trigger V GT TJ = - 40 °C Anode supply =
6 V resistive load
VTJ = 25 °C 2 TJ = 125 °C 1 Maximum gate current required to trigger I GT TJ = - 40 °C 90 mATJ = 25 °C 60 TJ = 125 °C 35 Maximum gate voltage that will not trigger V GD TJ = 125 °C, rated VDRM applied 0.2 V Maximum gate current that will not trigger I GD 2m A THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum junction operating and storage temperature range TJ, TStg - 40 to 125 °C Maximum thermal resistance, junction to case per junction RthJC DC operation 2.24 K/WMaximum thermal resistance, case to heatsink RthCS Mounting surface, smooth and greased 0.10 Mounting torque, base to heatsink (1) 4N m Approximate weight 58 g 2.0 oz. CIRCUIT TYPE AND CODING (1) CIRCUIT “0” CIRCUIT “2” CIRCUIT “3” Terminal positions Schematic diagram Single phase hybrid bridge common cathode Single phase hybrid bridge doubler Single phase all SCR bridge Basic series P10. P12. P13. With voltage suppression P10.K P12.K P13.K With freewheeling diode P10.W - - With both voltage suppression and freewheeling diode P10.KW - - AC1 G1- AC2 G2+ AC1 G1- AC2 G2+ AC2 G2- AC1 G3 G1 G4 AC2 AC1 (-) (+) AC1 AC2 (-) (+) AC2 AC1 (-) (+)
www.vishay.com For technical questions, contact: indmodules@vishay.com Document Number: 93754
4 Revision: 04-Nov-09
Vishay High Power Products Passivated Assembled Circuit Elements, 25 A Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink) Fig. 2 - On-State Power Loss Characteristics Fig. 3 - On-State Power Loss Characteristics Fig. 4 - Current Ratings Characteristics Fig. 5 - On-State Voltage Drop Characteristics Maximum Total Power Loss (W) Total Output Current (A) 51 0 1 5 2 0 250 93754_01a 180° (sine) TJ = 125 °C Maximum Total Power Loss (W) Maximum Allowable Ambient Temperature (°C) 25 75 50 100 1250 93754_01b R thSA = 15 K/W - ΔR
2 K/W
3 K/W
7 K/W
10 K/W
5 K/W
Power Loss (W) Average On-State Current (A) 10 1505 93754_02 180° 120° 90° 60° 30° RMS limit Ø Conduction angle TJ = 125 °C Per junction Maximum Average On-State Power Loss (W) Average On-State Current (A) 2001 0 1 5 5 93754_03 DC 180° 120° 90° 60° 30° RMS limit TJ = 125 °C Per junction Conduction period Ø Maximum Allowable Case Temperature (°C) Total Output Current (A) 10 2051 5 2 5 300 100 110 120 130 93754_04 180° (Sine) 180° (Rect.) Fully turned-on Per module Instantaneous On-State Current (A) Instantaneous On-State Voltage (V) 0123456 100 1000 93754_05 TJ = 25 °C TJ = 125 °C Per junction
Document Number: 93754 For tec hnical questions, contact: indmodules@vishay.com www.vishay.com Revision: 04-Nov-09 5 P100 Series Passivated Assembled Circuit Elements, 25 A Vishay High Power Products Fig. 6 - Maximum Non-Repetitive Surge Current Fig. 7 - Maximum Non-Repetitive Surge Current Fig. 8 - Thermal Impedance ZthJC Characteristics Fig. 9 - Gate Characteristics Peak Half Sine Wave On-State Current (A) Number of Equal Amplitude Half Cycle Current Pulses (N) 10 1001 150 200 300 250 350 93754_06 Per junction At any rated load condition and with rated VRRM applied following surge. Initial TJ = 125 °C at 60 Hz 0.0083 s at 50 Hz 0.0100 s Peak Half Sine Wave On-State Current (A) Pulse Train Duration (s) 0.1 10.01 100 150 200 250 300 350 400 93754_07 Maximum non-repetitive surge current versus pulse train duration. Control of conduction may not be maintained. Initial TJ = 125 °C No voltage reapplied Rated VRRM reapplied Per junction 0.01 0.1 0.0001 0.001 0.01 0.1 10 1 Square Wave Pulse Duration (s) ZthJC - Transient Thermal Impedance (K/W) 93754_08 Per junction Steady state value RthJC = 2.24 K/W (DC operation) 0.1 100 0.001 93754_09 Instantaneous Gate Current (A) Instantaneous Gate Voltage (V) 0.01 0.1 1 10 100 (1) (2) (3) (4) (1) PGM = 10 W, tp = 5 ms (2) PGM = 20 W, tp = 25 ms (3) PGM = 50 W, tp = 1 ms (4) PGM = 100 W, tp = 500 μs Frequency limited by PG(AV) (b) (a) TJ = 25 °C TJ = 125 °C TJ = 40 °C VGD IGD Rectangular gate pulse (a) Recommended load line for rated dI/dt: 10 V, 20 Ω, t r ≤ 1 μs (b) Recommended load line for rated dI/dt: 10 V, 65 Ω, t r ≤ 1 μs LINKS TO RELATED DOCUMENTS Dimensions www.vishay.com/doc?95335
Document Number: 91000 www.vishay.com Revision: 18-Jul-08 1 Disclaimer Legal Disclaimer Notice Vishay All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all li ability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permit ted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.