P1100SB

P0060 LEIDITECH

Document overview

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Technical content

P0060~P3500SA_B_C Series are low capacitance devices designed to protect broadband equipment such as VOIP, DSL modems and DSLAMs from damaging overvoltage transients. The series provides a surface mount solution that enables equipment to comply with global regulatory standards while limiting the impact to broadband signals. P0060~P3500SA_B_C Series Thyristor Surge Suppressors

• Low voltagr overeshoot
• Low on-state voltage
• Does not degrade with use
• Fails short circuit when surged in excess of ratings
• Low Capacitance

Description

Electrical Characteristics

V DRM I DRM =5µA V S 100V/µS V T I T =2.2Amps I S I T I H Capacitance @1MHz, 2V bias V min V max V max mA max A max mA min pF min pF max P0060SA 6 25 4 800 2.2 50 25 150 P0080SA 6 25 4 800 2.2 50 25 150 P0220SA 15 32 4 800 2.2 50 25 150 P0300SA 25 40 4 800 2.2 50 15 140 P0640SA 58 77 4 800 2.2 150 40 60 P0720SA 65 88 4 800 2.2 150 35 60 P0900SA 75 98 4 800 2.2 150 25 55 P1100SA 90 130 4 800 2.2 150 30 50 P1300SA 120 160 4 800 2.2 150 25 45 P1500SA 140 180 4 800 2.2 150 25 45 P1800SA 170 220 4 800 2.2 150 25 50 P2300SA 190 260 4 800 2.2 150 30 50 P2600SA 220 300 4 800 2.2 150 25 50 P3100SA 275 350 4 800 2.2 150 20 45 P3500SA 320 400 4 800 2.2 150 20 45 Applicable Global Standards

• TIA-968-A
• ITU K.20/21 Enhanced level*
• ITU K.20/21 Basic Level
• GR 1089 Inter building*
• GR 1089 Inter building
• IEC 6100-4-5
• YD/T 1082
• YD/T 993
• YD/T 950 Rev : www.leiditech.com 01.06.2018 1/10

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Part Number V DRM I DRM =5µA V S 100V/µS V T I T =2.2Amps I S I T I H Capacitance @1MHz, 2V bias V min V max V max mA max A max mA min pF min pF max P0060SB 6 15 4 800 2.2 50 25 80 P0080SB 6 25 4 800 2.2 50 25 80 P0220SB 15 32 4 800 2.2 50 25 100 P0300SB 25 40 4 800 2.2 50 15 140 P0640SB 58 77 4 800 2.2 150 40 80 P0720SB 65 88 4 800 2.2 150 35 75 P0900SB 75 98 4 800 2.2 150 35 70 P1100SB 90 130 4 800 2.2 150 30 70 P1300SB 120 160 4 800 2.2 150 25 70 P1500SB 140 180 4 800 2.2 150 25 70 P1800SB 170 220 4 800 2.2 150 25 70 P2300SB 190 260 4 800 2.2 150 20 70 P2600SB 220 300 4 800 2.2 150 25 70 P3100SB 275 350 4 800 2.2 150 20 65 P3500SB 320 400 4 800 2.2 150 20 55 V DRM I DRM =5µA V S 100V/µS V T I T =2.2Amps I S I T I H Capacitance @1MHz, 2V bias V min V max V max mA max A max mA min pF min pF max P0060SC 6 15 4 800 2.2 50 45 100 P0080SC 6 25 4 800 2.2 50 45 100 P0220SC 15 32 4 800 2.2 50 30 110 P0300SC 25 40 4 800 2.2 50 25 80 P0640SC 58 77 4 800 2.2 150 55 155 P0720SC 65 88 4 800 2.2 150 50 150 P0900SC 75 98 4 800 2.2 150 45 140 P1100SC 90 130 4 800 2.2 150 45 115 P1300SC 120 160 4 800 2.2 150 40 115 P1500SC 140 180 4 800 2.2 150 35 110 P1800SC 170 220 4 800 2.2 150 35 110 P2300SC 190 260 4 800 2.2 150 30 120 P2600SC 220 300 4 800 2.2 150 30 120 P3100SC 275 350 4 800 2.2 150 30 110 P3500SC 320 400 4 800 2.2 150 25 110 Rev : www.leiditech.com 01.06.2018 2/10 P2000SC 180 220 4 800 2.2 150 35 120

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Series I PP I TSM 50/60 H z di/dt 2x10 µs 8x20 µs 10x160 µs 10x560 µs 10x1000 µs A min A/μs maxA min A min A min A min A min A 150 150 90 50 45 20 500 B 250 250 150 100 80 30 500 C 500 400 200 150 100 50 500 Surge Ratings PackageS ymbolP arameter ValueU nit DO-214AA T J Operating Junction Temperature Range T S Storage Temperature Range R JA Thermal Resistance: Junction to Ambient 90 °C/W Thermal Considerations Notes:

1 Current waveform in µs

2 Voltage waveform in µs

• Peak pulse current rating (I PP ) is repetitive and guaranteed for the life of the product. - I PP - The device must initially be in thermal equilibrium with -40°C < T J -40- 20 02 04 06 08 01 00 1201 40 160 Junction Temperature (T J ) – °C Percent of V S Change – % 25 °C 25°C Case Temperature (T C ) - ºC 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -40- 20 02 04 06 08 01 00 1201 40 160 Ratio of I H I H C = 25ºC) Normalized V S Change vs. Junction Temperature Normalized DC Holding Current vs. Case Temperature I H I T I S I DRM V DRM V T +V-V V S 100 t r t d Peak Value Half Value t – Time (µs ) I PP – Peak Pulse Current – %I PP t r = rise time to peak v alue t d = decay time to half value Waveform = t r x t d V-I Characteristics t r x t d Pulse Waveform Rev : www.leiditech.com 01.06.2018 3/10

Figure 5. Test circuit 3 for dynamic I 1/ Adjust the current level at the Iv alue by short circuiting the AK of the D.U.T. 3/ The D.U.T.w ill come back off-state within 50ms maximum.

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Soldering Parameters Lead Material Copper Alloy Terminal Finish1 00% Matte-Tin Plated Body Material High Temp Voltage Blocking 80% Rated V DRM AC Peak 504 or 1008 hrs. MIL-STD-750 (Method 1040) JEDEC, JESD22-A-101 Temp Cycling cycles. MIL-STD-750 (Method 1051) EIA/JEDEC, JESD22-A104 Biased Temp & Humidity 52 V DC JEDEC, JESD22-A-101 High Temp Storage JEDEC, JESD22-A-101 Low Temp Storage -65°C, 1008 hrs. Thermal Shock 10 cycles. MIL-STD-750 (Method 1056) JEDEC, JESD22-A-106 Autoclave (Pressure Cooker Test) JEDEC, JESD22-A-102 Resistance to Solder Heat Moisture Sensitivity Level Pb-Free assembly (see Fig. 1) Pre Heat - Temperature Min (T s(min) - Temperature Max (T s(max) - Time (Min to Max) (t s 60-180 secs. Average ramp up rate (Liquidus Temp (T L to peak) 3°C/sec. Max. T S(max) to T L - Ramp-up Rate 3°C/sec. Max. - Temperature (T L ) (Liquidus) - Temperature (t L 60-150 secs. Peak Temp (T P Time within 5°C of actual Peak Temp (t p ) 30 secs. Max. Ramp-down Rate 6°C/sec. Max. Time 2 5°C to Peak Temp (T P ) 8 min. Max. Do not exceed Time erutarep meT T P T L T S(max) T S(min) t P t L t S time to peak temperature (t 25ºC to peak) Ramp-down Ramp-up Preheat Critical Zone T L to T P Figure 1 Rev : www.leiditech.com 01.06.2018 7/10

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Dimensions Dimensions Millimeters InchesRef. Min. A B C D E F G 4.25 2.50 1.35 0.76 4.93 0.15 0.051 A B DO-214AC (SMA) D E F G H H 1.98 Max. 4.65 2.90 1.65 1.52 5.28 0.203 0.31 2.41 Min. 0.167 0.098 0.053 0.030 0.194 0.002 0.006 0.078 Max. 0.183 0.114 0.065 0.060 0.208 0.008 0.012 0.095 K J J K 6.50 L 1.70 2.30 0.256 0.067 0.090 L Dimensions Millimeters InchesRef. Min. A B C D E F G 4.25 3.30 1.85 0.76 5.08 0.15 0.051 A B DO-214AA (SMB) C D E F G H H 2.11 Max. 4.75 3.94 2.21 1.52 5.59 0.203 0.31 2.44 Min. 0.167 0.130 0.073 0.030 0.200 0.002 0.006 0.083 Max. 0.187 0.155 0.087 0.060 0.220 0.008 0.012 0.096 K J L J K 6.80 L 2.40 2.60 0.270 0.090 0.100 Rev : www.leiditech.com 01.06.2018 8/10

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Dimensions Dimensions Millimeters InchesRef. Min. A B C D E F G 5.75 6.90 2.75 0.95 7.70 0.15 0.051 B A DO-214AB (SMC) C D E F G H H 2.15 Max. 6.25 7.40 3.25 1.52 8.20 0.203 0.31 2.62 Min. 0.226 0.272 0.108 0.037 0.303 0.002 0.006 0.085 Max. 0.246 0.291 0.128 0.060 0.323 0.008 0.012 0.103 J L J K 2.40 L 3.30 4.20 0.094 0.130 0.165 J K Rev : www.leiditech.com 01.06.2018 9/10

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Pa c king Options Pa r t Number ing Industry Standar d S D O-21 4AA T ape & R eel Pa ck 25 00 N/A EIA-48 1- D CONSTRUCTION VA RIABLE I PP RATING TYPE P = LOGO P MED IA N VOL TA GE PACKAGE TYPE xxx 0S C Pa r t Mar king Pxxxx Part Marking Cod e (Refer to Electrical Characteristics T able) 0.472 (1 2.0) 0.36 (9.2) 0.3 15 (8.0) 0.1 57 (4.0) 0.49 (1 2.4) 0.512 (13.0) Arbor Hole Dia. 1 2.99 (330.0) Dimensions are in inc hes (and millimeter s). Direction of F eed 0.059 DIA(1 .5) Co ver tape Shanghai Leiditech Electronic Co.,Ltd Email: sale1@leiditech.com Tel : +86- 021 50828806 Fax : +86- 021 50477059 Rev : www.leiditech.com 01.06.2018 10/10