P0900SC

P0060SA LEIDITECH

Document overview

• Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

P0060~P3500SA_B_C Series are low capacitance devices designed to protect broadband equipment such as VOIP, DSL modems and DSLAMs from damaging overvoltage transients. The series provides a surface mount solution that enables equipment to comply with global regulatory standards while limiting the impact to broadband signals. P0060~P3500SA_B_C Series Thyristor Surge Suppressors

• Low voltagr overeshoot
• Low on-state voltage
• Does not degrade with use
• Fails short circuit when surged in excess of ratings
• Low Capacitance

Description

Electrical Characteristics

V DRM I DRM =5µA V S 100V/µS V T I T =2.2Amps I S I T I H Capacitance @1MHz, 2V bias V min V max V max mA max A max mA min pF min pF max P0060SA 6 25 4 800 2.2 50 25 150 P0080SA 6 25 4 800 2.2 50 25 150 P0220SA 15 32 4 800 2.2 50 25 150 P0300SA 25 40 4 800 2.2 50 15 140 P0640SA 58 77 4 800 2.2 150 40 60 P0720SA 65 88 4 800 2.2 150 35 60 P0900SA 75 98 4 800 2.2 150 25 55 P1100SA 90 130 4 800 2.2 150 30 50 P1300SA 120 160 4 800 2.2 150 25 45 P1500SA 140 180 4 800 2.2 150 25 45 P1800SA 170 220 4 800 2.2 150 25 50 P2300SA 190 260 4 800 2.2 150 30 50 P2600SA 220 300 4 800 2.2 150 25 50 P3100SA 275 350 4 800 2.2 150 20 45 P3500SA 320 400 4 800 2.2 150 20 45 Applicable Global Standards

• TIA-968-A
• ITU K.20/21 Enhanced level*
• ITU K.20/21 Basic Level
• GR 1089 Inter building*
• GR 1089 Inter building
• IEC 6100-4-5
• YD/T 1082
• YD/T 993
• YD/T 950

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Part Number V DRM I DRM =5µA V S 100V/µS V T I T =2.2Amps I S I T I H Capacitance @1MHz, 2V bias V min V max V max mA max A max mA min pF min pF max P0060SB 6 15 4 800 2.2 50 25 80 P0080SB 6 25 4 800 2.2 50 25 80 P0220SB 15 32 4 800 2.2 50 25 100 P0300SB 25 40 4 800 2.2 50 15 140 P0640SB 58 77 4 800 2.2 150 40 80 P0720SB 65 88 4 800 2.2 150 35 75 P0900SB 75 98 4 800 2.2 150 35 70 P1100SB 90 130 4 800 2.2 150 30 70 P1300SB 120 160 4 800 2.2 150 25 70 P1500SB 140 180 4 800 2.2 150 25 70 P1800SB 170 220 4 800 2.2 150 25 70 P2300SB 190 260 4 800 2.2 150 20 70 P2600SB 220 300 4 800 2.2 150 25 70 P3100SB 275 350 4 800 2.2 150 20 65 P3500SB 320 400 4 800 2.2 150 20 55 V DRM I DRM =5µA V S 100V/µS V T I T =2.2Amps I S I T I H Capacitance @1MHz, 2V bias V min V max V max mA max A max mA min pF min pF max P0060SC 6 15 4 800 2.2 50 45 100 P0080SC 6 25 4 800 2.2 50 45 100 P0220SC 15 32 4 800 2.2 50 30 110 P0300SC 25 40 4 800 2.2 50 25 80 P0640SC 58 77 4 800 2.2 150 55 155 P0720SC 65 88 4 800 2.2 150 50 150 P0900SC 75 98 4 800 2.2 150 45 140 P1100SC 90 130 4 800 2.2 150 45 115 P1300SC 120 160 4 800 2.2 150 40 115 P1500SC 140 180 4 800 2.2 150 35 110 P1800SC 170 220 4 800 2.2 150 35 110 P2300SC 190 260 4 800 2.2 150 30 120 P2600SC 220 300 4 800 2.2 150 30 120 P3100SC 275 350 4 800 2.2 150 30 110 P3500SC 320 400 4 800 2.2 150 25 110

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Series I PP I TSM 50/60 H z di/dt 2x10 µs 8x20 µs 10x160 µs 10x560 µs 10x1000 µs A min A/μs maxA min A min A min A min A min A 150 150 90 50 45 20 500 B 250 250 150 100 80 30 500 C 500 400 200 150 100 50 500 Surge Ratings PackageS ymbolP arameter ValueU nit DO-214AA T J Operating Junction Temperature Range T S Storage Temperature Range R JA Thermal Resistance: Junction to Ambient 90 °C/W Thermal Considerations Notes:

1 Current waveform in µs

2 Voltage waveform in µs

• Peak pulse current rating (I PP ) is repetitive and guaranteed for the life of the product. - I PP - The device must initially be in thermal equilibrium with -40°C < T J -40- 20 02 04 06 08 01 00 1201 40 160 Junction Temperature (T J ) – °C Percent of V S Change – % 25 °C 25°C Case Temperature (T C ) - ºC 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -40- 20 02 04 06 08 01 00 1201 40 160 Ratio of I H I H C = 25ºC) Normalized V S Change vs. Junction Temperature Normalized DC Holding Current vs. Case Temperature I H I T I S I DRM V DRM V T +V-V V S 100 t r t d Peak Value Half Value t – Time (µs ) I PP – Peak Pulse Current – %I PP t r = rise time to peak v alue t d = decay time to half value Waveform = t r x t d V-I Characteristics t r x t d Pulse Waveform

Figure 5. Test circuit 3 for dynamic I 1/ Adjust the current level at the Iv alue by short circuiting the AK of the D.U.T. 3/ The D.U.T.w ill come back off-state within 50ms maximum.

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Soldering Parameters Lead Material Copper Alloy Terminal Finish1 00% Matte-Tin Plated Body Material High Temp Voltage Blocking 80% Rated V DRM AC Peak 504 or 1008 hrs. MIL-STD-750 (Method 1040) JEDEC, JESD22-A-101 Temp Cycling cycles. MIL-STD-750 (Method 1051) EIA/JEDEC, JESD22-A104 Biased Temp & Humidity 52 V DC JEDEC, JESD22-A-101 High Temp Storage JEDEC, JESD22-A-101 Low Temp Storage -65°C, 1008 hrs. Thermal Shock 10 cycles. MIL-STD-750 (Method 1056) JEDEC, JESD22-A-106 Autoclave (Pressure Cooker Test) JEDEC, JESD22-A-102 Resistance to Solder Heat Moisture Sensitivity Level Pb-Free assembly (see Fig. 1) Pre Heat - Temperature Min (T s(min) - Temperature Max (T s(max) - Time (Min to Max) (t s 60-180 secs. Average ramp up rate (Liquidus Temp (T L to peak) 3°C/sec. Max. T S(max) to T L - Ramp-up Rate 3°C/sec. Max. - Temperature (T L ) (Liquidus) - Temperature (t L 60-150 secs. Peak Temp (T P Time within 5°C of actual Peak Temp (t p ) 30 secs. Max. Ramp-down Rate 6°C/sec. Max. Time 2 5°C to Peak Temp (T P ) 8 min. Max. Do not exceed Time erutarep meT T P T L T S(max) T S(min) t P t L t S time to peak temperature (t 25ºC to peak) Ramp-down Ramp-up Preheat Critical Zone T L to T P Figure 1

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Pa c king Options Pa r t Number ing Industry Standar d S D O-21 4AA T ape & R eel Pa ck 25 00 N/A EIA-48 1- D Dimensions — DO-214AA 0.079 (2.0) 0.110 (2.8) 0.079 (2.0) P ad Outline H K E F G A C B D Case T emperature Measurement P oint in ch (millimeter ) Dimensions Inc hes Millimete rs Mi nM ax Min Max A 0.1 30 0.1 56 3.30 3.95 B 0.2 01 0.220 5.1 0 5.60 C 0.077 0.087 1 .95 2.20 D 0.1 59 0.1 81 4.05 4.60 E 0.030 0.063 0.75 1 .60 F 0.075 0.096 1 .90 2.45 G 0. 00 2 0.0 08 0.05 0.20 H 0.077 0. 10 4 1 .95 2.65 K 0.0 06 0. 01 6 0.1 5 0.41 CONSTRUCTION VA RIABLE I PP RATING TYPE P = LOGO P MED IA N VOL TA GE PACKAGE TYPE xxx 0S C Pa r t Mar king Pxxxx Part Marking Cod e (Refer to Electrical Characteristics T able) 0.472 (1 2.0) 0.36 (9.2) 0.3 15 (8.0) 0.1 57 (4.0) 0.49 (1 2.4) 0.512 (13.0) Arbor Hole Dia. 1 2.99 (330.0) Dimensions are in inc hes (and millimeter s). Direction of F eed 0.059 DIA(1 .5) Co ver tape

Thyristor Surge Suppressors P0060~P3500SA_B_C Series Phone: +86- 021-50827201 Email:sale1@leiditech.com http://www.leiditech.com SHANGHAI LEIDITECH ELECTRONICS TECHNOLOGY CO., LTD