NA950A1MPWTSEP

INA950-SEP TI

Document overview

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• PDF pages: 33

Technical content

INA950-SEP 2.7V to 80V, 1.1MHz, Ultra-Precise, Current-Sense Amplifier

1 Features

• VID V62/25635
• Radiation - Total Ionizing Dose (TID): – TID performance assurance up to 30krad(Si) – Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
• Radiation - Single-Event Effects (SEE): – Single Event Latch-Up (SEL) immune up to 43MeV-cm2 /mg at 125°C – Single Event Transient (SET) characterized up to LET = 47.5MeV-cm2 /mg
• Space Enhanced Plastic – Operating temperature from –55°C to +125°C – Controlled baseline – Au bondwire and NiPdAu lead finish – Outgassing test performed per ASTM E595 – One fabrication, assembly, and test site – Extended product life cycle – Product traceability
• Wide common-mode voltage: – Operational voltage: 2.7V to 80V – Survival voltage: −20V to 85V
• Excellent CMRR: – 160dB DC – 85dB AC at 50kHz
• Gain of 20V/V – Gain error: ±0.1% (maximum) – Gain drift: ±1.5ppm/°C
• Offset voltage: ±12µV (maximum)
• Offset drift: ±0.05µV/°C
• High bandwidth: 1.1MHz
• Slew rate: 2V/µs
• Quiescent current: 370µA

2 Applications

• Satellite electrical power system (EPS)
• Command and data handling (C&DH)
• Radar imaging payload
• Communications payload ADC IN+ IN± OUT VBUS Buffer Current Feedback VS GND RL Bias Load RSENSE ISENSE Typical Application INA950-SEP SBOSAK8 – MARCH 2025 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

3 Description

The INA950-SEP is an ultra-precise, current-sense amplifier that can measure voltage drops across shunt resistors over a wide common-mode range from 2.7V to 80V. The ultra-precise current measurement accuracy is achieved thanks to the combination of an ultra-low offset voltage of ±12µV (maximum), a small gain error of ±0.1% (maximum), and a high DC CMRR of 160dB (typical). The INA950-SEP is not only designed for DC current measurement, but also for high-speed applications (such as fast overcurrent protection, for example) with a high bandwidth of 1.1MHz and an 85dB AC CMRR (at 50kHz). The INA950-SEP provides the capability to make ultra-precise current measurements by sensing the voltage drop across a shunt resistor over a wide common- mode range from 2.7V to 80V. The INA950-SEP is available in the TSSOP-8 package. The INA950-SEP operates from a single 2.7V to 5.5V supply while only drawing 370µA from the supply (typical). The low offset of the zero-drift architecture enables current sensing with low ohmic shunts as specified over the operating temperature range (−55°C to 125°C).

Package Information

PART NUMBER PACKAGE(1) PACKAGE SIZE(2) INA950-SEP PW (TSSOP, 8) 3.00mm × 4.4mm (1) The package size (length × width) is a nominal value and includes pins, where applicable. (2) For more information, see Section 10. INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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10 Mechanical, Packaging, and Orderable

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4 Pin Configuration and Functions

N.C. Figure 4-1. INA950-SEP: PW Package 8-Pin TSSOP Top View Table 4-1. Pin Functions: INA950-SEP PIN TYPE DESCRIPTION NAME NO. GND 1 Ground Ground IN– 2 Input Connect to load side of shunt resistor. IN+ 3 Input Connect to supply side of shunt resistor. N.C. 4,6,7 - No internal connection. OUT 8 Output Output voltage VS 5 Power Power supply INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Vs Supply voltage –0.3 6 V VIN+, VIN– (2) Analog inputs, differential (VIN+) – (VIN–) –30 30 V Analog inputs, common mode (VIN+ or VIN-) –20 90 VOUTx Analog outputs, output voltage GND – 0.3 Vs + 0.3 V TA Operating temperature –55 150 °C TJ Junction temperature 150 °C Tstg Storage temperature –65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime (2) VIN+ and VIN– are the voltages at the VIN+ and VIN– pins, respectively.

5.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VCM Common-mode input range(1) VS 48 80 V VS Operating supply range 2.7 5.5 V TA Ambient temperature –55 125 °C (1) Common-mode voltage can go below VS under certain conditions. See Minimum Common-Mode Voltage vs Supply or additional information on operating range.

5.4 Thermal Information

THERMAL METRIC(1) INA950-SEP UNITPW (TSSOP)

8 PINS

RθJA Junction-to-ambient thermal resistance 161.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 70.5 °C/W RθJB Junction-to-board thermal resistance 100.8 °C/W ΨJT Junction-to-top characterization parameter 10.4 °C/W ΨJB Junction-to-board characterization parameter 99.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note. www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: INA950-SEP

5.5 Electrical Characteristics

at TA = 25°C, VS = 5V, VSENSE = VIN+ – VIN– = 0.5V / Gain, VCM = VIN– = 48V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT CMRR Common-mode rejection ratio VCM = 2.7V to 80V, TA = –55°C to +125°C 140 160 dB f = 50kHz 85 Vos Offset voltage, input referred ±6 ±25 µV dVos/dT Offset voltage drift TA = –55°C to +125°C ±0.05 µV/℃ PSRR Power supply rejection ratio, input referred VS = 2.7V to 5.5V, TA = –55°C to +125°C ±0.05 ±0.5 µV/V IB Input bias current IB+, VSENSE = 0mV, VCM = 80V, TA = –55°C to +125°C 10 20 30 µA IB–, VSENSE = 0mV, VCM = 80V, TA = –55°C to +125°C 10 20 30 µA OUTPUT G Gain 20 V/V Gain error GND + 50mV ≤ VOUT ≤ VS – 200mV ±0.02 ±0.1 % Gain error drift TA = –55°C to +125°C ±1.5 ppm/°C Nonlinearity error 0.01 % Maximum capacitive load No sustained oscillations, no isolation resistor 500 pF VOLTAGE OUTPUT Swing to VS power supply rail RLOAD = 10kΩ, TA = –55°C to +125°C VS – 0.07 VS – 0.2 V Swing to ground RLOAD = 10kΩ, VSENSE = 0V, TA = –55°C to +125°C 0.005 0.025 V FREQUENCY RESPONSE BW Bandwidth CLOAD = 5pF, VSENSE = 200mV 1100 kHz SR Slew rate 2 V/µs Settling time VOUT = 4V ± 0.1V step, output settles to 0.5% 9 µs VOUT = 4V ± 0.1V step, output settles to 1% 5 NOISE Ven Voltage noise density 50 nV/√Hz POWER SUPPLY VS Supply voltage TA = –55°C to+125°C 2.7 5.5 V IQ Quiescent current 370 500 µA TA = –55°C to +125°C 600 INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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5.6 Typical Characteristics

All specifications at TA = 25°C, VS = 5V, VSENSE = VIN+ – VIN– = 0.5V / Gain, and VCM = VIN– = 48V (unless otherwise noted). Input Offset Voltage (PV) Population -7.5 -2.5 2.5 7.5 12.5 17.5 Figure 5-1. Input Offset Production Distribution Temperature (C) Input Offset Voltage (V) -75 -50 -25 0 25 50 75 100 125 150 175 Figure 5-2. Input Offset Voltage vs. Temperature Figure 5-3. Common-Mode Rejection Ratio vs. Temperature Frequency (Hz) Common-Mode Rejection Ratio (dB) 100 120 140 160 180 10 100 1k 10k 100k 1M SPACE Figure 5-4. Common-Mode Rejection Ratio vs. Frequency Frequency (Hz) Gain (dB) -20 -10 10 100 1k 10k 100k 1M 10M VSENSE = 4V / Gain Figure 5-5. Gain vs. Frequency Temperature (C) Gain Error (%) -75 -50 -25 0 25 50 75 100 125 150 175 -0.05 -0.02 0.00 0.03 0.05 Figure 5-6. Gain Error vs. Temperature www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: INA950-SEP

5.6 Typical Characteristics (continued)

All specifications at TA = 25°C, VS = 5V, VSENSE = VIN+ – VIN– = 0.5V / Gain, and VCM = VIN– = 48V (unless otherwise noted). Temperature (C) Power-Supply Rejection Ratio (nV/V) -75 -50 -25 0 25 50 75 100 125 150 175 -80 -70 -60 -50 -40 -30 -20 -10 Figure 5-7. Power-Supply Rejection Ratio vs. Temperature Frequency (Hz) Power-Supply Rejection Ratio (dB) 100 120 140 160 10 100 1k 10k 100k 1M SPACE Figure 5-8. Power-Supply Rejection Ratio vs. Frequency Common-Mode Voltage (V) Input Bias Current (A) -20 -10 0 10 20 30 40 50 60 70 80 VS = 5V VS = 2.7V VS = 0V VSENSE = 0V Figure 5-9. Input Bias Current vs. Common-Mode Voltage Temperature (C) Input Bias Current (A) -75 -50 -25 0 25 50 75 100 125 150 175 VS = 2.7 to 5V, VCM = 2.7V VS = 0V, VCM = 48V Figure 5-10. Input Bias Current vs. Temperature VSENSE (mV) Input Bias Current (PA) 0 200 400 600 800 1000 -160 -120 -80 -40 120 160 200 240 IB+ IB- IB+, VS = 0V IB-, VS = 0V Figure 5-11. Input Bias Current vs. VSENSE Output Current (mA) 0 5 10 15 20 25 30 35 40 GND GND + 1 GND + 2 VS VS - 1 VS - 2 Output Voltage (V) 25qC 125qC -40qC VS = 2.7V Figure 5-12. Output Voltage vs. Output Current INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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All specifications at TA = 25°C, VS = 5V, VSENSE = VIN+ – VIN– = 0.5V / Gain, and VCM = VIN– = 48V (unless otherwise noted). Output Current (mA) 0 5 10 15 20 25 30 35 40 GND GND + 1 GND + 2 GND + 3 VS VS - 1 VS - 2 VS - 3 Output Voltage (V) 25qC 125qC -40qC VS = 5V Figure 5-13. Output Voltage vs. Output Current Temperature (C) Short Circuit Current (mA) -75 -50 -25 0 25 50 75 100 125 150 175 VS = 5V, Sourcing VS = 5V, Sinking VS = 2.7V, Sourcing VS = 2.7V, Sinking SPACE Figure 5-14. Short-Circuit Current vs. Temperature Frequency (Hz) Output Impedance (:) 0.01 0.02 0.05 0.1 0.2 0.5 100 200 500 1000 10 100 1k 10k 100k 1M 10M SPACE Figure 5-15. Output Impedance vs. Frequency Temperature (C) Swing to VS (V) -75 -50 -25 0 25 50 75 100 125 150 175 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 VS = 5V VS = 2.7V RL = 10kΩ Figure 5-16. Swing to Supply vs. Temperature Temperature (C) Swing to GND (V) -75 -50 -25 0 25 50 75 100 125 150 175 0.000 0.005 0.010 0.015 0.020 VS = 5V VS = 2.7V RL = 10kΩ Figure 5-17. Swing to GND vs. Temperature Frequency (Hz) Input-Referred Voltage Noise (nV/Hz) 100 10 100 1k 10k 100k 1M SPACE Figure 5-18. Input-Referred Noise vs. Frequency www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: INA950-SEP

All specifications at TA = 25°C, VS = 5V, VSENSE = VIN+ – VIN– = 0.5V / Gain, and VCM = VIN– = 48V (unless otherwise noted). Time (1 s/div) Referred-to-Input Voltage Noise (200 nV/div) Figure 5-19. Input-Referred Noise Output Voltage (V) Quiescent Current (A) 0 2.5 5 175 200 225 250 275 300 325 350 375 400 VS = 5V VS = 2.7V Figure 5-20. Quiescent Current vs. Output Voltage Temperature (C) Quiescent Current (A) -75 -50 -25 0 25 50 75 100 125 150 175 300 325 350 375 400 425 VS = 5V VS = 2.7V Figure 5-21. Quiescent Current vs. Temperature Supply Voltage (V) Quiescent Current (PA) 0 2 4 6 8 10 12 14 16 18 20 300 325 350 375 400 425 25qC 125qC -40qC Figure 5-22. Quiescent Current vs. Supply Voltage Common-Mode Voltage (V) Quiescent Current (A) -55 -35 -15 5 25 45 65 85 105 125 300 325 350 375 400 425 VS = 5V VS = 2.7V Figure 5-23. Quiescent Current vs. Common-Mode Voltage Time (5 Ps/div) Voltage (1 V/div) Supply Voltage Output Voltage VSENSE = 0mV Figure 5-24. Start-Up Response INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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6 Detailed Description

6.1 Overview

The INA950-SEP is a high-side only current-sense amplifier that offers a wide common-mode range, precision zero-drift topology, excellent common-mode rejection ratio (CMRR), high bandwidth, and fast slew rate. Different gain versions are available to optimize the output dynamic range based on the application. The INA950-SEP is designed using a transconductance architecture with a current-feedback amplifier that enables low bias currents of 20µA and a common-mode voltage of 80V.

6.2 Functional Block Diagram

IN± OUT VBUS Buffer Current Feedback VS GND RL Bias Load RSENSE ISENSE www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: INA950-SEP

6.3 Feature Description

6.3.1 Amplifier Input Common-Mode Range

The INA950-SEP supports large input common-mode voltages from 2.7V to 80V and features a high DC CMRR of 160dB (typical) and a 85dB AC CMRR at 50kHz. The minimum common-mode voltage as shown in Figure 6-1 is restricted by the supply voltage. The topology of the internal amplifiers INA950-SEP restricts operation to high-side, current-sensing applications. Supply Voltage (V) Minimum Common-Mode Input Voltage (V) 0 2.5 5 VCM = 2.7V Figure 6-1. Minimum Common-Mode Voltage vs. Supply

6.3.2 Input-Signal Bandwidth

Figure 5-5 shows the INA950-SEP –3dB bandwidth for the INA950-SEP. High bandwidth provides the throughput and fast response required for rapid detection and processing of overcurrent events. The device bandwidth also depends on the applied V SENSE voltage. Figure 6-2 shows the bandwidth performance profile of the device over frequency as output voltage increases. As shown in Figure 6-2 , the device exhibits the highest bandwidth with higher VSENSE voltages. Output Voltage (V) Bandwidth (kHz) 0 0.5 1 1.5 2 2.5 3 3.5 4 200 300 400 500 600 700 800 900 1000 1100 1200 G = 20 Figure 6-2. Bandwidth vs Output Voltage INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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6.3.3 Low Input Bias Current

The INA950-SEP input bias current draws 20μA (typical) even with common-mode voltages as high as 80V. This current enables precision current sensing in applications where the sensed current is small or in applications that require lower input leakage current.

6.3.4 Low VSENSE Operation

The INA950-SEP enables accurate current measurement across the entire valid V SENSE range. The zero-drift input architecture of the INA950-SEP provides the low offset voltage and low offset drift required to measure low V SENSE levels accurately across the wide operating temperature of –55°C to +125°C. The capability to measure low sense voltages enables accurate measurements at lower load currents, and also allows reduction of the sense resistor value for a given operating current, which minimizes the power loss in the current-sensing element.

6.3.5 Wide Fixed-Gain Output

The INA950-SEP gain error is < 0.1% at room temperature for most gain options, with a maximum drift of 5ppm/°C over the full temperature range of –55°C to +125°C. The INA950-SEP closed-loop gain is set by a precision, low-drift internal resistor network. The ratio of these resistors are excellently matched, although the absolute values can vary significantly. TI does not recommend adding additional resistance around the INA950-SEP to change the effective gain because of this variation. Table 6-1 describes the typical values of the internal gain resistors seen in the functional diagram above. Table 6-1. Fixed Gain Resistors GAIN R1 RL 20 (V/V) 25kΩ 500kΩ www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: INA950-SEP

6.4 Device Functional Modes

6.4.1 Unidirectional Operation

The INA950-SEP measures the differential voltage developed by current flowing through a resistor that is commonly referred to as a current-sensing resistor or a current-shunt resistor. Figure 6-3 shows that the INA950- SEP operates in unidirectional mode only, meaning the device only senses current sourced from a power supply to a system load. Buffer Current Feedback RL Bias 48-V Supply Load IN+ IN– RSENSE OUT GND ISENSE Figure 6-3. Unidirectional Application The linear range of the output stage is limited to how close the output voltage can approach ground under zero-input conditions. The zero current output voltage of the INA950-SEP is very small, with a maximum of GND + 25mV. Apply a sense voltage of (25mV / Gain) or greater to keep the INA950-SEP output in the linear region of operation.

6.4.2 High Signal Throughput

With a bandwidth of 1.1MHz at a gain of 20V/V and a slew rate of 2V/µs, the INA950-SEP is specifically designed for detecting and protecting applications from fast inrush currents. As shown in Table 6-2, the INA950- SEP responds in less than 2µs for a system measuring a 75A threshold on a 2mΩ shunt. Table 6-2. Response Time PARAMETER EQUATION Value VS Supply Voltage 5V G Gain 20V/V IMAX Maximum current 100A IThreshold Threshold current 75A RSENSE Current sense resistor value 2mΩ VOUT_MAX Output voltage at maximum current VOUT = IMAX × RSENSE × G 4V VOUT_THR Output voltage at threshold current VOUT_THR = ITHR × RSENSE × G 3V SR Slew rate 2V/µs Output response time Tresponse = VOUT_THR / SR < 2µs INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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7 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

7.1 Application Information

The INA950-SEP amplifies the voltage developed across a current-sensing resistor as current flows through the resistor to the load. The wide input common-mode voltage range and high common-mode rejection of the INA950-SEP allows use over a wide range of voltage rails while still maintaining an accurate current measurement.

7.1.1 RSENSE and Device Gain Selection

The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow and reduces the error contribution of the offset voltage. However, there are practical limits as to how large the current-sense resistor can be in a given application because of the resistor size and maximum allowable power dissipation. Equation 1 gives the maximum value for the current-sense resistor for a given power dissipation budget: MAX SENSE 2 MAX PDR I (1) where:

• PDMAX is the maximum allowable power dissipation in RSENSE.
• IMAX is the maximum current that flows through RSENSE. An additional limitation on the size of the current-sense resistor and device gain results from the power-supply voltage, VS, and device swing-to-rail limitations. To verify that the current-sense signal is properly passed to the output, both positive and negative output swing limitations must be examined. Equation 2 provides the maximum values of RSENSE and GAIN to keep the device from exceeding the positive swing limitation. IMAX ª RSENSE ª*$,1< VSP (2) where:
• IMAX is the maximum current that flows through RSENSE.
• GAIN is the gain of the current-sense amplifier.
• VSP is the positive output swing as specified in this data sheet. To avoid positive output swing limitations when selecting the value of R SENSE, there is always a trade-off between the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for the maximum power dissipation is too large, then selecting a lower gain device is possible to avoid positive swing limitations. The negative swing limitation places a limit on how small the sense resistor value can be for a given application. Equation 3 provides the limit on the minimum value of the sense resistor. IMIN ª RSENSE ª*$,1> VSN (3) where: www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: INA950-SEP

• IMIN is the minimum current that flows through RSENSE.
• GAIN is the gain of the current-sense amplifier.
• VSN is the negative output swing of the device. Table 7-1 shows an example of the different results obtained from using five different gain versions of the INA950-SEP. From the table data, the highest gain device allows a smaller current-shunt resistor and decreased power dissipation in the element. Table 7-1. RSENSE Selection and Power Dissipation PARAMETER(1) EQUATION RESULTS VS Supply Voltage 5V G Gain 20V/V VSENSE Ideal differential input voltage (Ignores swing limitation and power- supply variation.) VSENSE = VOUT / G 250mV RSENSE Current-sense resistor value RSENSE = VSENSE / IMAX 25mΩ PSENSE Current-sense resistor power dissipation RSENSE x IMAX2 2.5 W (1) Design example with 10A, full-scale current with maximum output voltage set to 5V.

7.1.2 Input Filtering

Input filters are not required for accurate measurements using the INA950-SEP, and use of filters in this location is not recommended. If filter components are used on the input of the amplifier, follow the guidelines in this section to minimize the effects on performance. Based strictly on user design requirements, external filtering of the current signal can be desired. The initial location that can be considered for the filter is at the output of the current-sense amplifier. Although placing the filter at the output satisfies the filtering requirements, this location changes the low output impedance measured by any circuitry connected to the output voltage pin. The other location for filter placement is at the current-sense amplifier input pins. This location also satisfies the filtering requirement, but the components must be carefully selected to minimally impact device performance. Figure 7-1 shows a filter placed at the input pins. IN+ IN± OUT VCM Buffer Current Feedback VS GND RL Bias Load RSENSE ISENSE RIN RIN CIN f3dB = 4ŒRINCIN Figure 7-1. Filter at Input Pins External series resistance provides a source of additional measurement error, so keep the value of these series resistors to 10 Ω or less to reduce loss of accuracy. The internal bias network shown in Figure 7-1 creates a mismatch in input bias currents (see Section 5.6) when a differential voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, a mismatch is created in the voltage drop across the filter resistors. This voltage is a differential error voltage in the shunt resistor voltage. In addition to the INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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absolute resistor value, mismatch resulting from resistor tolerance can significantly impact the error because this value is calculated based on the actual measured resistance. Use Equation 4 to calculate the measurement error expected from the additional external filter resistors, and use Equation 5 to calculate the gain error factor. Gain Error (%) = 100 x (Gain Error Factor í1) (4) Gain Error Factor = RB × R1 (RB × R1) + (RB × RIN) + (2 × RIN × R1) (5) Where:

• RIN is the external filter resistance value.
• R1 is the INA950-SEP input resistance value specified in Table 6-1.
• RB in the internal bias resistance, which is 6600Ω ± 20%. The gain error factor, shown in Equation 4 , can be calculated to determine the gain error introduced by the additional external series resistance. Equation 4 calculates the deviation of the shunt voltage, resulting from the attenuation and imbalance created by the added external filter resistance. Table 7-2 provides the gain error factor and gain error for several resistor values. Table 7-2. Example Gain Error Factor and Gain Error for 10Ω External Filter Input Resistors DEVICE (GAIN) GAIN ERROR FACTOR GAIN ERROR (%) 20 0.99658 –0.34185

7.2 Typical Application

The INA950-SEP is a unidirectional, current-sense amplifier capable of measuring currents through a resistive shunt with shunt common-mode voltages from 2.7V to 80V. Figure 7-2 shows the circuit configuration for monitoring current in a high-side radio frequency (RF) power amplifier (PA) application. 54V RF Out RF DAC GND ADC Microprocessor INA950-SEP GND Figure 7-2. Current Sensing in a PA Application www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: INA950-SEP

7.2.1 Design Requirements

VSUPPLY is set to 5V and the common-mode voltage set to 54V. Table 7-3 lists the design setup for this application. Table 7-3. Design Parameters DESIGN PARAMETERS EXAMPLE VALUE INA950-SEP supply voltage 5V High-side supply voltage 5V Maximum sense current (IMAX) 5A Gain option 20V/V

7.2.2 Detailed Design Procedure

The maximum value of the current-sense resistor is calculated based on the choice of gain, value of the maximum current to be sensed (I MAX), and the power-supply voltage (V S). When operating at the maximum current, the output voltage must not exceed the positive output swing specification, V SP. Under the given design parameters, Equation 6 calculates the maximum value for RSENSE as 48mΩ. SP SENSE MAX VR < I GAINu (6) Although 45.3m Ω is less than the maximum value calculated, 45.3m Ω is selected for this design example because this value is still large enough to provide an adequate signal at the current-sense amplifier output and is a standard 1% value.

7.2.2.1 Overload Recovery With Negative VSENSE

The INA950-SEP is a unidirectional current-sense amplifier that is meant to operate with a positive differential input voltage (VSENSE). If negative V SENSE is applied, the device is placed in an overload condition and requires time to recover when VSENSE returns positive. The required overload recovery time increases with more negative VSENSE.

7.2.3 Application Curve

Figure 7-3 shows the output response of the device to a high-frequency sinusoidal current. Time (10s/div) INA950 VOUT (0.4 V/div) VSENSE (20 mV/div) Figure 7-3. INA950-SEP Output Response INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

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7.3 Power Supply Recommendations

The input circuitry of the INA950-SEP can accurately measure beyond the power-supply voltage. The power supply can be 5.5V, whereas the load power-supply voltage at IN+ and IN– can go up to 80V. The output voltage range of the OUT pin is limited by the voltage on the VS pin and the device swing to the supply specification.

7.4 Layout

7.4.1 Layout Guidelines

TI always recommends to follow good layout practices:

• Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing of the current-sensing resistor commonly results in additional resistance present between the input pins. Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can cause significant measurement errors.
• Place the power-supply bypass capacitor as close to the device power supply and ground pins as possible. The recommended value of this bypass capacitor is 0.1µF. Additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies.
• When routing the connections from the current-sense resistor to the device, keep the trace lengths as short as possible.

7.4.2 Layout Examples

N.C. IN– N.C. Current Sense Output VSN.C. RSHUNT Load VIA to Ground Plane Power Supply, VS: 2.7V to 5.5V CBYPASS 81GND OUT 3IN+ Direction of Current Flow Bus Voltage VIA to Ground Plane Figure 7-4. Recommended Layout for the INA950-SEP www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: INA950-SEP

8 Device and Documentation Support

8.1 Documentation Support

8.1.1 Related Documentation

For related documentation, see the following:

• Texas Instruments, INA950-SEP Production Flow and Reliability Report radiation report
• Texas Instruments, INA950-SEP Total Ionizing Dose (TID) Report radiation report
• Texas Instruments, INA950-SEP Single-Event Effects (SEE) Radiation Test Report radiation report

8.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

8.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

8.4 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

8.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

9 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES March 2025 * Initial Release

10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

20 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: INA950-SEP

10.1 Mechanical Data

www.ti.com PACKAGE OUTLINE C TYP6.66.2

1.2 MAX

6X 0.65 8X 0.300.192X1.95 0.150.05 (0.15) TYP 0- 80.25GAGE PLANE0.750.50 A NOTE 33.12.9B NOTE 44.54.3 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008ASMALL OUTLINE PACKAGE 1 8 0.1CAB54 PIN 1 IDAREASEATING PLANE0.1C SEE DETAIL A TYPICALDETAIL A SCALE 2.800 www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: INA950-SEP

www.ti.com EXAMPLE BOARD LAYOUT (5.8) 0.05 MAXALL AROUND0.05 MINALL AROUND 8X (1.5)8X (0.45) 6X (0.65) (R)TYP0.05 4221848/A 02/2015 SYMM TSSOP - 1.2 mm max heightPW0008ASMALL OUTLINE PACKAGE SYMM LAND PATTERN EXAMPLESCALE:10X 4 58 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASKOPENING NON SOLDER MASKDEFINEDNOT TO SCALESOLDER MASK DETAILS SOLDER MASKOPENINGMETAL UNDERSOLDER MASK SOLDER MASKDEFINED INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

22 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: INA950-SEP

www.ti.com EXAMPLE STENCIL DESIGN (5.8)6X (0.65) 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008ASMALL OUTLINE PACKAGE SYMMSYMM1 4 58 BASED ON 0.125 mm THICK STENCILSOLDER PASTE EXAMPLESCALE:10X www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: INA950-SEP

Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead finish/ Ball material(6) MSL Peak Temp(3) Op Temp (°C) Device Marking(4) (5) NA950A1MPW TSEP PRE_PROD TSSOP PW 8 250 RoHS & Green NIPDAU Level-3-260C-1 68 HR -55°C - 125°C 950SEP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

24 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: INA950-SEP

10.2 Tape and Reel Information

Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant INA950A1MPWTSEP TSSOP PW 8 250 180 12.4 7 3.6 1.6 8 12 Q1 www.ti.com INA950-SEP SBOSAK8 – MARCH 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: INA950-SEP

TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) NA950A1MPWTSEP TSSOP PW 8 250 210 185 35 INA950-SEP SBOSAK8 – MARCH 2025 www.ti.com

26 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated

Product Folder Links: INA950-SEP

www.ti.com 7-Mar-2025 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples INA950A1MPWTSEP ACTIVE TSSOP PW 8 250 RoHS & Green NIPDAU Level-3-260C-168 HR -55 to 125 950SEP Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 8-Mar-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 8-Mar-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA950A1MPWTSEP TSSOP PW 8 250 210.0 185.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C TYP6.6 6.2 6X 0.65 8X 0.30 0.19 1.95 0.15 0.05 (0.15) TYP 0 - 8 0.25 GAGE PLANE 0.75 0.50 A NOTE 3 3.1 2.9 B NOTE 4 4.5 4.3 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. 1 8

0.1 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT (5.8)

0.05 MAX

0.05 MIN

8X (1.5) 8X (0.45) 6X (0.65) (R ) TYP 0.05 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE SYMM SYMM LAND PATTERN EXAMPLE SCALE:10X 4 5 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (5.8) 6X (0.65) 8X (0.45) 8X (1.5) (R ) TYP0.05 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 4 5 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X

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