NA322EA

INA322_16 TI1

Document overview

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Technical content

FEATURES

G LOW QUIESCENT CURRENT: 40µA/channel Shut Down: < 1µA G HIGH GAIN ACCURACY: G = 5, 0.07%, 2ppm/°C G GAIN SET WITH EXTERNAL RESISTORS G LOW BIAS CURRENT: 10pA G BANDWIDTH: 500kHz, G = 5V/V G RAIL-TO-RAIL OUTPUT SWING: (V+) – 0.02V G WIDE TEMPERATURE RANGE: –55°C to +125°C G SINGLE VERSION IN MSOP-8 PACKAGE AND DUAL VERSION IN TSSOP-14 PACKAGE microPower, Single-Supply, CMOS INSTRUMENTATION AMPLIFIER

DESCRIPTION

The INA322 family is a series of low cost, rail-to-rail output, micropower CMOS instrumentation amplifiers that offer wide- range, single-supply, as well as bipolar-supply operation. The INA322 family provides low-cost, low-noise amplification of differential signals with micropower current consumption of 40µA. When shutdown the INA322 has a quiescent current of less than 1µA. Returning to normal operations within microseconds, the shutdown feature makes the INA322 optimal for low-power battery or multiplexing applications.

APPLICATIONS

G INDUSTRIAL SENSOR AMPLIFIERS: Bridge, RTD, Thermistor, Position G PHYSIOLOGICAL AMPLIFIERS: ECG, EEG, EMG G A/D CONVERTER SIGNAL CONDITIONING G DIFFERENTIAL LINE RECEIVERS WITH GAIN G FIELD UTILITY METERS G PCMCIA CARDS G COMMUNICATION SYSTEMS G TEST EQUIPMENT G AUTOMOTIVE INSTRUMENTATION ®INA322 Configured internally for 5V/V gain, the INA322 offers excep- tional flexibility with user-programmable external gain resis- tors. The INA322 reduces common-mode error over fre- quency and with CMRR remaining high up to 3kHz, line noise and line harmonics are rejected. The low-power design does not compromise on bandwidth or slew rate, making the INA322 ideal for driving sampling Ana- log-to-Digital (A/D) converters as well as general-purpose applications. With high precision, low cost, and small packag- ing, the INA322 outperforms discrete designs, while offering reliability and performance. 160kΩ REF VIN– VIN+ 40kΩ 40kΩ Shutdown V+ VOUT VOUT = (VIN+ – VIN–) • Gain Gain = 5 + 5(R2/R1) R 2R 1 RG 160kΩ INA322 INA2322 SBOS174B – DECEMBER 2000 – REVISED FEBRUARY 2006 www.ti.com PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000-2006, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.

NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. ABSOLUTE MAXIMUM RATINGS (1) PIN CONFIGURATIONS Top View Shutdown A V OUT A REFA REFB V OUT B Shutdown B RGA VIN–A VIN+A VIN+B VIN–B RGB INA2322 Dual, TSSOP-14 (EA) RG VIN– VIN+ Shutdown V OUT REF INA322 MSOP-8 (EA) ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE PACKAGE PRODUCT PACKAGE-LEAD DESIGNATOR MARKING SINGLE INA322EA MSOP-8 DGK C22 DUAL INA2322EA TSSOP-14 PW INA2322EA NOTES: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. PACKAGE/ORDERING INFORMATION (1)

ELECTRICAL CHARACTERISTICS: V S = +2.7V TO +5.5V BOLDFACE limits apply over the specified temperature range, TA = –55°C TO +125°C At TA = +25°C, RL = 25kΩ , G = 25, and IA common = VS /2, unless otherwise noted. INA322EA INA2322EA PARAMETER CONDITION MIN TYP MAX UNITS INPUT Input Offset Voltage, RTI V S = +5V ±2 ±10 mV Over Temperature V OS ±11 mV vs Temperature dV OS /dT ±7 µV/°C vs Power Supply PSRR V S = +2.7V to +5.5V ±50 ±250 µV/V Over Temperature ±260 µV/V Long-Term Stability ±0.4 µV/month Input Impedance 1013 || 3 Ω || pF Input Common-Mode Range V S = 2.7V 0.35 1.5 V VS = 5V 0.55 3.8 V Common-Mode Rejection CMRR V S = 5V, VCM = 0.55V to 3.8V 60 73 dB Over Temperature V S = 5V, VCM = 0.55V to 3.8V 60 dB VS = 2.7V, VCM = 0.35V to 1.5V 73 dB Crosstalk, Dual 110 dB INPUT BIAS CURRENT Bias Current I B ±0.5 ±10 pA Offset Current I OS ±0.5 ±10 pA NOISE, RTI e n R S = 0Ω Voltage Noise: f = 10Hz 500 nV/ √Hz f = 100Hz 190 nV/ √Hz f = 1kHz 100 nV/ √Hz f = 0.1Hz to 10Hz 20 µVp-p Current Noise: f = 1kHz 3f A / √Hz GAIN (1) Gain Equation, Externally Set G > 5 G = 5 + 5(R2/R1) Range of Gain 5 1000 V/V Gain Error ±0.07 ±0.4 % vs Temperature G = 5 ±2 ±10 ppm/°C Nonlinearity G = 25, VS = 5V, VO = 0.05 to 4.95 ±0.001 ±0.010 % of FS Over Temperature ±0.002 ±0.015 % of FS OUTPUT Output Voltage Swing from Rail(2, 5) G ≥ 10 50 25 mV Over Temperature 50 mV Capacitance Load Drive See Typical Characteristic(3) pF Short-Circuit Current I SC – 8 ISC+ 16 mA FREQUENCY RESPONSE Bandwidth, –3dB BW G = 5 500 kHz Slew Rate SR V S = 5V, G = 25 0.4 V/ µs Settling Time, 0.1% t S G = 5, CL = 50pF, VO = 2V step 8 µs 0.01% 12 µs Overload Recovery 50% Input Overload G = 25 2 µs POWER SUPPLY Specified Voltage Range +2.7 +5.5 V Operating Voltage Range +2.5 to +5.5 V Quiescent Current per Channel I Q VSD > 2.5(4) 40 60 µA Over Temperature 70 µA Shutdown Quiescent Current/Chan ISD VSD < 0.8(4) 0.01 1 µA TEMPERATURE RANGE Specified Range –55 +125 °C Operating/Storage Range –65 +150 °C Thermal Resistance θJA MSOP-8, TSSOP-14 Surface Mount 150 °C/W NOTES: (1) Does not include errors from external gain setting resistors (2) Output voltage swings are measured between the output and power-supply rails. Output swings and rail only if G ≥ 10. (3) See typical characteristic Percent Overshoot vs Load Capacitance. (4) See typical characteristic Shutdown Voltage vs Supply Voltage. (5) Output does not swing to positive rail if gain is less than 10.

At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25kΩ , CL = 50pF, unless otherwise noted. GAIN vs FREQUENCY Gain (dB) Frequency (Hz) 100 1k 10k 100k 1M 10M –10 –20 Gain = 500 Gain = 100 Gain = 25 Gain = 5 COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR (dB) Frequency (Hz) 100 1k 10k 100k 120 100 POWER-SUPPLY REJECTION RATIO vs FREQUENCY PSRR (dB) Frequency (Hz) 10 100 1k 10k 100k 100 MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 100 Maximum Output Voltage (Vp-p) Frequency (Hz) 1k 10k 100k 1M 10M VS = 5.5V VS = 5.0V VS = 2.7V NOISE vs FREQUENCY VNoise (nV/√Hz) Frequency (Hz) 10 100 10k 1k 100k 10k 100 100 0.1 INoise (fA/√Hz) 0.1Hz TO 10Hz VOLTAGE NOISE 1s/div 10µv/div

TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25kΩ , CL = 50pF, unless otherwise noted. To Positive Rail To Negative Rail OUTPUT SWING vs LOAD RESISTANCE Swing to Rail (mV) RLoad (Ω ) 20k 40k 60k 80k 100k COMMON-MODE INPUT RANGE vs REFERENCE VOLTAGE Output— Referred to Ground (V) Input Common-Mode Voltage (V) 123 45 Outside of Normal Operation REF Increasing QUIESCENT CURRENT AND SHUTDOWN CURRENT vs POWER SUPPLY IQ (µA) ISD (nA) Supply Voltage (V) 2.5 3 3.5 4 4.5 55 . 5 500 450 400 350 300 250 200 150 100 I Q ISD QUIESCENT CURRENT AND SHUTDOWN CURRENT vs TEMPERATURE –75 IQ (µA) 600 500 400 300 200 100 ISD (nA) Temperature (°C) –50 –25 0 25 50 75 100 125 150 IQ ISD SHORT-CIRCUIT CURRENT vs POWER SUPPLY ISC (mA) Supply Voltage (V) 2.5 3 3.5 4 4.5 5 5.5 ISC+ ISC – SHORT-CIRCUIT CURRENT vs TEMPERATURE –75 ISC (mA) Temperature (°C) –50 –25 0 25 50 75 100 125 150 ISC+ ISC –

TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25kΩ , CL = 50pF, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE (G = 5) 10µs/div 100mv/div SMALL-SIGNAL STEP RESPONSE (G = 100) 50µs/div 50mv/div SMALL-SIGNAL STEP RESPONSE (G = 5, CL = 1000pF) 10µs/div 100mv/div SMALL-SIGNAL STEP RESPONSE (G = 100, CL = 1000pF) 50µs/div 50mv/div SMALL-SIGNAL STEP RESPONSE (G = 100, CL = 5000pF) 50µs/div 50mv/div 50µs/div 1V/div LARGE-SIGNAL STEP RESPONSE (G = 25, CL = 50pF)

TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25kΩ , CL = 50pF, unless otherwise noted. SETTLING TIME vs GAIN 1 10 100 1000 Gain (V/V) Settling Time (µs) 100 Output 2Vp-p Differential Input Drive 0.01% 0.1% PERCENT OVERSHOOT vs LOAD CAPACITANCE 10 100 1k 10k Load Capacitance (pF) Overshoot (%) Output 100mVp-p Differential Input Drive G = 5 G = 25 SHUTDOWN VOLTAGE vs SUPPLY VOLTAGE 2.3 Shutdown (V) Supply Voltage (V) 3 3.5 4 4.5 5 5.5 2.5 1.5 0.5 Normal Operation Mode Part Draws Below 1µA Quiescent Current Operation in this Region is not Recommended Shutdown Mode SHUTDOWN TRANSIENT BEHAVIOR 50µs/div 1V/div VSD VOUT –10 Offset Voltage (mV) Percentage of Amplifiers (%) OFFSET VOLTAGE PRODUCTION DISTRIBUTION –20 –18 –16 –14 –12 –10 Offset Voltage Drift (µV/°C) Percentage of Amplifiers (%) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION

TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, VCM = 1/2VS, RL = 25kΩ , CL = 50pF, unless otherwise noted. SLEW RATE vs TEMPERATURE –75 SR (V/µs) Temperature (°C) –50 –25 0 25 50 75 100 125 150 0.8 0.6 0.4 0.2 INPUT BIAS CURRENT vs TEMPERATURE –75 –50 –25 0 25 50 75 100 125 150 Temperature (°C) Input Bias Current (pA) 10k 100 0.1 CROSSTALK vs FREQUENCY 0.1 1 10 100 1k 10k 100k 1M Frequency (Hz) Crosstalk (dB) 120 100 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 0 2 4 6 81 01 2 1 41 6 1 82 02 22 4 Output Current (mA) Output Voltage (V) 125°C 25°C –55°C 125°C 25°C –55°C

become dominant error sources. Mode Range vs Reference Voltage). The reference terminal defines the zero output voltage level. V OA2 should be less than VDD – 1.2V. The reference pin requires a low-impedance connection. input range (see Common-Mode Input Range section). input impedance and ideal for low-power applications. FIGURE 3. Providing an Input Common-Mode Path. returns, and dc-coupled resistive bridge applications. and better high-frequency gain.

expected offset under the conditions of a given application. Power Supply Rejection Ratio (PSRR) is specified in µV/V. mon-mode, the offset will shift less than 1mV. lated using the typical values). pin input capacitance (and any parasitic layout capacitance). FIGURE 8. Feedback Capacitor Improves Dynamic Perfor- (approximately 3pF) plus any parastic layout capacitance.

www.ti.com 12-Feb-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples INA2322EA/250 LIFEBUY TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 INA 2322EA INA2322EA/250G4 LIFEBUY TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 INA 2322EA INA322EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -55 to 125 C22 INA322EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -55 to 125 C22 INA322EA/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-2-260C-1 YEAR -55 to 125 C22 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.

www.ti.com 12-Feb-2016 Addendum-Page 2 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA2322EA/250 TSSOP PW 14 250 210.0 185.0 35.0 INA322EA/250 VSSOP DGK 8 250 210.0 185.0 35.0 INA322EA/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 Pack Materials-Page 2

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