NA186-Q1

INA186_V01 TI1

Document overview

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Technical content

ENABLE(1) VS OUT REFGND IN+ IN± LOAD Microcontroller Supply Voltage 1.7 V to 5.5 VBus Voltage ±0.2 V to +40 V 0.5 nA (typ) 0.5 nA (typ) 0.1 F RSENSE INA186 (1) The ENABLE pin is available only in the DDF package. Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. INA186 SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 INA186Bidirectional,Low-Power,Zero-Drift,WideDynamicRange, Current-SenseAmplifierWithEnable

1 Features

1• Wide common-mode voltage range, VCM: –0.2 V to +40 V

• Low input bias currents, IIB: 500 pA (typ) (enables microamp current measurement)
• Low power: – Low supply voltage, VS: 1.7 V to 5.5 V – Low shutdown current: 100 nA (max, DDF package) – Low quiescent current, IQ: 48 µA (typ)
• Accuracy: – Common-mode rejection ratio: 120 dB (min) – Gain error, EG: ±1% (max) – Gain drift: 10 ppm/°C (max) – Offset voltage, VOS: ±50 μV (max) – Offset drift: 0.5 μV/°C (max)
• Bidirectional current sensing capability
• Gain options: – INA186A1: 25 V/V – INA186A2: 50 V/V – INA186A3: 100 V/V – INA186A4: 200 V/V – INA186A5: 500 V/V

2 Applications

• Standard notebook PC
• Smartphone
• Consumer battery charger
• Baseband unit (BBU)
• Merchant network and server PSU
• Battery test

3 Description

The INA186 is a low-power, voltage-output, current- sense amplifier (also called a current-shunt monitor). This device is commonly used for overcurrent protection, precision current measurement for system optimization, or in closed-loop feedback circuits. The INA186 can sense drops across shunts at common- mode voltages from –0.2 V to +40 V, independent of the supply voltage. The low input bias current of the INA186 permits the use of larger current-sense resistors, thus providing accurate current measurements in the microamp range. The low offset voltage of the zero-drift architecture extends the dynamic range of the current measurement. This feature allows for smaller sense resistors with lower power loss, while still providing accurate current measurements. The INA186 operates from a single 1.7-V to 5.5-V power supply, and draws a maximum of 90 μA of supply current. Five fixed gain options are available: 25 V/V, 50 V/V, 100 V/V, 200 V/V, or 500 V/V. The device is specified over the operating temperature range of –40°C to +125°C, and offered in SC70 and SOT-23-THIN packages. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) INA186 SC70 (6) 2.00 mm × 1.25 mm SOT-23 (8) 3.00 mm × 1.60 mm (1) For all available packages, see the package option addendum at the end of the datasheet. Typical Application

SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: INA186 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Table of Contents

11.2 Receiving Notification of Documentation Updates 26

12 Mechanical, Packaging, and Orderable

4 Revision History

Changes from Original (April 2019) to Revision A Page

1VS 8 IN ± 2ENABLE 7 IN+ 3REF 6 NC 4GND 5 OUT Not to scale 1REF 6 OUT 2GND 5 IN ± 3VS 4 IN+ Not to scale INA186 www.ti.com SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 Product Folder Links: INA186 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated

5 Pin Configuration and Functions

ENABLE — 2 Digital input Enable Pin. When this pin is driven to VS, the device is on and functions as a current sense amplifier. When this pin is driven to GND, the device is off, the supply current is reduced, and the output is placed in a high-impedance state. This pin must be driven externally, or connected to VS if not used. DDF package only. GND 2 4 Analog Ground IN– 5 8 Analog input Current-sense amplifier negative input. For high-side applications, connect to load side of sense resistor. For low-side applications, connect to ground side of sense resistor. IN+ 4 7 Analog input Current-sense amplifier positive input. For high-side applications, connect to bus voltage side of sense resistor. For low-side applications, connect to load side of sense resistor. NC — 6 — No internal connection. Can be left floating, grounded, or connected to supply. OUT 6 5 Analog output OUT pin. This pin provides an analog voltage output that is the gained up voltage difference from the IN+ to the IN– pins, and is offset by the voltage applied to the REF pin. REF 1 3 Analog input Reference input. Enables bidirectional current sensing with an externally applied voltage. VS 3 1 Analog Power supply, 1.7 V to 5.5 V

SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: INA186 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively. (3) Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VS Supply voltage 6 V VIN+, VIN– Analog inputs Differential (VIN+) – (VIN–)(2) –42 42 V VIN+, VIN–, with respect to GND(3) GND – 0.3 42 VENABLE ENABLE GND – 0.3 6 V REF, OUT(3) GND – 0.3 (VS) + 0.3 V Input current into any pin(3) 5 mA TA Operating temperature –55 150 °C TJ Junction temperature 150 °C Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VCM Common-mode input range GND – 0.2 40 V VIN+, VIN– Input pin voltage range GND – 0.2 40 V VS Operating supply voltage 1.7 5.5 V VREF Reference pin voltage range GND VS V TA Operating free-air temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) INA186 UNITDCK (SC70) DDF (SOT23)

6 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 170.7 137.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 132.7 38.4 °C/W RθJB Junction-to-board thermal resistance 65.3 57.1 °C/W ΨJT Junction-to-top characterization parameter 45.7 5.1 °C/W ΨJB Junction-to-board characterization parameter 65.2 56.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W

www.ti.com SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 Product Folder Links: INA186 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) RTI = referred-to-input.

6.5 Electrical Characteristics

at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, and VREF = VS / 2 (unless otherwise noted) PARAMETER CONDITIONS MIN TYP MAX UNIT INPUT CMRR Common-mode rejection ratio VSENSE = 0 mV, VIN+ = –0.1 V to 40 V, TA = –40°C to +125°C 120 150 dB VOS Offset voltage, RTI(1) VS = 1.8 V, VSENSE = 0 mV –3 ±50 µV dVOS/dT Offset drift, RTI VSENSE = 0 mV, TA = –40°C to +125°C 0.05 0.5 µV/°C PSRR Power-supply rejection ratio, RTI VSENSE = 0 mV, VS = 1.7 V to 5.5 V –1 ±10 µV/V IIB Input bias current VSENSE = 0 mV 0.5 3 nA IIO Input offset current VSENSE = 0 mV ±0.07 nA OUTPUT G Gain A1 devices 25 V/V A2 devices 50 A3 devices 100 A4 devices 200 A5 devices 500 EG Gain error VOUT = 0.1 V to VS – 0.1 V –0.04% ±1% Gain error drift TA = –40°C to +125°C 2 10 ppm/°C Nonlinearity error VOUT = 0.1 V to VS – 0.1 V ±0.01% RVRR Reference voltage rejection ratio VREF = 100 mV to VS – 100 mV, TA = –40°C to +125°C ±2 ±10 µV/V Maximum capacitive load No sustained oscillation 1 nF VOLTAGE OUTPUT VSP Swing to VS power- supply rail VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C (VS) – 20 (VS) – 40 mV VSN Swing to GND VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C, VSENSE = –10 mV, VREF = 0 V (VGND) + 0.05 (VGND) + 1 mV VZL Zero current output voltage VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C, VSENSE = 0 mV, VREF = 0 V (VGND) + 2 (VGND) + 10 mV FREQUENCY RESPONSE BW Bandwidth A1 devices, CLOAD = 10 pF 45 kHz A2 devices, CLOAD = 10 pF 37 A3 devices, CLOAD = 10 pF 35 A4 devices, CLOAD = 10 pF 33 A5 devices, CLOAD = 10 pF 27 SR Slew rate VS = 5.0 V, VOUT = 0.5 V to 4.5 V 0.3 V/µs tS Settling time From current step to within 1% of final value 30 µs NOISE, RTI(1) Voltage noise density 75 nV/√Hz ENABLE IEN Leakage input current 0 V ≤ VENABLE ≤ VS 1 100 nA VIH High-level input voltage 0.7 × VS 6 V VIL Low-level input voltage 0 0.3 × VS V VHYS Hysteresis 300 mV IODIS Output leakage disabled VS = 5.0 V, VOUT = 0 V to 5.0 V, VENABLE = 0 V 1 5 µA POWER SUPPLY IQ Quiescent current VS = 1.8 V, VSENSE = 0 mV 48 65 µA VS = 1.8 V, VSENSE = 0 mV, TA = –40°C to +125°C 90 µA IQDIS Quiescent current disabled VENABLE = 0 V, VSENSE = 0 mV 10 100 nA

6.6 Typical Characteristics

Figure 1. Gain vs Frequency Figure 2. Power-Supply Rejection Ratio vs Frequency Figure 3. Common-Mode Rejection Ratio vs Frequency Figure 4. Output Voltage Swing vs Output Current Figure 5. Output Voltage Swing vs Output Current Figure 6. Input Bias Current vs Common-Mode Voltage

IN± IN+ GND VS OUT REF ENABLE(1) INA186 INA186 SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: INA186 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The INA186 is a low bias current, low offset, 40-V common-mode, current-sensing amplifier. The DDF SOT-23 package also comes with an enable pin.The INA186 is a specially designed, current-sensing amplifier that accurately measures voltages developed across current-sensing resistors on common-mode voltages that far exceed the supply voltage. Current is measured on input voltage rails as high as 40 V at VIN+ and VIN–, with a supply voltage, VS, as low as 1.7 V. When disabled, the output goes to a high-impedance state, and the supply current draw is reduced to less than 0.1 µA. The INA186 is intended for use in both low-side and high-side current-sensing configurations where high accuracy and low current consumption are required.

7.2 Functional Block Diagram

(1) The ENABLE pin is available only in the DDF package.

OUT LOAD SENSE REFV I R GAIN V u u INA186 www.ti.com SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 Product Folder Links: INA186 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated

7.3 Feature Description

7.3.1 Precision Current Measurement

The INA186 allows for accurate current measurements over a wide dynamic range. The high accuracy of the device is attributable to the low gain error and offset specifications. The offset voltage of the INA186 is less than ±50 µV. In this case, the low offset improves the accuracy at light loads when VIN+ approaches VIN–. Another advantage of low offset is the ability to use a lower-value shunt resistor that reduces the power loss in the current-sense circuit, and improves the power efficiency of the end application. The maximum gain error of the INA186 is specified at ±1%. As the sensed voltage becomes much larger than the offset voltage, the gain error becomes the dominant source of error in the current-sense measurement. When the device monitors currents near the full-scale output range, the total measurement error approaches the value of the gain error.

7.3.2 Low Input Bias Current

The INA186 is different from many current-sense amplifiers because this device offers very low input bias current. The low input bias current of the INA186 has three primary benefits. The first benefit is the reduction of the current consumed by the device. Classical current-sense amplifier topologies typically consume tens of microamps of current at the inputs. For these amplifiers, the input current is the result of the resistor network that sets the gain and additional current to bias the input amplifier. To reduce the bias current to near zero, the INA186 uses a capacitively coupled amplifier on the input stage, followed by a difference amplifier on the output stage. The second benefit of low bias current is the ability to use input filters to reject high-frequency noise before the signal is amplified. In a traditional current-sense amplifier, the addition of input filters comes at the cost of reduced accuracy. However, as a result of the low bias currents, input filters have little effect on the measurement accuracy of the INA186. The third benefit of low bias current is the ability to use a larger current-sense resistor. This ability allows the device to accurately monitor currents as low as 1 µA.

7.3.3 Low Quiescent Current With Output Enable

The device features low quiescent current (IQ), while still providing sufficient small-signal bandwidth to be usable in most applications. The quiescent current of the INA186 is only 48 µA (typ), while providing a small-signal bandwidth of 35 kHz in a gain of 100. The low IQ and good bandwidth allow the device to be used in many portable electronic systems without excessive drain on the battery. Because many applications only need to periodically monitor current, the INA186 features an enable pin that turns off the device until needed. When in the disabled state, the INA186 typically draws 10 nA of total supply current.

7.3.4 Bidirectional Current Monitoring

INA186 devices can sense current flow through a sense resistor in both directions. The bidirectional current- sensing capability is achieved by applying a voltage at the REF pin to offset the output voltage. A positive differential voltage sensed at the inputs results in an output voltage that is greater than the applied reference voltage. Likewise, a negative differential voltage at the inputs results in output voltage that is less than the applied reference voltage. The output voltage of the current-sense amplifier is shown in Equation 1. where

• ILOAD is the load current to be monitored.
• RSENSE is the current-sense resistor.
• GAIN is the gain option of the selected device.
• VREF is the voltage applied to the REF pin. (1)

isolated from bus-voltage spikes.

7.3.5 High-Side and Low-Side Current Sensing

applications, as shown in Figure 25. Figure 25. High-Side and Low-Side Sensing Connections

7.3.6 High Common-Mode Rejection

7.3.7 Rail-to-Rail Output Swing

particularly when operating the device from a 1.8-V supply.

7.4 Device Functional Modes

7.4.1 Normal Operation

• The power-supply voltage (VS) is between 1.7 V and 5.5 V.
• The common-mode voltage (VCM) is within the specified range of –0.2 V to +40 V.
• The maximum differential input signal times the gain plus VREF is less than the positive swing voltage VSP.
• The ENABLE pin is driven or connected to VS.
• The minimum differential input signal times the gain plus VREF is greater than the zero load swing to GND, VZL (see the Rail-to-Rail Output Swing section). During normal operation, this device produces an output voltage that is the amplified representation of the difference voltage from IN+ to IN– plus the voltage applied to the REF pin.

7.4.2 Unidirectional Mode

output is set to ground when no current is flowing by connecting the REF pin to ground, as shown in Figure 26. the output voltage at the OUT pin to increase. Figure 26. Typical Unidirectional Application rejection errors, buffer the reference voltage connected to the REF pin. voltage. The voltage applied to the REF pin must not exceed VS.

first, followed by the negative supply. Figure 27. Using the REF Pin to Level-Shift Output Voltage

7.4.3 Bidirectional Mode

operations where the current flowing through the resistor can change directions. Figure 28. Bidirectional Application example, when the bidirectional current and corresponding output signal do not need to be symmetrical.

7.4.4 Input Differential Overload

value approximately 80 µs after the fault condition is removed.

7.4.5 Shutdown

measurement is not needed. When the ENABLE pin is driven to the supply voltage, the device turns back on. The typical output settling time when enabled is 130 µs. outputs of the INA186 together to a single ADC or measurement device, as shown in Figure 29. Figure 29. Multiplexing Multiple Devices With the ENABLE Pin

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

range of voltage rails while still maintaining an accurate current measurement.

8.1.1 Basic Connections

present, the ENABLE pin must be controlled externally or connected to VS if not used. (1) The ENABLE pin is available only in the DDF package. connecting directly to the ADC. Figure 30. Basic Connections

MIN SENSE SN REFI R GAIN > V Vu u MAX SENSE SP REFI R GAIN < V Vu u MAX SENSE 2 MAX PDR I INA186 SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: INA186 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Application Information (continued)

8.1.2 RSENSE and Device Gain Selection

The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow and reduces the error contribution of the offset voltage. However, there are practical limits as to how large the current-sense resistor can be in a given application because of the resistor size and maximum allowable power dissipation. Equation 2 gives the maximum value for the current-sense resistor for a given power dissipation budget: where:

• PDMAX is the maximum allowable power dissipation in RSENSE.
• IMAX is the maximum current that will flow through RSENSE. (2) An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply voltage, VS, and device swing-to-rail limitations. In order to make sure that the current-sense signal is properly passed to the output, both positive and negative output swing limitations must be examined. Equation 3 provides the maximum values of RSENSE and GAIN to keep the device from exceeding the positive swing limitation. where:
• IMAX is the maximum current that will flow through RSENSE.
• GAIN is the gain of the current-sense amplifier.
• VSP is the positive output swing as specified in the data sheet.
• VREF is the externally applied voltage on the REF pin. (3) To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid positive swing limitations. The negative swing limitation places a limit on how small the sense resistor value can be for a given application. Equation 4 provides the limit on the minimum value of the sense resistor. where:
• IMIN is the minimum current that will flow through RSENSE.
• GAIN is the gain of the current-sense amplifier.
• VSN is the negative output swing of the device (see the Rail-to-Rail Output Swing section).
• VREF is the externally applied voltage on the REF pin. (4) In addition to adjusting RSENSE and the device gain, the voltage applied to the REF pin can be slightly increased above GND to avoid negative swing limitations.

8.1.3 Signal Conditioning

filter on the input pins of the device. Figure 31. Filter at the Input Pins is a function of the device temperature, as shown in Figure 32. Figure 32. Differential Input Impedance vs Temperature

RError(%) 1 100 R R 2 R § · u¨ ¸ ¨ ¸ u© ¹ INA186 SBOS318A –APRIL 2019–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: INA186 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Application Information (continued) As the voltage drop across the sense resistor (VSENSE) increases, the amount of voltage dropped across the input filter resistors (RF) also increases. The increased voltage drop results in additional gain error. The error caused by these resistors is calculated by the resistor divider equation shown in Equation 5. where:

• RDIFF is the differential input impedance.
• RF is the added value of the series filter resistance. (5) The input stage of the INA186 uses a capacitive feedback amplifier topology in order to achieve high dc precision. As a result, periodic high-frequency shunt voltage (or current) transients of significant amplitude (10 mV or greater) and duration (hundreds of nanoseconds or greater) may be amplified by the INA186, even though the transients are greater than the device bandwidth. Use a differential input filter in these applications to minimize disturbances at the INA186 output. The high input impedance and low bias current of the INA186 provide flexibility in the input filter design without impacting the accuracy of current measurement. For example, set RF = 100 Ω and CF = 22 nF to achieve a low- pass filter corner frequency of 36.2 kHz. These filter values significantly attenuate most unwanted high-frequency signals at the input without severely impacting the current sensing bandwidth or precision. If a lower corner frequency is desired, increase the value of CF. Filtering the input filters out differential noise across the sense resistor. If high-frequency, common-mode noise is a concern, add an RC filter from the OUT pin to ground. The RC filter helps filter out both differential and common mode noise, as well as internally generated noise from the device. The value for the resistance of the RC filter is limited by the impedance of the load. Any current drawn by the load manifests as an external voltage drop from the INA186 OUT pin to the load input. To select the optimal values for the output filter, use Figure 24 and see the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using ZOUT application report

8.1.4 Common-Mode Voltage Transients

Figure 33. Transient Protection Using Dual Zener Diodes 8 package, and only slightly greater than that of an VSSOP-8 package. Figure 34. Transient Protection Using a Single Transzorb and Input Clamps For more information, see the Current Shunt Monitor With Transient Robustness reference design.

8.2 Typical Applications

RSENSE to 1 kΩ or less for best accuracy. Figure 35. Microamp Current Measurement

8.2.1 Design Requirements

The design requirements for the circuit shown in Figure 35 are listed in Table 1. Table 1. Design Parameters

8.2.2 Detailed Design Procedure

design parameters the maximum value for RSENSE is calculated to be 1.321 kΩ. using Equation 7 to be 25 mV, which is greater than the value for VSN.

8.2.3 Application Curve

Figure 36 shows the output of the device under the conditions given in Table 1 and with RSENSE = 1 kΩ. Figure 36. Typical Application DC Transfer Function

9 Power Supply Recommendations

VS pin. There is no sequencing requirement for VS and VIN+ or VIN–.

10 Layout

10.1 Layout Guidelines

• Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing of the current-sensing resistor commonly results in additional resistance present between the input pins. Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can cause significant measurement errors.
• Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins. The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies.
• When routing the connections from the current-sense resistor to the device, keep the trace lengths as short as possible. The input filter capacitor CF should be placed as close as possible to the input pins of the device.

10.2 Layout Examples

Figure 37. Recommended Layout for SC70 (DCK) Package

Figure 38. Recommended Layout for SOT-23 (DDF) Package

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11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following: Texas Instruments, INA186EVM user's guide

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

11.4 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 27-Nov-2019 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples INA186A1IDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1E7 INA186A1IDCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1E7 INA186A1IDDFR ACTIVE SOT-23-THIN DDF 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZLW INA186A1IDDFT ACTIVE SOT-23-THIN DDF 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZLW INA186A2IDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1E8 INA186A2IDCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1E8 INA186A2IDDFR ACTIVE SOT-23-THIN DDF 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZMW INA186A2IDDFT ACTIVE SOT-23-THIN DDF 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZMW INA186A3IDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1E9 INA186A3IDCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1E9 INA186A3IDDFR ACTIVE SOT-23-THIN DDF 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZNW INA186A3IDDFT ACTIVE SOT-23-THIN DDF 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZNW INA186A4IDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1EA INA186A4IDCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1EA INA186A4IDDFR ACTIVE SOT-23-THIN DDF 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZOW INA186A4IDDFT ACTIVE SOT-23-THIN DDF 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZOW INA186A5IDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1EB

www.ti.com 27-Nov-2019 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples INA186A5IDCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 1EB INA186A5IDDFR ACTIVE SOT-23-THIN DDF 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZPW INA186A5IDDFT ACTIVE SOT-23-THIN DDF 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 1ZPW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com 27-Nov-2019 Addendum-Page 3 OTHER QUALIFIED VERSIONS OF INA186 :

• Automotive: INA186-Q1 NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant INA186A1IDDFR SOT- 23-THIN INA186A1IDDFT SOT- 23-THIN INA186A2IDDFR SOT- 23-THIN INA186A2IDDFT SOT- 23-THIN INA186A3IDDFR SOT- 23-THIN INA186A3IDDFT SOT- 23-THIN PACKAGE MATERIALS INFORMATION www.ti.com 27-Nov-2019 Pack Materials-Page 1

(mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant INA186A4IDDFR SOT- 23-THIN INA186A4IDDFT SOT- 23-THIN INA186A5IDDFR SOT- 23-THIN INA186A5IDDFT SOT- 23-THIN *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA186A1IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 INA186A1IDCKT SC70 DCK 6 250 180.0 180.0 18.0 INA186A1IDDFR SOT-23-THIN DDF 8 3000 210.0 185.0 35.0 INA186A1IDDFT SOT-23-THIN DDF 8 250 210.0 185.0 35.0 INA186A2IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 INA186A2IDCKT SC70 DCK 6 250 180.0 180.0 18.0 INA186A2IDDFR SOT-23-THIN DDF 8 3000 210.0 185.0 35.0 INA186A2IDDFT SOT-23-THIN DDF 8 250 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 27-Nov-2019 Pack Materials-Page 2

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA186A3IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 INA186A3IDCKT SC70 DCK 6 250 180.0 180.0 18.0 INA186A3IDDFR SOT-23-THIN DDF 8 3000 210.0 185.0 35.0 INA186A3IDDFT SOT-23-THIN DDF 8 250 210.0 185.0 35.0 INA186A4IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 INA186A4IDCKT SC70 DCK 6 250 180.0 180.0 18.0 INA186A4IDDFR SOT-23-THIN DDF 8 3000 210.0 185.0 35.0 INA186A4IDDFT SOT-23-THIN DDF 8 250 210.0 185.0 35.0 INA186A5IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 INA186A5IDCKT SC70 DCK 6 250 180.0 180.0 18.0 INA186A5IDDFR SOT-23-THIN DDF 8 3000 210.0 185.0 35.0 INA186A5IDDFT SOT-23-THIN DDF 8 250 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 27-Nov-2019 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C TYP2.95 2.65

1.1 MAX

6X 0.65 8X 0.4 0.2 1.95 TYP0.20 0.08 0 - 8 0.1 0.0 0.25 GAGE PLANE 0.6 0.3 A NOTE 3 2.95 2.85 B 1.65 1.55 4222047/B 11/2015 SOT-23 - 1.1 mm max heightDDF0008A PLASTIC SMALL OUTLINE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 1 8

0.1 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT (2.6) 8X (1.05) 8X (0.45) 6X (0.65) (R ) TYP 0.05 4222047/B 11/2015 SOT-23 - 1.1 mm max heightDDF0008A PLASTIC SMALL OUTLINE SYMM SYMM LAND PATTERN EXAMPLE SCALE:15X 4 5 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (2.6) 6X (0.65) 8X (0.45) 8X (1.05) (R ) TYP0.05 4222047/B 11/2015 SOT-23 - 1.1 mm max heightDDF0008A PLASTIC SMALL OUTLINE NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SYMM SYMM 4 5 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X

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