N173HCE-E31 ETC2

Document overview

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Technical content

Datasheet sections

  • 1.1 OVERVIEW
  • 1.2 GENERAL SPECIFICA TI0NS
  • 2.1 CONNECTOR TYPE
  • 3.1 ABSOLUTE RA TINGS OF ENVIRONMENT
  • 3.2 ELECTRICAL ABSOLUTE RA TINGS
  • 3.2.1 TFT LCD MODULE
  • 4.1 FUNCTION BLOCK DIAGRAM
  • 4.3 ELECTRICAL CHARACTERISTICS
  • 4.3.1 LCD ELETRONICS SPECIFICA TION
  • 4.3.2 LED CONVERTER SPECIFICA TION
  • 4.3.3 BACKLIGHT UNIT
  • 4.4 DISPLAY PORT SIGNAL TIMING SPECIFICA TION
  • 4.4.1 DISPLA Y PORT INTERFACE
  • 4.4.2 COLOR DA TA INPUT ASSIGNMENT
  • 4.5 DISPLAY TIMING SPECIFICA TIONS
  • 4.6 POWER ON/OFF SEQUENCE
  • 5.1 TEST CONDITIONS
  • 5.2 OPTICAL SPECIFICA TIONS
  • 7.1 MODULE LABEL
  • 7.2 CARTON
  • 7.3 PALLET
  • 7.4 UN-PACKAGING METHOD

Version 0.0 6 November 2014 1 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Customer: APPROVED BY SIGNATURE Name / Title Note Please return 1 copy for your confirmation with your signature and comments. Doc. Number: ▓ Tentative Specification □ Preliminary Specification □ Approval Specification MODEL NO.: N173HCE SUFFIX: E31 Approved By Checked By Prepared By 吳柏勳 2014-11-06 08:53:48 CST 曹文彬 2014-10-30 14:33:33 CST 徐嘉佑 2014-10-30 11:42:13 CST

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REVISION HISTORY

Version Date Page Description

Version 0.0 6 November 2014 5 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 1. GENERAL DESCRIPTION

1.1 OVERVIEW

N173HCE-E31 is a 1 7.3” TFT Liquid Crystal Display module with LED Backlight unit and 30 pins eDP interface. This module supports 1920 x 1080 FHD model and can display 262,144 colors. The optimum viewing angle is at 6 o’clock direction.

1.2 GENERAL SPECIFICATI0NS

Item Specification Unit Note Screen Size 17.3” diagonal Driver Element a-si TFT active matrix - - Pixel Number 1920 x R.G.B. x 1080 pixel - Pixel Pitch 0.1989 (H) x 0.1989 (V) mm - Pixel Arrangement RGB vertical stripe - - Display Colors 262,144 color - Transmissive Mode Normally black - - Surface Treatment Hard coating (3H), High resolution Adaptable AG - - Luminance, White 300 Cd/m2 Power Consumption Total TBD W (Max.) @ cell TBD W (Max.), BL TBD W (Max.) Note (1) The specified power consumption (with converter efficiency) is under the conditions at VCCS =

3.3 V, fv = 60 Hz, LED_VCCS = Typ, fPWM = 200 Hz, Duty=100% and Ta = 25 ± 2 ºC, whereas mosaic

pattern is displayed. 2. MECHANICAL SPECIFICATIONS Item Min. Typ. Max. Unit Note Horizontal (H) 399.00 399.50 400.00 mm Vertical (V) 229.95 230.45 230.95 mm Module Size Thickness (T) - 3.57 4.00 mm (1) (2) Horizontal NA NA NA mm Bezel Area Vertical NA NA NA mm CF 0.45 0.5 0.55 mm Glass Thickness TFT 0.45 0.5 0.55 mm Weight - 527 550 g Note (1) Please refer to the attached drawings for more information of front and back outline dimensions. Note (2) Dimensions are measured by caliper.

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2.1 CONNECTOR TYPE

Please refer Appendix Outline Drawing for detail design. Connector Part No.: IPEX-20455-030E-12 or Tyco 5-2069716-2 User’s connector Part No: IPEX-20453-030T-03 3. ABSOLUTE MAXIMUM RATINGS

3.1 ABSOLUTE RATINGS OF ENVIRONMENT

Min. Max. Unit Note Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Note (1) (a) 90 %RH Max. (Ta < 40 ºC). (b) Wet-bulb temperature should be 39 ºC Max. (c) No condensation. Note (2) The temperature of panel surface should be 0 ºC min. and 60 ºC max. Storage Range Relative Humidity (%RH) Operating Temperature (ºC) 100 80 60 -20 40 0 20 -40 Pin1 Pin30

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3.2 ELECTRICAL ABSOLUTE RATINGS

3.2.1 TFT LCD MODULE

Min. Max. Unit Note Power Supply Voltage VCCS -0.3 +4.0 V Logic Input Voltage VIN -0.3 VCCS+0.3 V (1) Converter Input Voltage LED_VCCS -0.3 (26) V (1) Converter Control Signal Voltage LED_PWM, -0.3 (5) V (1) Converter Control Signal Voltage LED_EN -0.3 (5) V (1) Note (1) Stresses beyond those listed in above “ELECTRICAL ABSOLUTE RATINGS” may cause permanent damage to the device. N ormal operation should be restricted to the conditions described in “ELECTRICAL CHARACTERISTICS”. 4. ELECTRICAL SPECIFICATIONS

4.1 FUNCTION BLOCK DIAGRAM

DC/DC CONVERTER & REFERENCE VOLTAGE GENERATOR INPUT CONNECTOR LED CONVERTER

Version 0.0 6 November 2014 8 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 4.2. INTERFACE CONNECTIONS PIN ASSIGNMENT Pin Symbol Description Remark

1 NC No Connection (Reserved for LCD test)

2 H_GND High Speed Ground

3 ML1- Complement Signal-Lane 1

4 ML1+ True Signal-Main Lane 1

5 H_GND High Speed Ground

6 ML0- Complement Signal-Lane 0

7 ML0+ True Signal-Main Lane 0

8 H_GND High Speed Ground

9 AUX+ True Signal-Auxiliary Channel

10 AUX- Complement Signal-Auxiliary Channel

11 H_GND High Speed Ground

12 VCCS Power Supply +3.3 V (typical) 13 VCCS Power Supply +3.3 V (typical)

14 NC No Connection (Reserved for LCD test)

15 GND Ground

16 GND Ground

17 HPD Hot Plug Detect

18 BL_GND BL Ground

19 BL_GND BL Ground

20 BL_GND BL Ground

21 BL_GND BL Ground

22 LED_EN BL_Enable Signal of LED Converter

23 LED_PWM PWM Dimming Control Signal of LED

24 NC No Connection (Reserved for LCD test)

25 NC No Connection (Reserved for LCD test)

26 LED_VCCS BL Power

27 LED_VCCS BL Power

28 LED_VCCS BL Power

29 LED_VCCS BL Power

30 NC No Connection (Reserved for LCD test)

Note (1) The first pixel is odd as shown in the following figure.

Version 0.0 6 November 2014 9 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 1,1 (odd) 1,2 (even) 1,3 (odd) 1,4 (even) 2,1 2,2 3,1 Ymax,1 Ymax, Xmax 1,Xmax Pitch Pitch

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4.3 ELECTRICAL CHARACTERISTICS

4.3.1 LCD ELETRONICS SPECIFICATION

Min. Typ. Max. Unit Note Power Supply Voltage VCCS 3.0 3.3 3.6 V (1) High Level 2.25 - 2.75 V (4) HPD Low Level 0 - 0.4 V (4) HPD Impedance RHPD 30K ohm (4) Ripple Voltage VRP - 50 - mV (1) Inrush Current IRUSH - - 1.5 A (1),(2) Mosaic (TBD) (TBD) mA (3)a Power Supply Current Black lcc (TBD) (TBD) mA (3) Note (1) The ambient temperature is Ta = 25 ± 2 ºC. Note (2) IRUSH: the maximum current when VCCS is rising IIS: the maximum current of the first 100ms after power-on Measurement Conditions: Shown as the following figure. Test pattern: black. (High to Low) (Control Signal) +12V SW 1uF VCCS +3.3V 2SK1470 Q1 2SK1475 47K VR1 47K C2 0.01uF 1uF FUSE (LCD Module Input) VCCS rising time is 0.5ms

Version 0.0 6 November 2014 11 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Note (3) The specified power supply current is under the conditions at VCCS = 3.3 V, Ta = 25 ± 2 ºC, DC Current and fv = 60 Hz, whereas a power dissipation check pattern below is displayed. Note (4) The specified signals have equivalent impedances pull down to ground in the LCD module respectively. Customers should keep the input signal level requirement with the load of LCD module. Please refer to Note (4) of 4.3.2 LED CONVERTER SPECIFICATION to obtain more information. Active Area a. Mosaic Pattern

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4.3.2 LED CONVERTER SPECIFICATION

Min. Typ. Max. Unit Note Converter Input Power Supply Voltage LED_Vccs (6.0) (12.0) (21.0) V Converter Inrush Current ILEDRUSH - - 1.5 A (1) Backlight On (2.2) - (5.0) V (4) LED_EN Control Level Backlight Off 0 - (0.6) V (4) LED_EN Impedance RLED_EN 30K - - ohm (4) PWM High Level (2.2) - 5 V (4) PWM Control Level PWM Low Level 0 - (0.6) V (4) PWM Impedance RPWM 30K - - ohm (4) PWM Control Duty Ratio (5) - 100 % PWM Control Permissive Ripple Voltage VPWM_pp - - 100 mV PWM Control Frequency fPWM (190) - (2K) Hz (2) LED Power Current LED_VCCS =Typ. ILED (TBD) (TBD) (TBD) mA (3) Note (1) ILEDRUSH: the maximum current when LED_VCCS is rising, ILEDIS: the maximum current of the first 100ms after power-on, Measurement Conditions: Shown as the following figure. LED_VCCS = Typ, Ta = 25 ± 2 ºC, fPWM = 200 Hz, Duty=100%. (High to Low) (Control Signal) LED_VCCS(T yp) SW=24V 1uF LED_VCCS(T yp) IRL3303 Q1 IRL3303 47K VR1 47K C2 0.01uF 1uF FUSE (LED Converter Input)

Version 0.0 6 November 2014 13 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 90% 10% 0.5ms ILEDRush ILEDIS ILED LED_VCC 100ms LED_PWM LED_EN Note (2) If PWM control frequency is applied in the range less than 1KHz, the “waterfall” phenomenon on the screen may be found. To avoid the issue, it ’s a suggestion that PWM control frequency should follow the criterion as below. PWM control frequency fPWM should be in the range N : Integer )3( N f : Frame rate Note (3) The specified LED power supply current is under the conditions at “LED_VCCS = Typ.”, Ta = 25 ± 2 ºC, fPWM = 200 Hz, Duty=100%. Note (4) The specified signals have equ ivalent impedances pull down to ground in the LCD module respectively. Customers should keep the input signal level requirement with the load of LCD module. For example, the figure below describes the equivalent pull down impedance of LED_EN (If it exists). The rest pull down impedances of other signals (eg. HPD, PWM …) are in the same concept. VLED rising time is 0.5ms

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4.3.3 BACKLIGHT UNIT

Ta = 25 ± 2 ºC Value Parameter Symbol Min. Typ. Max. Unit Note LED Light Bar Power Supply Voltage VL 28.6 31.9 33 V LED Light Bar Power Supply Current IL 150 mA (1)(2)(Duty100%) Power Consumption PL 4.785 4.95 W (3) LED Life Time LBL 15000 - - Hrs (4) Note (1) LED current is measured by utilizing a high frequency current meter as shown below : Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter with current balancing function to drive LED light-bar. Note (3) PL = IL ×VL (Without LED converter transfer efficiency) Note (4) The lifetime of LED is defined as the time when it continues to operate under the conditions at Ta = 25 ±2 oC and IL = 25 mA(Per EA) until the brightness becomes 50% of its original value≦ . LED Light Bar Parallel: 6 Serial: 11 VL, IL Light Bar Feedback Channels

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4.4 DISPLAY PORT SIGNAL TIMING SPECIFICATION

4.4.1 DISPLAY PORT INTERFACE

Parameter Symbol Min. Typ. Max. Unit Notes Differential Signal Common Mode Voltage(MainLink and AUX) VCM (0) (2) V (1)(3) AUX AC Coupling Capacitor CAUX (75) (200) nF (2) Note (1)Display port interface related AC coupled signals should follow VESA DisplayPort Standard Version1. Revision 1a and VESA Embedded DisplayPort TM Standard Version 1.2. There are many optional items described in eDP1.2. If some optional item is requested, please contact us. (2) The AUX AC Coupling Capacitor should be placed on Source Devices. (3)The source device should pass the test criteria described in DisplayPortCompliance Test Specification (CTS) 1.1

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4.4.2 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6 -bit gray scale data input for the color. The higher the binary input the brighter the color. The table below provides the assignment of color versus data input. Data Signal Red Green Blue Color R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Basic Colors Black Red Green Blue Cyan Magenta Yellow White Gray Scale Of Red Red(0)/Dark Red(1) Red(2) Red(61) Red(62) Red(63) Gray Scale Of Green Green(0)/Dark Green(1) Green(2) Green(61) Green(62) Green(63) Gray Scale Of Blue Blue(0)/Dark Blue(1) Blue(2) Blue(61) Blue(62) Blue(63) Note (1) 0: Low Level Voltage, 1: High Level Voltage

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4.5 DISPLAY TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram. Refresh rate 60Hz Signal Item Symbol Min. Typ. Max. Unit Note DCLK Frequency 1/Tc (TBD) (TBD) (TBD) MHz - Vertical Total Time TV (TBD) (TBD) (TBD) TH - Vertical Active Display Period TVD (TBD) (TBD) (TBD) TH - Vertical Active Blanking Period TVB TV-TVD (TBD) TV-TVD TH - Horizontal Total Time TH (TBD) (TBD) (TBD) Tc - Horizontal Active Display Period THD (TBD) (TBD) (TBD) Tc - DE Horizontal Active Blanking Period THB TH-THD (TBD) TH-THD Tc - INPUT SIGNAL TIMING DIAGRAM TH TC DCLK THD TVD Tv DE DE DATA

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4.6 POWER ON/OFF SEQUENCE

The power sequence specifications are shown as the following table and diagram. t12 Restart Power On Power Off 10% t10 t2 90% 10% 90% Black Video t11 10% Black Video Video from Source AUX Channel Operational Link Training Idle Valid Video Data tA tC tE tB Idle or off t5 t6 t8 t9 -Power Supply for LCD, VCCS 0V 90% 10% tF tD -eDP Display -HPD from Sink -AUX Channel -Main Link Data - Power Supply for LED Converter, LED_VCCS - LED Converter Dimming Signal, LED_PWM - LED Converter Enable Signal, LED_EN 90% 10%

Version 0.0 6 November 2014 19 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Timing Specifications: Value Parameter Description Reqd. By Min Max Unit Notes t1 Power rail rise time, 10% to 90% Source 0.5 10 ms t2 Delay from LCD,VCCS to black video generation Sink 0 200 ms Automatic Black Video generation prevents display noise until valid video data is received from the Source (see Notes:2 and 3 below) t3 Delay from LCD,VCCS to HPD high Sink 0 200 ms Sink AUX Channel must be operational upon HPD high (see Note:4 below ) t4 Delay from HPD high to link training initialization Source - - ms Allows for Source to read Link capability and initialize t5 Link training duration Source - - ms Dependant on Source link training protocol t6 Link idle Source - - ms Min Accounts for required BS-Idle pattern. Max allows for Source frame synchronization t7 Delay from valid video data from Source to video on display Sink 0 50 ms Max value allows for Sink to validate video data and timing. At the end of T7, Sink will indicate the detection of valid video data by setting the SINK_STATUS bit to logic 1 (DPCD 00205h, bit 0), and Sink will no longer generate automatic Black Video t8 Delay from valid video data from Source to backlight on Source - - ms Source must assure display video is stable t9 Delay from backlight off to end of valid video data Source - - ms Source must assure backlight is no longer illuminated. At the end of T9, Sink will indicate the detection of no valid video data by setting the SINK_STATUS bit to logic 0 (DPCD 00205h, bit 0), and Sink will automatically display Black Video. (See Notes: 2 and 3 below) t10 Delay from end of valid video data from Source to power off Source 0 500 ms Black video will be displayed after receiving idle or off signals from Source t11 VCCS power rail fall time, 90% to 10% Source 0.5 10 ms - t12 VCCS Power off time Source 500 - ms - tA LED power rail rise time, 10% to 90% Source 0.5 10 ms - tB LED power rail fall time, 90% to 10% Source 0 10 ms -

Version 0.0 6 November 2014 20 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. tC Delay from LED power rising to LED dimming signal Source 1 - ms - tD Delay from LED dimming signal to LED power falling Source 1 - ms - tE Delay from LED dimming signal to LED enable signal Source 1 - ms - tF Delay from LED enable signal to LED dimming signal Source 1 - ms - Note (1) Please don’t plug or unplug the interface cable when system is turned on. Note (2) The Sink must include the ability to automatically generate Black Video autonomously. The Sink must automatically enable Black Video under the following conditions: - Upon LCDVCC power-on (within T2 max) - When the “NoVideoStream_Flag” (VB-ID Bit 3) is received from the Source (at the end of T9) - When no Main Link data, or invalid video data, is received from the Source. Black Video must be displayed within 50ms (max) from the start of either condition. Video data can be deemed invalid based on MSA and timing information, for example. Note (3) The Sink may implement the ability to disable the automatic Black Video function, as descri bed in Note (2), above, for system development and debugging purposes. Note ( 4) The Sink must support A UX Channel polling by the Source immediately following LCDVCC power-on without causing damage to the Sink device (the Source can re -try if the Sink is not ready). The Sink must be able to response to an A UX Channel transaction with the time specified within T3 max.

Version 0.0 6 November 2014 21 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 5. OPTICAL CHARACTERISTICS

5.1 TEST CONDITIONS

Ambient Temperature Ta 252 oC Ambient Humidity Ha 5010 %RH Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" LED Light Bar Input Current IL 150 mA The measurement methods of optical characteristics are shown in Section 5.2. The following items should be measured under the test conditions described in Section 5.1 and stable environment shown in Note (5). 5 .2 OPTICAL SPECIFICATIONS Item Symbol Condition Min. Typ. Max. Unit Note Contrast Ratio CR 500 700 - - (2), (5) ,(7) TR - 14 19 ms Response Time TF - 11 16 ms (3) ,(7) Average Luminance of White LAVE 255 300 - cd/m2 (4), (6) ,(7) Rx TBD - Red Ry TBD - Gx TBD - Green Gy TBD - Bx TBD - Blue By TBD - Wx 0.313 - Color Chromaticity White Wy x=0, Y =0 Viewing Normal Angle Typ – 0.03 0.329 Typ + 0.03 (1) ,(7) x+ 80 89 Horizontal x- 80 89 - Y+ 80 89 - Viewing Angle Vertical Y- CR10 80 89 - Deg. (1),(5) , (7) White Variation of 5 Points W5p x=0, Y =0 80 - - % (5),(6) , (7)

Version 0.0 6 November 2014 22 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Note (1) Definition of Viewing Angle (x, y): Note (2) Definition of Contrast Ratio (CR): The contrast ratio can be calculated by the following expression. Contrast Ratio (CR) = L63 / L0 L63: Luminance of gray level 63 L 0: Luminance of gray level 0 CR = CR (1) CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6). Note (3) Definition of Response Time (TR, TF): Note (4) Definition of Average Luminance of White (LAVE): Measure the luminance of White at 5 points 12 o’clock direction y+ = 90º 6 o’clock y- = 90º x x x- y+ y- x+ Normal x = y = 0º X+ = 90º X- = 90º 100% 90% 10% Gray Level 63 Gray Level 0 Gray Level 63 Time TF Optical Response TR 66.67 ms 66.67 ms

Version 0.0 6 November 2014 23 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. L (x) is corresponding to the luminance of the point X at Figure in Note (6) Note (5) Measurement Setup: The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt temperature change during measuring. In order to sta bilize the luminance, t he measurement should be executed after lighting Backlight for 20 minutes in a windless room. CS - 2000T 500 mm LCD M odule LCD P anel Center of the S creen Light Shield Room ( Ambient L uminance < 2 l u x) USB2000 Note (6) Definition of White Variation (W): Measure the luminance of White at 5 points / 13 points W5p = {Minimum [L (1)~ L (5)] / Maximum [L (1)~ L (5)]}*100% W13p = {Minimum [L (1) ~ L (13)] / Maximum [L (1) ~ L (13)]}*100% or equivalent or equivalent

Version 0.0 6 November 2014 24 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 6 7 8 2 3 4 5 11 12 13 9 10 W H 10mm 10mm W/4 W/4 W/4 W/4 H/4 10mm H/4 H/4 H/4 10mm Active area Note (7) The listed optical specifications refer to the initial value of manufacture, but the condition of the specifications after long-term operation will not be warranted. : Test Point X=1 to 13 X

Version 0.0 6 November 2014 25 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 6. RELIABILITY TEST ITEM Test Item Test Condition Note High Temperature Storage Test 60ºC, 240 hours Low Temperature Storage Test -20ºC, 240 hours Thermal Shock Storage Test -20ºC, 0.5hour←→60℃, 0.5hour; 100cycles, 1hour/cycle High Temperature Operation Test 50ºC, 240 hours Low Temperature Operation Test 0ºC, 240 hours High Temperature & High Humidity Operation Test 50°C, 80% RH, 240 hours (1) (2) ESD Test (Operation) 150pF, 330Ω, 1sec/cycle Condition 1 : Contact Discharge, ±8KV Condition 2 : Air Discharge, ±15KV (1) Shock (Non-Operating) 220G, 2ms, half sine wave,1 time for each direction of ±X,±Y,±Z (1)(3) Vibration (Non-Operating) 1.5G / 10-500 Hz, Sine wave, 30 min/cycle, 1cycle for each X, Y, Z (1)(3) Note (1) criteria : Normal display image with no obvious non-uniformity and no line defect. Note (2) Evaluation should be tested after storage at room temperature for more than two hour Note (3) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module would not be twisted or bent by the fixture.

Version 0.0 6 November 2014 26 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 7. PACKING

7.1 MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation. (a) Model Name: N173HCE – E31 (b) Revision: Rev. XX, for example: C1, C2 …etc. (c) Serial ID: X X X X X X X Y M D L N N N N Serial ID includes the information as below: (a) Manufactured Date: Year: 0~9, for 2010~2019 Month: 1~9, A~C, for Jan. ~ Dec. Day: 1~9, A~Y, for 1 st to 31st, exclude I , O and U (b) Revision Code: cover all the change (c) Serial No.: Manufacturing sequence of product (d) Product Line: 1 -> Line1, 2 -> Line 2, …etc. Product Line Year, Month, Date INNOLUX Internal Use Revision INNOLUX Internal Use Serial No. XXXXXXXYMDXNNNN N173HGE-E31

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7.2 CARTON

Figure. 7-2 Packing method

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7.3 PALLET

Figure. 7-3 Packing method

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7.4 UN-PACKAGING METHOD

Figure. 7.4 Un-packing method

Version 0.0 6 November 2014 30 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 8. PRECAUTIONS

8.1 HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not to twist or bend the module. (2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause electrical short or damage the polarizer. (3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and assembly process. (4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is very soft and easily scratched. (5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might permanently damage the polarizer due to chemical reaction. (6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they lef t on panel for a long time. (7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap. (8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC. (9) Do not disassemble the module. (10) Do not pull or fold the LED wire. (11) Pins of I/F connector should not be touched directly with bare hands.

8.2 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module within the specified storage conditions. (2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may damage LCD module when it is operating. (3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the response time will become slowly, and the starting voltage of LED will be higher than the room temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating. (2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This can prevent the CMOS LSI chips from damage during latch-up. (3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while assembling with converter. Do not disassemble the module or insert anything into the Backlight unit.

Version 0.0 6 November 2014 31 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Appendix. EDID DATA STRUCTURE The EDID (Extended Display Identification Data) data formats are to support displays as defined in the VESA Plug & Display and FPDI standards. TBD

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Version 0.0 6 November 2014 34 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Appendix. SYSTEM COVER DESIGN GUIDANCE 0. Permanent deformation of system cover after reliability test Definition System cover including front and rear cover may deform during reliability test. Permanent deformation of system front and rear cover after reliability test should not interfere with panel. Because it may cause issues such as pooling, abnormal display, white spot, and also cell crack. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference. 1. Design gap A between panel & any components on system rear-cover Definition Gap between panel’s maximum thickness boundary & system’s inner surface components such as wire, cable, extrusion is needed for preventing from backpack or pogo test fail. Because zero gap or interference may cause stress concentration. Issues such as pooling, abnormal display, white spot, and cell crack may occur. Maximum flatness of panel and system rear -cover should be taken into account for gap design. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference.

2 Design gap B1 & B2 between panel & protrusions

Version 0.0 6 November 2014 35 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition Gap between panel & protrusions is needed t o prevent shock test failure . Because protrusions with small gap may hit panel during the test. Issue such as cell crack, abnormal display may occur. The gap should be large enough to absorb the maximum displacement during the test. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference. 3 Design gap C between system front-cover & panel surface. Definition Gap between system front -cover & panel surface is needed to prevent pooling or glass broken. Zero gap or interference such as burr and warpage from mold frame may cause pooling issue near system font-cover opening edge. This phenomenon is obvious during swing test, hinge test, knock test, or during pooling inspection procedure. To remain sufficient gap, design with system rib higher than maximum panel thickness is recommended. Note: If the inter ference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference. 4 Design gap D1 & D2 between system front-cover & PCB Assembly.

Version 0.0 6 November 2014 36 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition Same as point 2 and 3, but focus on PCBA side.

5 Interference examination of antenna cable and WebCam wire

Antenna cable or WebCam wire should not overlap with panel outline. Because issue such as abnormal display & white spot after backpack test, hinge test, twist test or pogo test may occur. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference.

6 System rear-cover inner surface examination

Definition Burr at logo edge, step s, protrusions or PCB board may cause stress concentration. White spot or glass broken issue may occur during reliability test.

7 Tape/sponge design on system inner surface

Version 0.0 6 November 2014 37 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition To prevent abnormal display & white spot after scuffing test, hinge test, pogo test, backpack test, tape/sponge should be w ell covered under panel rear-cover. Because tape/sponge in separate location may act as pressure concentration location.

8 Material used for system rear-cover

Definition System rear-cover material with high rigidity is needed to resist deformation during scuffing test, hinge test, pogo test, or backpack test. Abnormal display, white spot, pooling issue may occur if low rigidity material is used. Pooling issue may occur because screw ’s boss positioning for module’s bracket are deformed during open-close test. Solid structure design of system rear -cover may also influence the rigidity of system rear-cover. The deformation of system rear-cover should not caused interference.

9 System base unit design near keyboard and mouse pad

Definition To prevent abnormal display & white spot after scuffing test, hinge test, pogo test, backpack test, sharp edge design in keyboard surface may damage panel during the test. We suggest to use slope edge design, or to reduce the thickness difference of keyboard/mouse pad from the nearby surface.

10 Screw boss height design

Version 0.0 6 November 2014 38 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition Screw boss height should be designed with respect to the height of bracket bottom surface to panel bottom surface + flatness change of panel itself. Because gap will exist between screw boss and bracket, if the screw boss height is smaller. As result while fastening screw, bracket will deformed and pooling issue may occur.

11 Assembly SOP examination for system front-cover with Hook design

Definition To prevent panel crack during system front -cover assembly process with hook design, it is not recommended to press panel or any location that related directly to the panel.

12 Assembly SOP examination for system front-cover with Double tape design

Definition To prevent panel crack during system front -cover assembly process with double tape design, it is only allowed to give slight pressure (MAX 3 Kgf/50mm2) with large contact area. This can help to distribute the stress and prevent stress concentration. We a lso suggest putting the system on a flat surface stage to prevent unequal stress distribution during the assembly.

13 System front-cover assembly reference with Double tape design

Version 0.0 6 November 2014 39 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition To prevent system front -cover peeling at double tape contact area, Height difference between system front -cover assembly reference such as wall or components stack (wire, spacer) and double tape top surface must be less than 0.05mm.

14 Touch Application : TP and LCD Module Combination for White Line Prevention

Polarizer edge to LCD AA distance can be derived by “AA~Outline” – “CF Pol~Outline” with respect to INX 2D Outline Drawing on each side.

Version 0.0 6 November 2014 40 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition For using in Touch Application: to prevent White Line appears between TP and LCD module combination, the maximum inspection angle location must not fall onto LCD polarizer edge, otherwise light line near edge of polarizer will be appear. Parameters such as TP VA to LCD AA distance, TP assembly tolerance, TP Ink printing tolerance, Sponge thickness and tolerance, and Maximum Inspection/Viewing Angle, must be considered with respect to LCD module ’s Polarizer edge location and to lerance. This consideration must be taken at all four edges separately. The goal is to find parameters combination that allow maximum inspection angle falls inside polarizer black margin area. Note: Information for Polarizer edge location and its toleranc e can be derived from INX 2D Outline Drawing (“AA ~Outline“ - “CF Pol~Outline”). Note: Please feel free to contact INX FAE Engineer. By providing value of parameters above on each side, we can help to verify and pass the white line risk assessment for cust omer reference.

15 Color of system front-cover material

Definition To prevent light leakage is seen at system front -cover due to material transparency, we suggest using dark color material (black) for system front-cover design.

16 Inspection spec of gap E between system front-cover to LCD module surface

Version 0.0 6 November 2014 41 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Definition To maintain gap E (gap of system front -cover to LCD module) in its inspection spec, especially at location with maximum LCD deformation (center of LCD length), we recommend adding spacer with design gap A smaller or equal to gap E. The allowable spacer mating location is on module metal frame outside LCD Active-Area. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference.

Version 0.0 6 November 2014 42 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. Appendix. LCD MODULE HANDLING MANUAL Purpose

  • This SOP is prepared to prevent panel dysfunction possibility through incorrect handling procedure.
  • This manual provides guide in unpacking and handling steps.
  • Any person which may contact / related with panel, should follow guide stated in this manual to prevent panel loss. 1. Unpacking 2. Panel Lifting

Version 0.0 6 November 2014 43 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited. 3. Do and Don’t

Version 0.0 6 November 2014 44 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited.

Version 0.0 6 November 2014 45 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited.

Version 0.0 6 November 2014 46 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited.

Version 0.0 6 November 2014 47 / 47 The copyright belongs to INNOLUX. Any unauthorized use is prohibited.