MMG3006NT1
Document overview
- Manufacturer or author: NXP Semiconductors
- PDF pages: 24
Technical content
Features
Frequency: 400- -2400 MHz P1dB: 33 dBm @ 900 MHz Small- -signal gain: 17.5 dB @ 900 MHz Third order output intercept point: 49 dBm @ 900 MHz Single 5 V supply Internally input prematched to 50 ohms 400- -2400 MHz, 17.5 dB 33 dBm InGaP HBT GPA MMG3006NT1 QFN 4 4- -16L Table 1. Typical Performance(1)
- VDC =5V d c ,TA =2 5C, 50 ohm system, application circuit
tuned for specified frequency. Table 2. Maximum Ratings Table 3. Thermal Characteristics
Table 4. Electrical Characteristics(VDC = 5 Vdc, 900 MHz, TA =2 5C, 50 ohm system, in NXP Application Circuit) Table 5. Functional Pin Description requires a DC- -blocking series capacitor. and requires a DC- -blocking series capacitor. VCC 16 Collector voltage supply. Table 6. ESD Protection Characteristics Table 7. Moisture Sensitivity Level Table 8. Ordering Information Figure 1. Pin Connections
50 OHM TYPICAL CHARACTERISTICS
Figure 2. Third Order Output Intercept Point Figure 3. MTTF versus Junction Temperature
50 OHM APPLICATION CIRCUIT: 900 MHz
Figure 4. 50 Ohm Test Circuit Schematic Table 9. 50 Ohm Test Circuit Component Designations and Values
Figure 5. 50 Ohm Test Circuit Component Layout
50 OHM TYPICAL CHARACTERISTICS: 900 MHz
Figure 6. Small- -Signal Gain (S21) versus Figure 7. Input Return Loss (S11) versus Figure 8. Output Return Loss (S22) versus Figure 9. P1dB versus Frequency Figure 10. Third Order Output Intercept
1 MHz Tone Spacing
Figure 11. Noise Figure versus Frequency
Figure 12. IS- -95 Adjacent Channel Power Ratio Figure 13. IS- -95 Adjacent Channel Power Ratio
50 OHM APPLICATION CIRCUIT: 1960 MHz
Figure 14. 50 Ohm Test Circuit Schematic Table 10. 50 Ohm Test Circuit Component Designations and Values
Figure 15. 50 Ohm Test Circuit Component Layout
50 OHM TYPICAL CHARACTERISTICS: 1960 MHz
Figure 16. Small- -Signal Gain (S21) versus Figure 17. Input Return Loss (S11) versus Figure 18. Output Return Loss (S22) versus Figure 19. P1dB versus Frequency Figure 20. Third Order Output Intercept Figure 21. Noise Figure versus Frequency
Figure 22. IS- -95 Adjacent Channel Power Ratio Figure 23. IS- -95 Adjacent Channel Power Ratio Figure 24. Single- -Carrier W- -CDMA Adjacent
50 OHM APPLICATION CIRCUIT: 2140 MHz
Figure 25. 50 Ohm Test Circuit Schematic Table 11. 50 Ohm Test Circuit Component Designations and Values
Figure 26. 50 Ohm Test Circuit Component Layout
50 OHM TYPICAL CHARACTERISTICS: 2140 MHz
Figure 27. Small- -Signal Gain (S21) versus Figure 28. Input Return Loss (S11) versus Figure 29. Output Return Loss (S22) versus Figure 30. P1dB versus Frequency Figure 31. Third Order Output Intercept Figure 32. Noise Figure versus Frequency
Figure 33. IS- -95 Adjacent Channel Power Ratio Figure 34. IS- -95 Adjacent Channel Power Ratio Figure 35. Single- -Carrier W- -CDMA Adjacent
Table 12. Common Emitter S- -Parameters(VDC =5V d c ,TA =2 5C, 50 Ohm System)
Table 12. Common Emitter S- -Parameters(VDC =5V d c ,TA =2 5C, 50 Ohm System)(continued)
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers AN3100: General Purpose Amplifier Biasing AN3778: PCB Layout Guidelines for PQFN/QFN Style Packages Requiring Thermal Vias for Heat Dissipation Software .s2p File Development Tools Printed Circuit Boards For Software and Tools, do a Part Number search at http://www.nxp.com, and select the “PartNumber” link. Go to Software & Tools on the part’s Product Summary page to download the respective tool. FAILURE ANALYSIS At this time, because of the physical characteristics of the part, failure analysis is limited to electrical signature analysis. In cases where NXP is contractually obligated to perform failure analysis (FA) services, full FA may be performed by third party vendors with moderate success. For updates contact your local NXP Sales Office.
REVISION HISTORY
The following table summarizes revisions to this document. Revision Date Description 0 Jan. 2008 Initial Release of Data Sheet 1 Mar. 2008 Corrected Table 7, Moisture Sensitivity Level Rating from 3 to 1, p. 3 Corrected S- -Parameter table frequency column label to read “MHz” versus “GHz”, pp. 17, 18 2 Mar. 2008 Corrected Tape and Reel information from 330 mm to 12 mm, p. 1 Corrected Figs. 24, 35, Single- -Carrier W- -CDMA Adjacent Channel Power Ratio versus Output Power y- -axis (ACPR) unit of measure to dBc, pp. 12, 16 3 May 2010 Added new Fig. 3, Third Order Output Intercept Point versus Output Power and Supply Current, p. 4 Added AN3778, PCB Layout Guidelines for PQFN/QFN Style Packages Requiring Thermal Vias for Heat Dissipation, Application Notes, p. 23 Added .s2p File availability to Product Software, p. 23 4 Jan. 2011 Corrected temperature at which ThetaJC is measured from 25Ct o8 9C and added “no RF applied” to Thermal Characteristics table to indicate that thermal characterization is performed under DC test with no RF signal applied, p. 1 Removed IDC bias callout from Table 10, Common SourceS- -Parameters heading as bias is not a controlled value, pp. 17- -18 Added Printed Circuit Boards availability to Development Tools, p. 23 5 Sept. 2014 Table 2, Maximum Ratings: updated Junction Temperature from 150C to 175C to reflect recent test results of the device, p. 1 Table 6, ESD Protection Characteristics, removed the word “Minimum” after the ESD class rating. ESD ratings are characterized during new product development but are not 100% tested during production. ESD ratings provided in the data sheet are intended to beused as a guideline when handling ESD sensitive devices, p. 2 Removed Fig. 2, Collector Current versus Bias Voltage at Pin #1, p. 3 Added Fig. 38, Product Marking, p. 18 Added Failure Analysis information, p. 22 (continued)
REVISION HISTORY (cont.) Revision Date Description 6 Dec. 2017 Fig. 37, Product Marking: updated to show locationof Pin 1 on Product Marking and updated date code line to reflect improved traceability information, p. 18
How to Reach Us: Home Page: nxp.com Web Support: nxp.com/support Document Number: MMG3006NT1 Rev. 6, 12/2017 Information in this document is provided solely to enablesystem and software implementers to use NXP products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation, orguarantee regarding the suitability of its products for any particularpurpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, andspecifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP sells products pursuant to standard terms and conditions of sale, which can be found at the following address:nxp.com/ SalesTermsandConditions. NXP, the NXP logo, Freescale and the Freescale logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. E 2008, 2010–2011, 2014, 2017 NXP B.V.