LTM8025 LINER
Document overview
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Technical content
FEATURES
APPLICATIONS
DESCRIPTION
36V, 3A Step-Down µModule Converter The L TM®8025 is a 36VIN, 3A step down μModule® con- verter . Included in the package are the switching controller , power switches, inductor and all support components. Operating over an input voltage range of 3.6V to 36V , the L TM8025 supports an output voltage range of 0.8V to 24V and a switching frequency range of 200kHz to 2.4MHz, each set by a single resistor . Only the bulk input and output fi lter capacitors are needed to fi nish the design. The low profi le package (4.32mm) enables utilization of unused space on the bottom of PC boards for high density point of load regulation. The L TM8025 is packaged in a thermally enhanced, compact (15mm × 9mm) and low profi le (4.32mm) over-molded land grid array (LGA) package suitable for automated assembly by standard surface mount equipment. The L TM8025 is RoHS compliant. L, L T , L TC, L TM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Complete Step-Down Switch Mode Power Supply n Wide Input Voltage Range: 3.6V to 36V n Up to 3A Output Current n Parallelable for Increased Output Current n 0.8V to 24V Output Voltage n Selectable Switching Frequency: 200kHz to 2.4MHz n Current Mode Control n (e4) RoHS Compliant Package with Gold Pad Finish n Programmable Soft-Start n Tiny, Low Profi le (15mm × 9mm × 4.32mm) Surface Mount LGA Package n Automotive Battery Regulation n Power for Portable Products n Distributed Supply Regulation n Industrial Supplies n Wall T ransformer Regulation Effi ciency OUTPUT CURRENT (mA) 100
8025 TA01b
EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000 VIN = 24V VIN RUN/SS SHARE RT ADJ VOUT GND
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VIN* 22V TO 36V *RUNNING VOL TAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS VOUT 12V AT 3A 47.5k 34.8k 4.7μF 22μF PGOOD SYNC AUX BIAS
V V (Note 1) ORDER INFORMATION PIN CONFIGURATION GND A B C BANK 1 BANK 2 BANK 3 D E F G H J K L 234 LGA PACKAGE 70-PIN (15mm s 9mm s 4.32mm) 567 V OUT VIN RT SHARE PGOOD ADJ SYNCRUN/SS AUX BIAS TJMAX = 125°C, θJA = 24.4°C/W , θJC(BOTTOM) = 11.5°C/W , θJC(TOP) = 42.7°C/W , θJB = 18.7°C/W θ VALUES DETERMINED PER JESD51-9, MAX OUTPUT POWER WEIGHT = 1.8 GRAMS ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VIN = 12V , RUN/SS = 12V , BIAS = 3V unless otherwise noted. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage l 3.6 V Output DC Voltage 0 < I OUT ≤ 3A; RADJ Open 0 < IOUT ≤ 3A; RADJ = 16.9k; VIN = 32V 0.8 V V Output DC Current V OUT = 3.3V 0 3 A Quiescent Current into VIN RUN/SS = 0V Not Switching BIAS = 0V , Not Switching 0.01 150 μA μA μA Quiescent Current into BIAS RUN/SS = 0V Not Switching BIAS = 0V , Not Switching 0.01 0.5 120 μA μA μA Line Regulation 5.5V < V IN < 36V , IOUT = 1A 0.3 % Load Regulation 0A < I OUT < 3A 0.4 % LEAD FREE FINISH TRAY PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TM8025EV#PBF L TM8025EV#PBF 8025V 70-Lead (15mm × 9mm × 4.32mm) LGA –40°C to 125°C L TM8025IV#PBF L TM8025IV#PBF 8025V 70-Lead (15mm × 9mm × 4.32mm) LGA –40°C to 125°C L TM8025MPV#PBF L TM8025MPV#PBF 8025MPV 70-Lead (15mm × 9mm × 4.32mm) LGA –55°C to 125°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear .com/packaging/
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TM8025E is guaranteed to meet performance specifi cations from 0°C to 125°C internal. Specifi cations over the full –40°C to 125°C internal operating temperature range are assured by design, PARAMETER CONDITIONS MIN TYP MAX UNITS Output Voltage Ripple (RMS) 0A < I OUT < 3A 10 mV Switching Frequency R T = 45.3k 775 kHz Voltage (at ADJ Pin) l 775 770 790 805 810 mV mV Current Out of ADJ Pin ADJ = 0V , V OUT = 1V 2 μA Minimum BIAS Voltage for Proper Operation 2 2.8 V RUN/SS Pin Current RUN/SS = 2.5V 5 10 μA RUN Input High Voltage 2.5 V RUN Input Low Voltage 0.2 V PGOOD Threshold (at ADJ Pin) V OUT Rising 710 mV PGOOD Leakage Current PGOOD = 30V 0.1 1 μA PGOOD Sink Current PGOOD = 0.4V 200 700 μA SYNC Input Low Threshold f SYNC = 550kHz 0.5 V SYNC Input High Threshold f SYNC = 550kHz 0.7 V SYNC Bias Current SYNC = 0V 0.1 μA The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VIN = 12V , RUN/SS = 12V , BIAS = 3V unless otherwise noted. (Note 2) characterization and correlation with statistical process controls. The L TM8025I is guaranteed to meet specifi cations over the full –40°C to 125°C internal operating temperature range. The L TM8025MP is guaranteed to meet specifi cations over the full –55°C to 125°C internal operating temperature range. Note that the maximum internal temperature is determined by specifi c operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors.
EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000
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LOAD CURRENT (mA) TYPICAL PERFORMANCE CHARACTERISTICS 2.5VOUT Effi ciency 3.3V OUT Effi ciency 5V OUT Effi ciency 8VOUT Effi ciency 12V OUT Effi ciency 18V OUT Effi ciency Bias Current vs Load Current 2.5VOUT Bias Current vs Load Current 3.3V OUT Bias Current vs Load Current OUT 100 EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000
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LOAD CURRENT (mA) 100 EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000
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5.5VIN 12VIN 24VIN 32VIN LOAD CURRENT (mA) 100 EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000
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LOAD CURRENT (mA) 100 EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000
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LOAD CURRENT (mA) 100 EFFICIENCY(%) 0 500 1000 1500 2000 2500 3000
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LOAD CURRENT (mA)
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LOAD CURRENT (mA)
10 BIAS CURRENT (mA)
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LOAD CURRENT (mA)
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LOAD CURRENT (mA) 10BIAS CURRENT (mA) 0 1000 2000 3000 12VIN 24VIN TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS Bias Current vs Load Current 8VOUT Bias Current vs Load Current 12V OUT Bias Current vs Load Current 18V OUT Input Current vs Load Current 2.5V OUT Input Current vs Load Current 3.3V OUT Input Current vs Load Current OUT Input Current vs Load Current OUT Input Current vs Load Current 12V OUT Input Current vs Load Current 18V OUT
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LOAD CURRENT (mA)
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LOAD CURRENT (mA) BIAS CURRENT (mA) 0 1000 2000 3000 24VIN
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LOAD CURRENT (mA) 120 100
20 BIAS CURRENT (mA)
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LOAD CURRENT (mA) 500 2500 2000 1500
1000 INPUT CURRENT (mA)
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5.5VIN 12VIN 24VIN 32VIN LOAD CURRENT (mA) 500 2500 2000 1500
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LOAD CURRENT (mA) 400 600 800 200 1600 1400 1200 1000INPUT CURRENT (mA) 0 1000 2000 3000
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LOAD CURRENT (mA) 500 2500 2000 1500
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LOAD CURRENT (mA) 500 3000 2500 2000 1500
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LOAD CURRENT (mA) 500 3000 2500 2000 1500 TA = 25°C, unless otherwise noted.
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LOAD CURRENT (mA) 4.0 6.5 7.5 7.0 6.0 5.5 5.0 4.5 INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED TYPICAL PERFORMANCE CHARACTERISTICS Input Current vs Input Voltage Output Shorted Minimum Input Running Voltage vs VOUT, IOUT = 3A Minimum Input Voltage vs Load Current, 3.3VOUT Minimum Input Voltage vs Load Current, 5V OUT Minimum Input Voltage vs Load Current, 8V OUT Minimum Input Voltage vs Load Current, 12V OUT Minimum Input Voltage vs Load Current, 18V OUT Minimum Input Voltage vs Load Current, –3.3V OUT Minimum Input Voltage vs Load Current, –5V OUT INPUT VOL TAGE (V) INPUT CURRENT (mA) 600 500 300 200 100 400
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OUTPUT VOL TAGE (V) INPUT VOL TAGE (V) 1471 0 1 1
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LOAD CURRENT (mA) 3.0 3.5 6.0 5.5 5.0 4.5 4.0 INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED
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LOAD CURRENT (mA) 22INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED
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LOAD CURRENT (mA) INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED
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LOAD CURRENT (mA) INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED TA = 25°C, unless otherwise noted.
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LOAD CURRENT (mA) 8.0 10.5 11.0 10.0 9.5 9.0 8.5 INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED
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LOAD CURRENT (mA) 20INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED
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LOAD CURRENT (mA) TEMPERATURE RISE (°C) 0 500 1000 1500 2000 2500 3000 3500 5VIN 12VIN 24VIN 32VIN TYPICAL PERFORMANCE CHARACTERISTICS Minimum Input Voltage vs Load Current, –8VOUT Minimum Input Voltage vs Load Current, –12V OUT Minimum Input Voltage vs Negative V OUT Junction Temperature Rise vs Load Current, 2.5V OUT Junction Temperature Rise vs Load Current, 3.3V OUT Junction Temperature Rise vs Load Current, 5V OUT Junction Temperature Rise vs Load Current, 8V OUT Junction Temperature Rise vs Load Current, 12V OUT Junction Temperature Rise vs Load Current, 18V OUT
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LOAD CURRENT (mA) 20INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED
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LOAD CURRENT (mA) INPUT VOL TAGE (V) 0 1000 2000 3000 TO RUN TO START RUN/SS CONTROLLED OUTPUT VOL TAGE (V)
10 INPUT VOL TAGE (V)
0 –5 –10 –15 0 500 1000 1500 2000 2500 3000 3500
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TEMPERATURE RISE (°C) 5VIN 12VIN 24VIN 32VIN LOAD CURRENT (mA) 0 500 1000 1500 2000 2500 3000 3500
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LOAD CURRENT (mA) TEMPERATURE RISE (°C) 12VIN 24VIN 32VIN
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LOAD CURRENT (mA) TEMPERATURE RISE (°C) 0 500 1000 1500 2000 2500 3000 3500 12VIN 24VIN 32VIN TA = 25°C, unless otherwise noted.
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LOAD CURRENT (mA) 120 100 TEMPERATURE RISE (°C) 0 500 1000 1500 2000 2500 3000 16VIN 24VIN 32VIN
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LOAD CURRENT (mA) 100 TEMPERATURE RISE (°C) 0 500 1000 1500 2000 24VIN 32VIN
VOUT (Bank 1): Power Output Pins. Apply the output fi lter capacitor and the output load between these pins and GND pins. GND (Bank 2): Tie these GND pins to a local ground plane below the L TM8025 and the circuit components. In most applications, the bulk of the heat fl ow out of the L TM8025 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. Return the feedback divider (R ADJ) to this net. VIN (Bank 3): The VIN pin supplies current to the L TM8025’s internal regulator and to the internal power switch. This pin must be locally bypassed with an external, low ESR capacitor; see Table 1 for recommended values. AUX (Pin G5): Low Current Voltage Source for BIAS. In many designs, the BIAS pin is simply connected to V OUT. The AUX pin is internally connected to VOUT and is placed adjacent to the BIAS pin to ease printed circuit board rout- ing. Although this pin is internally connected to V OUT, it is not intended to deliver a high current, so do not draw current from this pin to the load. If this pin is not tied to BIAS, leave it fl oating. BIAS (Pin H5): The BIAS pin connects to the internal power bus. Connect to a power source greater than 2.8V and less than 25V . If the output is greater than 2.8V , connect this pin there. If the output voltage is less, connect this to a voltage source between 2.8V and 25V . Also, make sure that BIAS + V IN is less than 56V . RUN/SS (Pin L5): Pull the RUN/SS pin below 0.2V to shut down the L TM8025. Tie to 2.5V or more for normal operation. If the shutdown feature is not used, tie this pin to the V IN pin. RUN/SS also provides a soft-start function; see the Applications Information section. SYNC (Pin L6): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to a stable voltage source greater than 0.7V to disable Burst Mode operation. Do not leave this pin fl oating. Tie to a clock source for synchroniza- tion. Clock edges should have rise and fall times faster than 1μs. See the Synchronization section in Applications Information. RT (Pin G7): The RT pin is used to program the switching frequency of the L TM8025 by connecting a resistor from this pin to ground. Table 2 gives the resistor values that correspond to the resultant switching frequency. Minimize the capacitance at this pin. SHARE (Pin H7): Tie this to the SHARE pin of another L TM8025 when paralleling the outputs. Otherwise, do not connect. PGOOD (Pin J7): The PGOOD pin is the open-collector output of an internal comparator . PGOOD remains low until the ADJ pin is within 10% of the fi nal regulation voltage. PGOOD output is valid when V IN is above 3.6V and RUN/SS is high. If this function is not used, leave this pin fl oating. ADJ (Pin K7): The L TM8025 regulates its ADJ pin to 0.79V . Connect the adjust resistor from this pin to ground. The value of R ADJ is given by the equation RADJ = 394.21/(VOUT – 0.79), where RADJ is in kΩ.
The L TM8025 is a standalone nonisolated step-down switching DC/DC power supply that can deliver up to 3A of output current. This module provides a precisely regulated output voltage programmable via one external resistor from 0.8V to 25V . The input voltage range is 3.6V to 36V . Given that the L TM8025 is a step-down converter , make sure that the input voltage is high enough to support the desired output voltage and load current. As shown in the Block Diagram, the L TM8025 contains a current mode controller , power switching element, power inductor , power Schottky diode and a modest amount of input and output capacitance. The L TM8025 is a fi xed frequency PWM regulator . The switching frequency is set by simply connecting the appropriate resistor value from the RT pin to GND. An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the V IN pin, but if the BIAS pin is connected to an external volt- age higher than 2.8V , bias power will be drawn from the external source (typically the regulated output voltage). This improves effi ciency. The RUN/SS pin is used to place the L TM8025 in shutdown, disconnecting the output and reducing the input current to less than 1μA. To further optimize effi ciency, the L TM8025 automatically switches to Burst Mode ® operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50μA in a typical application. The oscillator reduces the L TM8025’s operating frequency when the voltage at the ADJ pin is low. This frequency foldback helps to control the output current during start- up and overload. The L TM8025 contains a power good comparator which trips when the ADJ pin is at roughly 90% of its regulated value. The PGOOD output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PGOOD pin high. Power good is valid when the L TM8025 is enabled and V IN is above 3.6V . The L TM8025 is equipped with a thermal shutdown that will inhibit power switching at high junction tempera- tures. The activation threshold of this function, however , is above 125°C to avoid interfering with normal operation. Thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. 8025 BD VIN 8.2μH 4.4μF0.2μF CURRENT MODE CONTROLLER RUN/SS SHARE SYNC AUX BIAS GND RT ADJPGOOD VOUT 15pF 499k Burst Mode is a registered trademark of Linear Technology Corporation.
For most applications, the design process is straight forward, summarized as follows: 1. Look at Table 1 and fi nd the row that has the desired input range and output voltage. 2. Apply the recommended CIN, COUT, RADJ and RT values. 3. Connect BIAS as indicated. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Bear in mind that the maximum output current is limited by junction tempera- ture, the relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the graphs in the Typical Performance Characteristics section for guidance. The maximum frequency (and attendant R T value) at which the L TM8025 should be allowed to switch is given in Table 1 in the f MAX column, while the recommended frequency (and RT value) for optimal effi ciency over the given input condition is given in the f OPTIMAL column. There are additional conditions that must be satisfi ed if the synchronization function is used. Please refer to the Synchronization section for details. Capacitor Selection Considerations The C IN and C OUT capacitor values in Table 1 are the minimum recommended values for the associated oper- ating conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Ceramic capacitors are small, robust and have very low ESR. However , not all ceramic capacitors are suitable. X5R and X7R types are stable over temperature and ap- plied voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage coeffi cients of capacitance. In an application cir- cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. Ceramic capacitors are also piezoelectric. In Burst Mode operation, the L TM8025’s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. Since the L TM8025 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear . If this audible noise is unacceptable, use a high perfor- mance electrolytic capacitor at the output. It may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor . A fi nal precaution regarding ceramic capacitors concerns the maximum input voltage rating of the L TM8025. A ceramic input capacitor combined with trace or cable inductance forms a high Q (under damped) tank circuit. If the L TM8025 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi- bly exceeding the device’s rating. This situation is easily avoided; see the Hot-Plugging Safely section. Frequency Selection The L TM8025 uses a constant frequency PWM architec- ture that can be programmed to switch from 200kHz to 2.4MHz by using a resistor tied from the RT pin to ground. Table 2 provides a list of R T resistor values and their re- sultant frequencies.
Table 1: Recommended Component Values and Confi guration (TA = 25°C) VIN VOUT CIN COUT RADJ BIAS f OPTIMAL RT(OPTIMAL) fMAX RT(MIN) 3.6V to 36V 0.8V 10μF , 50V , 1210 4× 100μF , 6.3V , 1210 Open 2.8V to 25V 230kHz 182k 250kHz 169k 3.6V to 36V 1.5V 10μF , 50V , 1210 4× 100μF , 6.3V , 1210 549k 2.8V to 25V 270kHz 154k 360kHz 113k 31V to 36V 24V 1μF , 50V , 1206 22μF , 25V , 1812 16.5k 2.8V to 25V 1MHz 34k 2.4MHz 8.25k 3.6V to 15V 0.8V 10μF , 25V , 1210 4× 100μF , 6.3V , 1210 Open V IN 230kHz 182k 575kHz 66.5k 3.6V to 15V 1.5V 10μF , 25V , 1210 4× 100μF , 6.3V , 1210 549k V IN 270kHz 154k 840kHz 42.2k 3.6V to 15V 1.8V 10μF , 25V , 1210 4× 100μF , 6.3V , 1210 383k V IN 285kHz 147k 1.0MHz 34k 9V to 24V 0.8V 4.7μF , 25V , 1206 4× 100μF , 6.3V , 1210 Open V IN 270kHz 154k 360kHz 113k 9V to 24V 1.5V 4.7μF , 25V , 1206 4× 100μF , 6.3V , 1210 549k V IN 310kHz 133k 550kHz 69.8k 9V to 24V 1.8V 4.7μF , 25V , 1206 3× 100μF , 6.3V , 1210 383k V IN 330kHz 124k 620kHz 60.4k 9V to 24V 2.5V 4.7μF , 25V , 1206 100μF , 6.3V , 1206 226k V IN 345kHz 118k 800kHz 44.2k 9V to 24V 3.3V 4.7μF , 25V , 1206 100μF , 6.3V , 1206 154k AUX 425kHz 93.1k 1MHz 34k 18V to 36V 0.8V 1μF , 50V , 1206 4× 100μF , 6.3V , 1210 Open 2.8V to 25V 230kHz 182k 250kHz 169k 18V to 36V 1.5V 1μF , 50V , 1206 4× 100μF , 6.3V , 1210 549k 2.8V to 25V 270kHz 154k 360kHz 113k 18V to 36V 1.8V 1μF , 50V , 1206 3× 100μF , 6.3V , 1210 383k 2.8V to 25V 300kHz 137k 420kHz 95.3k 18V to 36V 2.5V 1μF , 50V , 1206 100μF , 6.3V , 1206 226k 2.8V to 25V 345kHz 118k 540kHz 71.5k 18V to 36V 3.3V 1μF , 50V , 1206 100μF , 6.3V , 1206 154k AUX 385kHz 105k 675kHz 54.9k 18V to 36V 5V 1μF , 50V , 1206 47μF , 16V , 1210 93.1k AUX 500kHz 76.8k 950kHz 36.5k Note: An input bulk capacitance is required. Do not allow V IN + BIAS to exceed 56V . Refer to the Typical Performance Characteristics section for load conditions.
Table 2. Switching Frequency vs RT Value L TM8025 if the output is overloaded or short circuited. the Typical Applications section. reduced, resulting in higher effi ciency. above 0.7V . Do not leave the SYNC pin fl oating.
Figure 1. To Soft-Start the L TM8025, Add a Resistor and minimum voltage to start at light loads is lower , about 4.3V . the RUN/SS pin reaches 2.5V .
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function of how far the output is below the target voltage. potentially large output capacitance of the load. maintain regulation instead. SHDN pin, the SW pin current will drop to essentially zero.
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Figure 2. The Input Diode Prevents a Shorted Input from
- Place the CIN capacitor as close as possible to the VIN
and GND connection of the L TM8025.
- Place the C OUT capacitor as close as possible to the
VOUT and GND connection of the L TM8025.
- Place the C IN and C OUT capacitors such that their
- Connect all of the GND connections to as large a copper
components and the L TM8025.
- For good heatsinking, use vias to connect the GND cop-
their proximity to internal power handling components. Figure 3. Layout Showing Suggested External Components, GND thermal vias than a board that uses larger holes.
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The L TM8025 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power . The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The temperature rise curves given in the Typical Performance Characteristics section can be used as a guide. These curves were generated by a L TM8025 mounted to a 58cm 2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior , so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions. The junction to air and junction to board thermal resis- tances given in the Pin Confi guration diagram may also be used to estimate the L TM8025 internal temperature. These thermal coeffi cients are determined for maximum output power per JESD 51-9 “JEDEC Standard, Test Boards for Area Array Surface Mount Package Thermal Measure- ments” through analysis and physical correlation. Bear in mind that the actual thermal resistance of the L TM8025 to the printed circuit board depends upon the design of the circuit board. The die temperature of the L TM8025 must be lower than the maximum rating of 125°C, so care should be taken in the layout of the circuit to ensure good heat sinking of the L TM8025. The bulk of the heat fl ow out of the L TM8025 is through the bottom of the module and the LGA pads into the printed circuit board. Consequently a poor printed circuit board design can cause excessive heating, result- ing in impaired performance or reliability. Please refer to the PCB Layout section for printed circuit board design suggestions. The L TM8025 is equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. The activation threshold of this function, however , is above 125°C to avoid interfering with normal operation. Thus, it follows that prolonged or repetitive operation under a condition in which the thermal shutdown activates neces- sarily means that the internal components are subjected to temperatures above the 125°C rating for prolonged or repetitive intervals, which may damage or impair the reliability of the device. Finally, be aware that at high ambient temperatures the internal Schottky diode will have signifi cant leakage current increasing the quiescent current of the L TM8025.
1.8V Step-Down Converter VIN RUN/SS SHARE RT ADJ VOUT GND
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3.6V TO 24V VOUT 1.8V AT 3A 147k 383k 10μF 300μF PGOOD SYNC AUX BIAS 2.5V Step-Down Converter VIN RUN/SS SHARE RT ADJ VOUT GND
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VIN* 4.1V TO 36V VOUT 2.5V AT 3A 137k 226k 4.7μF PGOOD SYNC AUX BIAS3.3V *RUNNING VOL TAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS 200μF 3.3V Step-Down Converter VIN RUN/SS SHARE RT ADJ VOUT GND
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VIN* 5.5V TO 36V VOUT 3.3V AT 3A 118k 154k 4.7μF 100μF PGOOD SYNC AUX BIAS *RUNNING VOL TAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS 8V Step-Down Converter VIN RUN/SS SHARE RT ADJ VOUT GND
8025 TA05
VIN* 11V TO 36V VOUT 8V AT 3A 69.8k 54.9k 4.7μF 47μF PGOOD SYNC AUX BIAS *RUNNING VOL TAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
–5V Negative Output Converter VIN RUN/SS SHARE RT ADJ VOUT GND
8025 TA06
VIN* 7.5V TO 30V VOUT –5V AT 2A 93.1k 93.1k 4.7μF 100μF PGOOD SYNC AUX BIAS *RUNNING VOL TAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS T wo L TM8025s in Paralel, 2.5V at 5.5A VIN RUN/SS SHARE RT ADJ VOUT GND L TM8025 VIN* 4.1V TO 36V VOUT 2.5V AT 5.6A 137k 113k PGOOD SYNC AUX BIAS VIN RUN/SS SHARE RT ADJ VOUT GND
8025 TA07
2.2μF 2.2μF 300μF PGOOD SYNC AUX BIAS *RUNNING VOL TAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS NOTE: SYNCHRONIZE THE TWO MODULES TO AVOID BEAT FREQUENCIES, IF NECESSARY. OTHERWISE, TIE EACH SYNC TO GND
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO-222, SPP-010 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 70 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE SYMBOL aaa bbb eee TOLERANCE 0.15 0.10 0.05 4.22 – 4.42 DETAIL B DETAIL B SUBSTRATE MOLD CAP 0.27 – 0.37 3.95 – 4.05 // bbb Z Z BSC PACKAGE TOP VIEW BSC PAD 1 CORNER X Y aaa Z aaa Z DETAIL A 7.62 BSC 1.27 BSC 12.70 BSC LKJHGFEDCB PACKAGE BOTTOM VIEW C(0.30) PAD 1 PADS SEE NOTES A DETAIL A 0.635 ±0.025 SQ. 70x S YXeee 0.000 1.270 1.270 2.540 2.540 3.810 3.810 6.350 6.350 3.810 3.810 5.080 5.080 2.540 2.540 1.270 1.270 0.000 LGA 70 1007 REV Ø LTMXXXXXX μModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PAD “A1” SUGGESTED PCB LAYOUT TOP VIEW 70-Lead (15mm × 9mm × 4.32mm) (Reference L TC DWG # 05-08-1817 Rev Ø)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION Pin Assignment Table (Arranged by Pin Number) PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME A1 V OUT B1 V OUT C1 V OUT D1 V OUT E1 GND F1 GND A2 V OUT B2 V OUT C2 V OUT D2 V OUT E2 GND F2 GND A3 V OUT B3 V OUT C3 V OUT D3 V OUT E3 GND F3 GND A4 V OUT B4 V OUT C4 V OUT D4 V OUT E4 GND F4 GND A5 GND B5 GND C5 GND D5 GND E5 GND F5 GND A6 GND B6 GND C6 GND D6 GND E6 GND F6 GND A7 GND B7 GND C7 GND D7 GND E7 GND F7 GND PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME G1 GND H1 - J1 V IN K1 V IN L1 V IN G2 GND H2 - J2 V IN K2 V IN L2 V IN G3 GND H3 - J3 V IN K3 V IN L3 V IN G4 GND H4 - J4 - K4 - L4 - G5 AUX H5 BIAS J5 GND K5 GND L5 RUN/SS G6 GND H6 GND J6 GND K6 GND L6 SYNC G7 RT H7 SHARE J7 PGOOD K7 ADJ L7 GND
Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 2009 LT 0709 • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS L TM4600/L TM4602 10A and 6A DC/DC μModule Pin Compatible, 4.5V ≤ VIN ≤ 28V , 15mm × 15mm × 2.8mm LGA Package L TM4601/L TM4603 12A and 6A DC/DC μModule Pin Compatible; Remote Sensing; PLL, T racking and Margining, 4.5V ≤ V IN ≤ 28V L TM4604 4A, Low V IN DC/DC μModule 2.375V ≤ VIN ≤ 5.5V , 0.8V ≤ VOUT ≤ 5V , 9mm × 15mm × 2.3mm LGA Package L TM4606 Low EMI 6A, 28V DC/DC μModule 4.5V ≤ VIN ≤ 28V , 0.6V ≤ VOUT ≤ 5V , 15mm × 15mm × 2.8mm LGA Package L TM8020 200mA, 36V DC/DC μModule 4V ≤ VIN ≤ 36V , 1.25V ≤ VOUT ≤ 5V , 6.25mm × 6.25mm × 2.32mm LGA Package L TM8022 1A, 36V DC/DC μModule 3.6V ≤ VIN ≤ 36V , 0.8V ≤ VOUT ≤ 10V , 11.25mm × 9mm × 2.82mm LGA Package L TM8023 2A, 36V DC/DC μModule 3.6V ≤ VIN ≤ 36V , 0.8V ≤ VOUT ≤ 10V , 11.25mm × 9mm × 2.82mm, LGA Package PACKAGE PHOTOGRAPH