LTC5100 LINER
Document overview
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Technical content
FEATURES
n Gigabit Ethernet and Fibre Channel Transceivers n SFF and SFP Transceiver Modules n Proprietary Fiber Optic Links , LTC and LT are registered trademarks of Linear Technology Corporation. n 155Mbps to 3.2Gbps Laser Diode Driver for VCSELs* n 60ps Rise and Fall Times, 10ps Deterministic Jitter n Eye Diagram is Stable and Consistent Across Modulation Range and Temperature n 1mA to 12mA Modulation Current n Easy Board Layout, Laser can be Remotely Located if Desired n No Input Matching or AC Coupling Components Needed n On-Chip ADC for Monitoring Critical Parameters n Digital Setup and Control with I2C TM Serial Interface n Emulation and Set-Up Software Available** n Operates Standalone or with a Microprocessor n On-Chip DACs Eliminate External Potentiometers n Constant Current or Automatic Power Control n First and Second Order Temperature Compensation n On-Chip Temperature Sensor n Extensive Eye Safety Features n Single 3.3V Supply n 4mm · 4mm QFN Package 3.3V, 3.2Gbps VCSEL Driver I2C is a trademark of Philips Electronics N.V. *Vertical Cavity Surface Emitting Laser **Downloadable from www.linear.com Figure 1. VCSEL Transmitter with Automatic Power Control signal from the power supply to minimize RFI. back and statistical process control. ture drift and provides extensive laser safety features. WARNING: POTENTIAL EYE HAZARD.
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IN+, IN– (Cml_en = 1) (Note 6) IN+, IN– (Cml_en = 0) (Note 4).. –0.3V to V DD(HS) + 0.3V Cml_en = 0 (Note 4) MODA, MODB Ambient Operating Temperature Range .. – 40°C to 85°C ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W (Note 1) ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C; VDD = VDD(HS) = 3.3V, IS = 24mA; IM = 12mA (IMPP = 24mA); 49.9W , 1% resistor from SRC (Pin 14) to MODA (Pin 11); 50W , 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5. ORDER PART NUMBER UF PART MARKING 5100 LTC5100EUF TJMAX = 125°C, qJA = 37°C/W EXPOSED PAD IS VSS (PIN 17) MUST BE SOLDERED TO PCB GROUND PLANE 16 15 14 13 5 6 7 8 TOP VIEW UF PACKAGE 16-LEAD (4mm · 4mm) PLASTIC QFN 1VSS IN+ IN– VSS VSS MODA MODB V SS VDD EN SRC MD FAULT SDA SCL V DD(HS) 1/16 of Full-Scale IS Current PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply VDD, VDD(HS) Operating Voltage l 3.135 3.3 3.465 V VDD + VDD(HS) Quiescent Current, V DD = 3.465V Excluding the SRC Pin Current (Note 2) Transmitter Disabled, Power_down_en = 1 4.5 mA Transmitter Enabled, Is_rng = Im_rng = 3 54 mA Impp = 24mA High Speed Data Inputs (IN+ and IN– Pins) (Test Circuit, Figure 5) Input Signal Amplitude Peak-to-Peak Differential Voltage (The Single- 500 to 2400 mV P-P Ended Peak-to-Peak Voltage is One Half the Differential Voltage) Common Mode Input Signal Range (Note 3) Cml_en = 0 (Note 4) 0 V DD(HS) V Differential Input Resistance 80 to 120 W Common Mode Input Resistance Cml_en = 0 (Note 5) 50 k W Open-Circuit Voltage Cml_en = 0 (Note 5) 1.65 V SRC Pin Current, IS Full-Scale IS Current Is_rng = 0 6 9 mA Is_rng = 1 12 18 mA Is_rng = 2 18 27 mA Is_rng = 3 24 36 mA Minimum Operating Current (Note 7) Resolution 10 Bits SRC Pin Voltage Range 1.2 V DD –V 200mV
ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C; VDD = VDD(HS) = 3.3V, IS = 24mA; IM = 12mA (IMPP = 24mA); 49.9W , 1% resistor from SRC (Pin 14) to MODA (Pin 11); 50W , 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5. 1/8 of Full-Scale Peak-to-Peak Modulation Current PARAMETER CONDITIONS MIN TYP MAX UNITS Laser Bias Current, IB Full-Scale Current (Note 8) Is_rng = 0 6 – I M 9 – IM mA Is_rng = 1 12 – I M 18 – IM mA Is_rng = 2 18 – I M 27 – IM mA Is_rng = 3 24 – I M 36 – IM mA Absolute Accuracy SRC Pin and MODA, MODB Pin Currents Within –25 % Specified Voltage Ranges Resolution 10 Bits Linear Tempco Resolution 122 ppm/ °C Linear Tempco Range –15625 ppm/ °C Second Order Tempco Resolution 3.81 ppm/ °C2 Second Order Tempco Range –488 ppm/ °C2 Temperature Stability Ib_tc1 = 0, Ib_tc2 = 0 –500 ppm/ °C Off-State Leakage Transmitter Disabled, V SRC = 1.2V 50 mA MODA, MODB Pin Current, IM Full Scale, Peak-to-Peak Modulation Current (Note 9) Im_rng = 0 6 9 mA Im_rng = 1 12 18 mA Im_rng = 2 18 27 mA Im_rng = 3 24 36 mA Minimum Operating Current (Note 10) Resolution (Note 11) 9 Bits Current Stability Im_tc1 = 0, Im_tc2 = 0 –500 ppm/ °C Voltage Range Peak Transient Voltage on MODA and MODB 1.2 2.7 V Absolute Accuracy of the Modulation Current –25 % Linear Tempco Resolution 122 ppm/ °C Linear Tempco Range –15625 ppm/ °C Second Order Tempco Resolution 3.81 ppm/ °C2 Second Order Tempco Range –484 ppm/ °C2 Maximum Bit Rate 3.2 Gbps Modulation Current Rise and Fall Times 20% to 80% Measured with K28.5 Pattern at 60 ps 2.5Gbps Deterministic Jitter, Peak-to-Peak (Note 12) Measured with K28.5 Pattern at 3.2Gbps 10 ps Random Jitter, RMS (Note 13) 1p s RMS Pulse Width Distortion 10 ps Automatic Power Control (Note 14) Minimum Operating Current for the Monitor Diode 20% of Full Scale (Note 15) Monitor Diode Current Temperature Stability Imd_tc1 = 0, Imd_tc2 = 0 –500 ppm/ °C Monitor Diode Bias Voltage (Note 16) I MD £ 1600mA 1.45 V
ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C; VDD = VDD(HS) = 3.3V, IS = 24mA; IM = 12mA (IMPP = 24mA); 49.9W , 1% resistor from SRC (Pin 14) to MODA (Pin 11); 50W , 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5. PARAMETER CONDITIONS MIN TYP MAX UNITS Automatic Power Control (Note 14) Temperature Compensation (Note 17) Linear Tempco Resolution 254 • Imd_nom/1024 ppm/ °C Linear Tempco Range –32300 • Imd_nom/1024 ppm/ °C ADC Resolution 10 Bits Source Current Measurement, IS (SRC Pin Current) Full Scale Is_rng = 0 9 mA Is_rng = 1 18 mA Is_rng = 2 27 mA Is_rng = 3 36 mA Accuracy –3% of Full Scale –25% of Reading Average Modulation Current Measurement, IM (Note 18) Full Scale Im_rng = 0 9 mA Im_rng = 1 18 mA Im_rng = 2 27 mA Im_rng = 3 36 mA Accuracy –3% of Full Scale –25% of Reading Laser Diode Voltage Measurement Full Scale 3.5 V Accuracy –150mV –10% of Reading Monitor Diode Current Measurement (Note 19) Full Scale Imd_rng = 0 34 mA Imd_rng = 1 136 mA Imd_rng = 2 544 mA Imd_rng = 3 2176 mA Zero Scale ADC Code = 0 1/8 of Full Scale Resolution Relative to Reading 0.2 % Accuracy –25% of Reading Temperature Measurement Full Scale Celsius 239 °C Sensitivity 0.500 °C/LSB Termination Resistor Voltage Measurement Full Scale Is_rng = 0 400 mV Is_rng = 1 800 mV Is_rng = 2 1200 mV Is_rng = 3 1600 mV Accuracy –30mV –10% of Reading Safety Shutdown, Undervoltage Lockout (UVLO) Undervoltage Detection V DD Decreasing 2.8 V Undervoltage Detection Hysteresis 150 mV
ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C; VDD = VDD(HS) = 3.3V, IS = 24mA; IM = 12mA (IMPP = 24mA); 49.9W , 1% resistor from SRC (Pin 14) to MODA (Pin 11); 50W , 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5. PARAMETER CONDITIONS MIN TYP MAX UNITS Bias Current Limit, IB(LIMIT) Set Point Resolution 7 Bits Set Point Range Is_rng = 0 9 mA Is_rng = 1 18 mA Is_rng = 2 27 mA Is_rng = 3 36 mA Optical Power Limit Automatic Power Control Mode Only, Apc_en = 1 Overpower Limit Expressed in % Over the Imd Set Point 50 % Underpower Limit Expressed in % Under the Imd Set Point –50 % Safety Shutdown Response Time Time from the Fault Occurance to Reduction of 100 ms the Laser Bias Current to 10% of Nominal FAULT Output, Open-Drain Mode, Flt_drv_mode = 0 Output Low Voltage I OL = 3.3mA 0.4 V Output High Leakage Current V FAULT = 2.4V 10 mA FAULT Output, Open-Drain Mode with 330mA Internal Pull Up, Flt_drv_mode = 1 Output Low Voltage I OL = 3.3mA 0.4 V Output High Current V FAULT = 2.4V –280 mA FAULT Output, Open-Drain Mode with 500mA Internal Pull Up, Flt_drv_mode = 2 Output Low Voltage I OL = 3.3mA 0.4 V Output High Current V FAULT = 2.4V –425 mA FAULT Output, Complementary Drive Mode, Flt_drv_mode = 3 Output High Voltage I OH = –3.3mA 2.4 V Output Low Voltage I OL = 3.3mA 0.4 V EN Input, Ib_gain or (Apc_gain in APC Mode) = 16, Im_gain = 4, Is_rng = 0, Im_rng = 0 Input Low Voltage 0.8 V Input High Voltage 2V Input Low Current En_polarity = 0 (EN Active Low), V EN = 0V –10 mA Input High Current En_polarity = 0 (EN Active Low), V EN = VDD –10 to 10 mA Input Low Current En_polarity = 1 (EN Active High), V EN = 0V –10 to 10 mA Input High Current En_polarity = 1 (EN Active High), V EN = VDD 10 mA Transmit Enable Time Time from Active Transition on EN to 95% of 100 ms Nominal Laser Power and 95% of Full Modulation. First Time Transmission is Enabled After Power On or with Rapid_restart_en = 0 Transmit Re-Enable Time Time from Active Transition on EN to 95% of 1 ms Nominal Laser Power and 95% of Full Modulation. When Transmission is Re-Enabled After the First Time and with Rapid_restart_en = 1 Transmit Disable Time Time from Inactive Transition on EN to 5% of 10 ms Nominal Laser Power Minimum Pulse Width Required to Clear 10 ms a Latched Fault
ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD = VDD(HS) = 3.3V, IS = 24mA; IM = 12mA (IMPP = 24mA); 49.9W , 1% resistor from SRC (Pin 14) to MODA (Pin 11); 50W , 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to VSS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5. Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The quiescent VDD and VDD(HS) currents refer to the current with zero SRC pin current (i.e., the laser is operating with zero bias current and zero modulation current). The total power supply current is the quiescent current plus the SRC pin current, I S, plus any current sinked from IN+ and IN–. Note 3: The peak transient voltage at the IN+ and IN– pins must not exceed the range of –300mV to VDD(HS) + 300mV. Note 4: When Cml_en = 0 (not in CML mode), the termination is 100W differential with 50k common mode to VDD(HS)/2. Note 5: The common mode input resistance is measured relative to VDD(HS)/2 with the inputs tied together. Note 6: When Cml_en = 1 (CML mode), the termination is nominally 50W to VDD(HS) on each of the IN+ and IN– pins. Note 7: The SRC pin current can be programmed to near zero in each range, but the recommended minimum operating level is 1/16 of full scale. Note 8: The laser bias current is the average current delivered to the laser. It is equal to the SRC pin current minus the average modulation current at the MODA and MODB pins, or I B = IS – IM. Full scale for the bias current therefore depends on Is_rng and the actual modulation current. Note 9: The MODA and MODB pins are connected on-chip. The modulation current refers to the sum of the currents on these pins. IM refers to the total average current at the MODA and MODB pins. IMPP refers to the total peak-to-peak modulation current at the MODA and MODB pins. IMPP differs from the laser modulation current, IMOD. IMPP splits between the laser and the termination resistor according to IMOD = IMPP • RT/(RT + RLD), where RT is the value of the termination resistor and RLD is the dynamic resistance of the laser diode. PARAMETER CONDITIONS MIN TYP MAX UNITS SCL, SDA SCL, SDA Input Low Voltage, VIL –0.5 0.3 • V VDD SCL, SDA Input High Voltage, VIH 0.7 • V DD +V VDD 0.5 SCL, SDA Input Low Current (Note 21) V SDA, VSCL = 0.1 • VDD –100 mA SCL, SDA Input High Current (Note 21) V SDA, VSCL = 0.9 • VDD –100 mA SCL, SDA Output Low Voltage I OL = 3mA 0 0.4 V Hysteresis 280 mV Serial Interface Timing (Note 20) SCL Clock Frequency 100 kHz Hold Time (Repeated) START Condition. After This 4 ms Period the First Clock Pulse is Generated Low Period of the SCL Clock 4.7 ms High Period of the SCL Clock 4 ms Set-Up Time for a Repeated START Condition 4.7 ms Data Hold Time 0 3.45 ms Data Set-Up Time 250 ns Input Rise Time of Both SDA and SCL Signals 1000 ns Output Fall Time of SCL and SDA from VIH(MIN) to 300 ns VIL(MAX) with a Bus Capacitance from 10pF to 400pF Set-Up Time for STOP Condition 4 ms Bus Free Time Between a STOP and START Condition 4.7 ms Capacitive Load for Each Bus Line 400 pF Noise Margin at the LOW Level for Each Connected 0.1 • V Device (Including Hysteresis) VDD Noise Margin at the HIGH Level for Each Connected 0.2 • V Device (Including Hysteresis) VDD
ELECTRICAL CHARACTERISTICS
Note 10: The modulation current can be programmed to near zero in each range, but the high speed performance is not guaranteed for currents less than the specified minimum. Note 11: The effective resolution of the modulation current is 9 bits because the modulation servo system uses only one-half of the 10-bit ADC range. Note 12: As defined in ANSI x3.230, Annex A, deterministic jitter is the peak-to-peak deviation of the 50% crossings of the modulation signal when compared to the ideal time crossings. The specification for the LTC5100 pertains to the electrical modulation signal. The K28.5 pattern is the repeating sequence 00111110101100000101. Note 13: Random jitter is the standard deviation of the 50% crossings of the electrical modulation signal as measured by an oscilloscope. It is measured with a 1GHz square wave after quadrature subtraction of the random jitter of the pulse generator and oscilloscope. Peak-to-peak random jitter is defined as 14 times the RMS random jitter. Note 14: The LTC5100 digitizes and servo controls the logarithm of the monitor diode current. Many of the characteristics of the APC system, such as range and resolution, are determined by the ADC. Note 15: The minimum practical operating current for the monitor diode is determined by servo settling time considerations. Note 16: I MD must be less than 25mA, 100mA, 400mA and 1600mA corresponding to Imd_rng = 0, 1, 2, 3. Note 17: The temperature coefficients of the monitor diode current depend on the IMD setting because of the logarithmic relationship between the set point and the monitor diode current. Imd_nom is the digital code setting for the nominal monitor diode current. Imd_nom lies between 0 and 1023. Note 18: The ADC digitizes the average modulation current, which is 50% of the peak-to-peak current for a 50% duty cycle signal. Note 19: The LTC5100 ADC digitizes the logarithm of the monitor diode current. This implies that the ADC resolution is a constant percentage of reading and that the monitor diode current is non-zero when the ADC reads zero. See the Design Notes for further information. Note 20: Serial interface timing is guaranteed by design from –40°C to 85°C. Note 21: The LTC5100 has 100mA nominal pull-up current sources on the SCL and SDA pins to eliminate the need for external pull-up resistors when connected to a single EEPROM device. The LTC5100 meets the maximum rise time specification of 1000ns with external I 2C bus capacitances up to 25pF. Example: 10pF EEPROM + 150mm trace ~ 25pF. Note 22: VDD and VDD(HS) must be tied together on the PC board.
TYPICAL PERFOR A CE CHARACTERISTICS UW VDD = VDD(HS) = 3.3V, TA = 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5. Optical Eye Diagram at 3.2Gbps with 850nm VCSEL 100mW/DIV 50ps/DIV 5100 G01 EMCORE MODE LC-TOSA VCSEL
215 PRBS, 7dB EXTINCTION RATIO, 300mW AVG
PWR, 2.4GHz 4TH ORDER BESSEL-THOMPSON LOWPASS FILTER Optical Eye Diagram at 2.5Gbps with 850nm VCSEL 125mW/DIV 60ps/DIV 5100 G02 EMCORE MODE LC-TOSA VCSEL
215 PRBS, 10dB EXTINCTION RATIO, 300mW AVG
PWR, 1.87GHz 4TH ORDER BESSEL-THOMPSON LOWPASS FILTER Effect of Peaking Control on the Electrical Eye Diagram 3mA/DIV 50ps/DIV 5100 G03 3.2Gbps, 223 PRBS, Im_rng = 2, IMPP = 12mA, PEAKING = 4, 8, 16, 30 Electrical Eye Diagram at 25°C 3.2Gbps, 223 PRBS, IMPP = 3mA 0.5mA/DIV 49ps RISING 50ps/DIV 5100 G04 54ps FALLING Im_rng = 0 PEAKING = 16 Electrical Eye Diagram at 25°C 3.2Gbps, 223 PRBS, IMPP = 12mA 2mA/DIV 51ps RISING 50ps/DIV 5100 G05 59ps FALLING Im_rng = 2 PEAKING = 16 Electrical Eye Diagram at 25°C 3.2Gbps, 223 PRBS, IMPP = 24mA 4mA/DIV 50ps RISING 50ps/DIV 5100 G06 62ps FALLING Im_rng = 3 PEAKING = 16 Electrical Eye Diagram at –40°C, 3.2Gbps, 223 PRBS, IMPP = 12mA 2mA/DIV 47ps RISING 50ps/DIV 5100 G07 56ps FALLING Im_rng = 2 PEAKING = 16 Electrical Eye Diagram at 85°C, 3.2Gbps, 223 PRBS, IMPP = 12mA 2mA/DIV 57ps RISING 50ps/DIV 5100 G09 67ps FALLING Im_rng = 2 PEAKING = 16 2mA/DIV
TYPICAL PERFOR A CE CHARACTERISTICS UW VDD = VDD(HS) = 3.3V, TA = 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5. Supply Current vs Modulation Level (Excluding Laser Current) Supply Current vs Temperature Modulator Output Resistance vs Modulation Level Impp (mA) IDD + IDD(HS) (mA)
40 Im_rng
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Im_rng Im_rng
2 Im_rng
AND Power_down_en = 0 TRANSMIT DISABLED AND Power_down_en = 1 TRANSMIT ENABLED TEMPERATURE (°C) –40 48.1 48.0 47.9 47.8 47.7 47.6 47.5 47.4 20 60
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–20 0 40 80 IDD + IDD(HS) (mA) Im_rng = 3 Impp = 12mA Ib = 0.0mA (INCLUDES SRC PIN CURRENT REQUIRED TO SUPPLY THE AVERAGE MODULATION CURRENT Impp (mA)
100 OUTPUT RESISTANCE (Ω )
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vs Temperature in CCC Mode Monitor Diode Current vs Temperature in APC Mode TEMPERATURE (°C) –40
0.97 IB (NORMALIZED)
0.98 0.99 1.00 1.01 –20 0 20 40
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NORMALIZED TO UNITY AT 25°C Ib_tc1 = Ib_tc2 = 0 TEMPERATURE (°C) –40
0.97 IMD (NORMALIZED)
0.98 0.99 1.00 1.01 –20 0 20 40
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NORMALIZED TO UNITY AT 25°C Imd_tc1 = Imd_tc2 = 0 Laser Modulation Current vs Temperature, Im_rng = 1 TEMPERATURE (°C) –40
0.97 IMPP (NORMALIZED)
0.98 0.99 1.00 1.01 –20 0 20 40
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NORMALIZED TO UNITY AT 25°C Im_tc1 = Im_tc2 = 0 Rise and Fall Times vs IM at the Midpoint of Each Im_rng Deterministic Jitter vs IMPP for Im_rng = 3 IMPP (mA) 20% TO 80% RISE AND FALL TIMES (ps) 369 1 2
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Im_rng tFALL tRISE Im_rng IMPP (mA) 20% TO 80% RISE AND FALL TIMES (ps) 6 12 15 27
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IMPP (mA) DETERMINISTIC JITTER (ps)
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vs IMPP for Im_rng = 3
TYPICAL PERFOR A CE CHARACTERISTICS UW VDD = VDD(HS) = 3.3V, TA = 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Transmitter Enable 5µs/DIV
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5µs/DIV
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Transmitter Enable, Rapid Restart 10µs/DIV
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Response to Fault Fault Recovery Time 10µs/DIV
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5µs WIDE PULSE ON EN Hot Plug with EN Active in CCC Mode 10ms/DIV
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Hot Plug with EN Active in APC Mode 10ms/DIV
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Start-Up with Slow Ramping Supply in APC Mode 10ms/DIV
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VSS (Pins 1, 4, 9, 12, 17): Ground for Digital, Analog and High Speed Circuitry. These pins are internally connected. Connect Pins 1, 4, 9 and 12 to the ground plane with minimal trace lengths. Place a minimum of four vias (preferably nine vias) to the ground plane in the Exposed Pad area. Most of the high speed modulation current is returned through the Exposed Pad (Pin 17). IN+, IN– (Pins 2, 3): High Speed Laser Modulation Inputs. The inputs are differential with internal termination resis- tors. The input amplifier is internally AC coupled. With current mode logic (CML) enabled, the inputs are indepen- dently terminated to V DD(HS) with 50 W resistors. With CML disabled, the inputs provide 100W differential termi- nation and permit rail-to-rail common mode range. The input pins can be AC coupled with external capacitors. When externally AC coupled, the input pins self-bias to V DD(HS)/2. The Cml_en bit selects the termination mode. FAULT (Pin 5): Signals One of Five Safety Fault Con- ditions: laser overcurrent, overpower, underpower, power supply undervoltage and memory load error. The pin can be programmed active high or active low with the Flt_pin_polarity bit. The FAULT pin can be programmed to four different drive modes with the Flt_drv_mode bits. SDA, SCL (Pins 6, 7): Serial Interface Data and Clock Signals. The pins are open drain with a 100mA internal pull- up current. An external pull-up resistor can be added to drive larger capacitive loads. V DD(HS) (Pin 8): Power Input for the High Speed Laser Modulation Circuitry. Filter this pin with a ferrite bead and bypass the pin directly to the ground plane with a 10nF ceramic capacitor. MODA, MODB (Pins 11, 10): High Speed Laser Modula- tion Outputs. MODA and MODB are connected on-chip and driven by an open-drain output transistor. One of these pins should be connected to the laser. The other should be connected to a termination resistor. See the Applications Information section for details. MD (Pin 13): Monitor Diode Input for Automatic Power Control of the Laser Bias Current. The MD pin allows connection to the cathode or anode of the monitor diode. The Md_polarity bit selects the polarity of the monitor diode. SRC (Pin 14): Current Source for Biasing the Laser. See the Applications Information section for details. EN (Pin 15): Transmitter Enable and Disable Input. This input is TTL compatible and can be programmed for active high or active low operation with the En_polarity bit. An internal 10mA current source disables the transmitter if the EN pin becomes disconnected. This safety feature oper- ates whether the EN pin is active high or active low. V DD (Pin 16): Power Input for Digital and Low Speed Analog Circuitry. Connect this pin to VDD(HS) (Pin 8) with a short trace. No bypassing is needed at the VDD pin if the trace length to the VDD(HS) bypass capacitor is less than 10mm long.
5 BITS
10 BITS
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7 BITS
Figure 2. Block Diagram
Figure 3. Functional Diagram—Automatic Power Control Mode
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14 SRC
5 FAULT
Figure 4. Functional Diagram—Constant Current Control Mode
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Figure 5. Test Circuit
0 EN ACTIVE LOW
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1 EN ACTIVE HIGH
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Figure 6. Equivalent Circuit for the EN Pin Figure 7. Equivalent Circuit for the SDA and SCL Pins
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Figure 8. Equivalent Circuit for the FAULT Pin.
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2 IN+
3 IN–
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Figure 10. Equivalent Circuit for the IN+ and IN– Pins Figure 11. Equivalent Circuit for the SRC, MODA and MODB Pins ing) are needed to build a complete fiber optic transmitter. ter enable controls and other interlocks. and monitor diode response characteristics. clean eye diagrams in spite of laser impedance variations. allows for packaging flexibility within the module.
speed current switch to produce the required modulation. speed modulation current to the laser and ground system. speed signal path, further improving modulation speed. power supply noise generation. delivered by the chip at the MODA, MODB pins is called IM. and average modulation current. the high speed data is assumed to have a 50% duty cycle. Figure 12. Simplified Laser Bias and Modulation Circuit Figure 13. Components of the LTC5100 Source and
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tion currents are as follows.
- (3) where RT is the termination resistor value. RLD is the dynamic resistance of the laser, defined in Figure 15. The expression for IB in Equation 1 shows that the maxi- mum achievable laser bias current is a function of the maximum source current, IS, and the average modulation
the laser characteristics and the termination resistor value. Figure 14. Components of the Laser Bias
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current, defined in Figure 16. limits given in the Electrical Characteristics.
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Figure 15. Approximate VI Curve for a Laser Diode Figure 16. Approximate LI Curve for a Laser Diode
monitor photodiode current. In each case the fundamental calculation is the same. The LTC5100’s digital controller multiplies the nominal value of the quantity (IB, IM or IMD) by a quadratic function of temperature. Temperature mea- surements are supplied either by an on-chip temperature sensor or by an external microprocessor, according to the setting of Ext_temp_en. The general temperature com- pensation formula is: I = I_nom • (TC2 • 2 where I is the digital representation of the laser bias current, modulation current or monitor diode current (IB, IM or IMD). When using the internal temperature sensor (Ext_temp_en = 0), the temperature measurements are taken by the on- chip ADC, and DT is the change in the LTC5100 die tem- perature relative to a user defined nominal temperature: DT = T_int_adc – T_nom (13) When using an external temperature source (Ext_temp_en = 1), the temperature measurements are provided in digital form by a microprocessor or host computer and DT is the change in temperature relative to a user defined nominal temperature: DT = T_ext –T_nom (14) T_int_adc, T_ext, and T_nom are 10-bit, unsigned numbers scaled at 0.5K/LSB. The maximum temperature that can be represented is therefore 2 10 • 0.5°K = 512°K or 239°C. TC1 and TC2 are the first and second order temperature coefficients. They correspond to the registers Im_tc1 and Im_tc2 for modulation current, Ib_tc1 and Ib_tc2 for bias current and Imd_tc1 and Imd_tc2 for monitor diode current. In each case TC1 and TC2 are 8-bit signed numbers in two’s complement format. The range of the temperature coefficients is therefore –128 to +127. When TC1 is multiplied by its weighting coefficient of 2 –13 in Equation 12, the effective value of the first order tempera- ture coefficient is 122ppm/ °C per LSB. The full-scale range is approximately –15500 ppm/ °C. When TC2 is multiplied by its weighting coefficient of 2–18 in Equation 12, the effective value of the second order temperature coefficient is 3.81ppm/°C 2 per LSB. The full-scale range is approximately –484 ppm/°C2. Note that Equation 12 is applied to the digital representa- tion of the currents, not the physical current themselves. This is a particularly important point where monitor diode current is concerned, because the digital representation of the monitor diode current is the logarithm of the current. Thus the temperature compensation is of the logarithm of the monitor diode current and not the current itself. Notation Used for Registers and Bit Fields The LTC5100 has a large set of registers, many of which are subdivided into fields of bits. Register names are given in all capitals (SYS_CONFIG) and bit fields are given in mixed case (Apc_en). For example, the bit that enables Automatic Power Control mode is contained in the System Configuration register. This bit is denoted by: SYS_CONFIG.Apc_en In many cases this bit field will simply be referred to as “Apc_en.” The functional diagrams of Figure 3 and Figure 4 show registers and bit fields within registers between horizontal bars. For example, the “Data” field in the ADC register is shown as: USER_ADC.Data A write operation to this register is shown as: USER_ADC.Data A register read operation is shown as: Peaking Range Selection for the Source and Modulation Currents The source and modulation currents each have four ranges of operation to optimize ADC and DAC resolution as well as high frequency performance. The source current range is controlled by two bits called Is_rng. Similarly, the modu- lation current range is controlled by two bits called Im_rng. The maximum current that can be delivered is proportional to the range, so the current output is 1, 2, 3 or 4 times the typical base value of 9mA for the source current and 4.5mA for the average modulation current or 9mA peak- to-peak. OPERATIOU
changes in IB and IM into account. Im_rng should take temperature changes into account. the laser is high frequency line loss. Figure 17. Ranges for the Source Current Figure 18. Ranges for the Modulation Current Figure 19. High Speed Details of the Modulation Output
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board trace is needed to connect to the laser. driver. To select CML compatibility, program Cml_en to 1. bias to approximately VDD(HS)/2. much as 300mV beyond the rail during peak excursions. Figure 21. High Speed Current Flow in the Modulation Output
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Figure 20. Wave Propagation in the Laser Interconnect
of ones or zeros in the data. modulation current control loop. actual value produces the servo loop error signal, Im_error. voltage range of the modulation output. Im_gain/8, takes on the discrete values 0, 1/8, 2/8, …, 7/8. Performance Characteristics. Figure 22. Step Response of the Average Modulation Current
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microprocessor, according to the setting of Ext_temp_en. ture coefficients for the modulation current. order temperature coefficients. current limits over temperature. Figure 23. Detail of the Monitor Photodiode Circuit
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Source and Modulation Currents. producing 250 servo iterations per second. achieving constant settling times under all conditions.
- _ Im_ · ln( ) ()
- ± · 8 20 Is rng rng ER ER RR R TL D T where: ln(8) = 2.079 is the natural logarithm of 8 ER is the extinction ratio R T is the termination resistance RLD is the dynamic resistance of the laser diode Apc_gain is a 5-bit digital value, so the scaling factor, Apc_gain/32, takes on the discrete values 0, 1/32, 2/32, …, 31/32. In practice, the extinction ratio is usually high (ER >> 1), and R T ~ RLD, so Equation 20 simplifies to: A Apc gain Is rng rng» + _ · _ Im_32 (21) OPERATIOU
Figure 24. Operating Ranges for the Monitor Diode Current
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time are independent of these highly varying quantities. exponential settling characteristic of a first order system. lope, is shown in the Typical Performance Characteristics. microprocessor, according to the setting of Ext_temp_en. temperature coefficients for the monitor diode current. where IMD is the physical monitor diode current in Amps. Figure 25. Step Response of the Monitor
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second order temperature coefficients. producing 250 servo iterations per second.
- _± _ =+ + 32 1 32 1 Ib_gain is a 5-bit digital value, so the scaling factor, Ib_gain/32, takes on the discrete values 0, 1/32, 2/32, …, 31/32. If Ib_gain • (Is_rng + 1) = 16, then Ib_gain • (Is_rng + 1)/32 = 0.5 and the error in the control loop is cut in half with each servo iteration. In this case the step response of the loop is given by, assuming Im_nom = 0 : Ib adc Ib set Ib gain Is rng n n Łç ö Ø º Œ Œ ø ß œ œ 11 1 (28) The step response has the familiar exponential settling characteristic of a first order system. The step response is shown in Figure 26 for Ib_gain
- (Is_rng + 1) = 16. The remaining error is reduced by one-half with each servo iteration. In seven iterations, or about 28ms, the laser bias current settles to under 1% in this example. The mea- sured step response is shown in the Typical Performance Characteristics. OPERATIOU Ib_adc 0 4 8 12 16 20 24 28 32
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Figure 26. Step Response of the Laser Bias
- (Is_rng + 1) = 1, the residual loop error is cut by 1/32 with each servo iteration. In this case it would take 145 servo iterations (about 580ms) to settle to 1%. With Ib_gain • (Is_rng + 1) = 31, the residual servo loop error is cut by 31/ 32 with each servo iteration. In this case it would take only two servo iterations (about 8ms) to settle to 1%. Setting Im_nom „ 0 slows the settling time of the laser bias current somewhat. This effect can easily be compen- sated by increasing Ib_gain. Temperature Compensation The set point value for the laser bias current, Ib_set in Figure 4, can change with temperature to compensate the temperature dependence of the laser diode’s threshold current. Temperature measurements are supplied either
microprocessor, according to the setting of Ext_temp_en. ture coefficients for the laser bias current. diagram for enabling the transmitter and detecting faults. high or active low operation with the En_polarity bit.
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Figure 27. State Diagram for Transmitter Enable and Fault Detection
and modulation current through a feedback process. Faults are latched in compliance with GBIC requirements. Table 1. Fault Detection and Handling
fault has occurred. For example, the software in the host system may need to evaluate the cause of the fault before shutting down the laser. If Auto_shutdn_en = 1, the LTC5100 automatically disables the transmitter after a fault. If Auto_shutdn_en = 0, data transmission continues after a fault. The transmitter is not disabled until the host system drives the EN pin inactive or clears the Soft_en bit. Low power supply voltage and memory load errors are considered hard faults and always disable the transmitter, regardless of the setting of Auto_shutdn_en. The LTC5100 implements the GBIC protocol for prevent- ing software from repeatedly re-enabling a faulted trans- mitter. When a first fault is detected, it can be cleared by disabling the transmitter. If the transmitter is re-enabled and a second fault occurs within 25ms after fault detection is enabled, the transmitter is permanently disabled. Only cycling power to the LTC5100 can clear this condition. This feature is called “Repeated Fault Inhibit” and can be overridden by setting the Repeated_flt_inhibit bit to zero. The FAULT pin can be configured active high or active low with the Flt_pin_polarity bit. The FAULT pin can be pro- grammed for open drain, 330mA internal pull-up, 500mA internal pull-up or complementary (push-pull) drive with the two Flt_drv_mode bits. Refer to Figure 8 for an equivalent circuit of the FAULT pin. The FAULT pin can be overridden in software for testing purposes or to allow a microprocessor in the transceiver module to fully control the module’s fault output. If the Flt_pin_override bit is set, then the Force_flt bit fully controls the state of the FAULT pin. The state of the LTC5100 can be monitored by reading the FLT_STATUS register. See Table 21 for a description of the status bits. EYE SAFETY INFORMATION Communications lasers can emit levels of optical power that pose an eye safety risk. While the LTC5100 provides certain fault detection features, these features alone do not ensure that a laser transmitter using the LTC5100 is compliant with IEC 825 or the regulations of any particu- lar agency. The user must analyze the safety require- ments of their transceiver module or system, activate the appropriate laser safety features of the LTC5100, and take any additional precautions needed to ensure compliance of the end product with the requirements of the relevant regulatory agencies. In particular, the LTC5100 produces laser currents in response to digitally programmed com- mands. The user must ensure software written to control the LTC5100 does not cause excessive levels of radiation to be emitted by the laser. POWER CONSUMPTION AND POWER MANAGEMENT The power consumption of the LTC5100 is dependent on several variables, including the modulation current range (set by Im_rng), the laser bias and modulation levels, and the state of the transmitter (whether enabled or disabled.) If Power_down_en = 1, the LTC5100 turns off its high speed amplifiers when the transmitter is disabled, reduc- ing supply current to less than 5mA (typical). See the Typical Performance Chacteristics for further information. HIGH SPEED PEAKING CONTROL The LTC5100 has the ability to selectively peak the falling edge of the modulation waveform to accelerate the turn-off of the laser diode. The 5-bit PEAKING register controls this function. See the Typical Performance Chacteristics for further information. Lower values in the PEAKING register increase the falling edge peaking. ANALOG-TO-DIGITAL CONVERSION Overview The ADC in the LTC5100 is a 10-bit, dual slope integrating converter with excellent linearity and noise rejection. A multiplexer allows digitizing six quantities:
- SRC pin current, I S
- Average modulation current, I M
- Laser diode voltage, V LD
- Monitor diode current, I MD
- Termination resistor voltage, V TERM
- Die temperature, T All of these measurements are available to the user via the I 2C serial bus. OPERATIOU
Table 2. ADC Conversion Sequence
1 T T T_INT_ADC
4 User User USER_ADC
the quantity it actually holds. three-bit field USER_ADC.Adc_src_sel (see Table 23). of accessing the USER_ADC register. to convert ADC digital codes to real-world quantities. total control of setting up the LTC5100.
Table 3. Example of User ADC Cycle Access
4 User (V TERM)V TERM 0V TERM(1)
4 User (V LD)V TERM 0V TERM(2)
4 User (V LD)V LD 0V LD(1)
4 User (V LD)V LD 1V LD(2)
Figure 28. I2C Serial Read/Write Sequences (LTC5100 Responses are Shown in Bold Italics) Table 4. Legend for the I2C Protocol
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LTC5100 are documented in Table 7 through Table 30.
to 16k bits and from where it gets its data. The LTC5100 supports hot plugging in standalone mode. 300ms t_init period required by the GBIC specification. Table 5. EEPROM Memory Map
15 Reserved Peaking (4:0)
14 Ib_gain(4:0)/Apc_gain(4:0) Im_gain(2:0)
13 Reserved Imd_rng(1:0) T_nom(9:8)
12 T_nom(7:0)
11 Im_tc2(7:0)
10 Im_tc1(7:0)
9 Reserved Im_rng(1:0) Im_nom(9:8)
8 Im_nom(7:0)
7 Ib_tc2(7:0)/Imd_tc2(7:0)
6 Ib_tc1(7:0)/Imd_tc2(7:0)
5 Reserved Is_rng(1:0) Ib_nom(9:8)/Imd_nom (9:8)
4 Ib_nom(7:0)/Imd_nom(7:0)
3 Reserved Rep_flt_inhibit Rapid_restart_en Flt_drv_mode
1 Reserved Ib_limit
0 Cml_en Md_polarity Ext_temp_en Power_down_en Apc_en En_polarity Soft_en Operating_mode
Table 6. Effective Base Addresses for Various Sized EEPROMs
16 Bytes of the
communicate with the LTC5100. guaranteed not to collide with the LTC5100.
Table 7. Register Set Overview
Table 8. Register: SYS_CONFIG—System Configuration (I 2C Command Code 0x10) Selects the Source of Temperature Measurements for Temperature Compensation. Allow Power Reduction When the Transmitter is Disabled. 0: No Power Reduction When the Transmitter is Disabled. 1: Reduce Power Consumption When Transmitter is Disabled by Turning Off the High Speed Amplifiers. Select the Means of Controlling the Laser Bias Current. Set the Input Polarity of the EN Pin. 0: Active Low: A Logic Low Input Level Enables the Transmitter. 1: Active High: A Logic High Input Level Enables the Transmitter. Note: In order to Enable the Transmitter, Both the EN Pin and Soft_en Bit Must be Asserted. Enables Transmitter Through the Serial Interface. Note: In order to Enable the Transmitter, Both the EN Pin and Soft_en Bit Must be Asserted. Select Whether the LTC5100 Operates Autonomously or Under External Control. 0: Standalone Operation: Configuration Parameters are Loaded from an External EEPROM at Power Up.
Table 9. Register: LOOP_GAIN—Control Loop Gain (I 2C Command Code 0x1E) Mode) 51 Bit Field Differs in Constant Current Control (CCC) Mode and in Automatic Power Control (APC) Mode. 40 In CCC Mode, This Bit Field is Called lb_gain. In APC Mode, This Bit Field is Called Apc_gain. Settling of the Laser Bias Current for any Value of Is_rng. 1 0 This Bit Field Modifies the Open-Loop Gain of the Modulation Current Servo Loop. The Open-Loop. Default Value of Im_gain Yields Stable but Slow Settling of the Laser Modulation Current. Table 10. Register: PEAKING—High Speed Modulation Peaking (I 2C Command Code 0x1F) 10 can be Used to Compensate for Slow Laser Turn-Off Characteristics. Table 11. Register: Reserved—Reserved for Internal Use. This Register is for Test Puposes Only. Do Not Write to this Register .Reserved 6 1 Reserved for Internal Use, Do Not Write. .Reserved 2 1 Reserved for Internal Use, Do Not Write.
Table 12. Register: IB (IMD)—Laser Bias Current Register (Monitor Diode Current in APC Mode) (I 2C Command Code 0x15) 10 0 Is_rng Sets the Full-Scale Range of the SRC Pin Current. The Table Below Shows the Available Ranges. See the Electrical Specifications for Guaranteed Limits in Each Range. (.Imd_nom in 8 0 This Bit Field has Different Functions Depending on Apc_en. APC Mode) 7 0 This Bit Field is an Unsigned 10-Bit Integer.
60 Constant Current Control (CCC) Mode (Apc_en = 0): Ib_nom Sets the Laser Bias Current at
20 Automatic Power Control (APC) Mode (Apc_en = 1): Imd_nom Sets the Monitor Diode Current at the
Table 13. Register: IB_TC1 (IMD_TC1)—Laser Bias/Monitor Diode Current First Order Temperature Coefficient in APC Mode) 6 0 This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127. 5 0 This Bit Field has Different Functions Depending on Apc_en.
40 Constant Current Control (CCC) Mode (Apc_en = 0): Ib_tc1 Sets the First Order Temperature
30 Coefficient for the Laser Bias Current. The Nominal Scaling is 2–13/°C or 122ppm/°C per LSB.
20 Automatic Power Control (APC) Mode (Apc_en = 1): Imd_tc1 Sets the First Order Temperature
in the Operation Section for Details.
Table 14. Register: IB_TC2 (IMD_TC2)—Laser Bias/Monitor Diode Current Second Order Temperature Coefficient in APC Mode) 6 0 This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127. 5 0 This Bit Field has Different Functions Depending on Apc_en.
40 Constant Current Control (CCC) Mode (Apc_en = 0): Ib_tc2 Sets the Second Order Temperature
30 Coefficient for the Laser Bias Current. The Nominal Scaling is 2–18/°C2 or 3.81ppm/°C2 per LSB.
20 Automatic Power Control (APC) Mode (Apc_en = 1): Imd_tc2 Sets the Second Order Temperature
in the Operation Section for Details. Table 15. Register: IM—Laser Modulation Current (I 2C Command Code 0x19) See the Electrical Specifications for Guaranteed Limits in Each Range. MODB Pins are Tied Together On Chip). 70 the MODA and MODB Pins. (The MODA and MODB Pins are Tied Together On Chip). 60 The Peak-to-Peak Current is Twice the Average Current for a Data Stream with 50% Duty Cycle.
Table 16. Register: IM_TC1—Laser Modulation Current First Order Temperature Coefficient (I 2C Command Code 0x1A) 6 0 This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127. is 2–13/°C or 122ppm/°C per LSB. Table 17. Register: IM_TC2—Laser Modulation Current Second Order Temperature Coefficient (I 2C Command Code 0x1B) 6 0 This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127. 40 Scaling is 2–18/°C2 or 3.81ppm/°C2 per LSB. Table 18. Register: T_EXT—External Temperature (I 2C Command Code 0x0D)
80 Integer)
7 0 By Convention the Scaling of T_ext is 512K or 239 °C Full Scale, Corresponding to 0.5°C/LSB.
60 However, Any Scaling is Permissible as Long as the Temperature Compensation Coefficients are Also
4 0 T_ext = (T + 273 °C)/0.5°C, Where T is the External Temperature in Degrees Celsius.
Table 19. Register: T_NOM—Nominal Temperature (Includes Imd_rng) (I 2C Command Code 0x1D) 10 0 Imd_rng Sets the Full-Scale Range of the Monitor Diode Current. 4 0 T_nom = (T + 273 °C)/0.5°C, Where T is the Nominal Temperature in Degrees Celsius.
Table 20. Register: FLT_CONFIG—Fault Configuration (Refer also to Table 1) (I 2C Command Code 0x13) 0: Allow Repeated Attempts to Clear a Fault and Re-enable the Transmitter. Time, t_on, from the GBIC Specification. SRC_DAC and MOD_DAC Registers. Soft_en Bit in the SYS_CONFIG Register. 1: Enabled: When a Fault Occurs, the Transmitter is Automatically Disabled. 0: Active Low: The FAULT Pin is Driven Low to Signal a Fault. 1: Active High: The FAULT Pin is Driven High to Signal a Fault. 0: The FAULT Pin is Driven Active when a Fault Occurs. Force_flt 3 0 Force the FAULT Pin Output. Mediation of Fault Handling. 0: Force the FAULT Pin Inactive. 1: Force the FAULT Pin Active. This Bit Has No Effect Unless Flt_pin_override = 1. Over_pwr_en 2 1 Enables Detection of a Laser Overpower Fault. Under_pwr_en 1 1 Enables Detection of a Laser Underpower Fault. Over_current_en 0 1 Enables Detection of a Laser Overcurrent Fault.
Table 21. Register: FLT_STATUS—Fault Status (I 2C Command Code 0x12) LTC5100 is Ready to Transmit Data. A Fault Clears This Bit. No Faults Have Occurred. A Fault Clears This Bit. 0: Transmitter is Disabled, 1: Transmitter is Enabled. Indicates the Logic Level on the EN Pin. The En_polarity Bit Has No Effect on En_pin_state. The Power-On Reset Value Reflects the State of the EN Pin. 0: Either No Faults or Only One Fault Has Been Detected. is Disabled and Can Only be Re-enabled by Cycling the Power. No Fault Occurs Within 25ms, the Faulted_once Bit is Cleared. 0: A First Fault Has Not Been Detected or Has Been Cleared. 1: A First Fault Has Been Detected. 0: The LTC5100 is Not in the Faulted State. Disabled Unless Auto_shutdn_en is Set). Cleared-on-read Indicates That a Power Supply Undervoltage Event Occurred. 0: No Fault, 1: Undervoltage Fault Detected. 0: No Fault, 1: EEPROM Load Failed. Exceeds its Set Point. An Overpower Fault Can Occur Only in APC Mode. 0: No Fault, 1: Overpower Fault Detected. Current Falls Below its Set Point. An Underpower Fault Can Occur Only in APC Mode. 0: No Fault, 1: Underpower Fault Detected. Cleared-on-read Indicates That the Laser Bias Current Exceeded the Value Set in the IB_LIMIT Register. 0: No Fault, 1: Overcurrent Fault Detected.
Table 22. Register: IB_LIMIT—Laser Bias Current Limit (I 2C Command Code 0x11) 30 Over_current Fault is Generated (Provided Over_current_en is Set).
20 The Physical Bias Current Level is Given By:
Table 23. Register: USER_ADC—Writing (I 2C Command Code 0x18)
000 I S Source Current (SRC Pin I S = ADC_code/1024 • (Is_rng + 1) • 9mA
001 I M Average Modulation I M = ADC_code/1024 • (Im_rng + 1) • 9mA
101 V TERM Termination Resistor V TERM = ADC_code/1024 • (Is_rng + 1) • 400mV
110 Reserved Reserved
111 Reserved Reserved
Table 24. Register: USER_ADC—Reading (I 2C Command Code 0x18) Last Value Written to the ADC_src_sel Bit Field. Valid is False. Valid Becomes True as Soon as the First User ADC Conversion is Completed. 0: The ADC Result is Not a Valid Conversion of the Most Recently Selected ADC Source. 1: The ADC Has Finished Conversion and the Result is Valid. Table 25. Register: T_INT_ADC—Internal Temperature ADC (I 2C Command Code 0x05) 8 0 This Bit Field Contains the Result of the Last Conversion of the LTC5100’s Internal Die Temperature. 6 0 The Scaling is 512 °K or 239°C Full Scale, Corresponding to 0.5°C/LSB. 4 0 T = T_int_adc • 0.5 °C – 273°C, Where T is the Internal Temperature in Degrees Celsius.
Table 26. Register: IM_ADC—Modulation Current ADC (I 2C Command Code 0x06) Reaching the Laser Depends on its Resistance Relative to the Termination Resistor. Table 27. Register: IS_ADC (IMD_ADC)—Source Current/Monitor Diode Current ADC (I 2C Command Code 0x07)
70 Constant Current Control (CCC) Mode (Apc_en = 0): Is_adc Contains the Last ADC Conversion of
30 Automatic Power Control (APC) Mode (Apc_en = 1): Imd_adc Contains the Last ADC Conversion of
Table 28. Register: IS_DAC—Souce Current DAC (I 2C Command Code 0x01) 8 0 Read Access to This DAC is Always Available. Write Access is Only Valid if LPC_en = 0.
Table 29. Register: IM_DAC—Modulation Current DAC (I 2C Command Code 0x02) 8 0 Read Access to This DAC is Always Available. Write Access is Only Valid if LPC_en = 0. Table 30. Register: PWR_LIMIT_DAC—Optical Power Limit DAC—Read Only (I 2C Command Code 0x03) Read Only 5 0 This Bit Field Has Different Functions Depending on Apc_en. 40 Constant Current Control (CCC) Mode (Apc_en = 0): Pwr_limit_dac Has No Function in This Mode. 30 Its Contents are Undefined.
20 Automatic Power Control (APC) Mode (Apc_en = 1): Pwr_limit_dac Tracks the Value of the Monitor
lation waveforms and reduce RFI.
8 FIBER
5100 F29
5100 F30
Figure 29. Schematic of a Minimum Component Count Circuit Figure 30. Layout of the Minimum Component Count Circuit Using 0402 Passive Components
- The layout shows the EEPROM placed next to the
LTC5100 or on the back of the PC board if desired. Figure 31. Schematic of a Minimum Output Reflection Coefficient Circuit Figure 32. Layout of the Minimum Reflection Coeffieicnt Circuit Using 0402 Passive Components
128 BITS
5100 F33
Figure 33. Schematic Diagram of the DC499 Demo Board
Table 31. Bill of Materials for the DC499 Demo Board Information furnished by Linear Technology Corporation is believed to be accurate and reliable. tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1773 Current Mode Synchronous Buck Regulator Design Note 295 “High Efficiency Adaptable Power Supply for XENPAK 10Gbps Ethernet Transceivers” LTC1923 High Efficiency Thermoelectric Cooler Controller LT 1930A 2.2MHz Step-Up DC/DC Converter in 5-Lead SOT-23 Design Note 273 “Fiber Optic Communication Systems Benefit from Tiny, Low Noise Avalanche Photodiode Bias Supply” ª LINEAR TECHNOLOGY CORPORATION 2003 LT/TP 0903 1K • PRINTED IN USA UPACKAGE DESCRIPTIO 16-Lead Plastic QFN (4mm · 4mm) (Reference LTC DWG # 05-08-1692) 4.00 – 0.10 (4 SIDES) NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED PIN 1 TOP MARK 0.55 – 0.20 1615 BOTTOM VIEW—EXPOSED PAD 2.15 – 0.10 (4-SIDES) 0.75 – 0.05 R = 0.115 TYP 0.30 – 0.05
0.65 BSC
0.200 REF
0.00 – 0.05 (UF) QFN 0802 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.72 –0.05 0.30 –0.05
0.65 BCS
2.15 – 0.05 (4 SIDES)2.90 – 0.05 4.35 – 0.05 PACKAGE OUTLINE