LTC4007 LINER
Document overview
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4A, High Efficiency, Standalone Li Battery Charger January 2003 n Complete Charger Controller for 3- or 4-Cell Lithium-Ion Batteries n High Conversion Efficiency: Up to 96% n Output Currents Exceeding 4A n –0.8% Charging Voltage Accuracy n Built-In Charge Termination for Li-Ion Batteries n AC Adapter Current Limiting Maximizes Charge Rate* n Thermistor Input for Temperature Qualified Charging n Wide Input Voltage Range: 6V to 28V n 0.5V Dropout Voltage; Maximum Duty Cycle: 98% n Programmable Charge Current: –5% Accuracy n Indicator Outputs for Charging, C/10 Current Detection, AC Adapter Present, Low Battery, Input Current Limiting and Faults n Charging Current Monitor Output n Available in a 24-Pin Narrow SSOP Package n Notebook Computers n Portable Instruments n Battery-Backup Systems n Standalone Li-Ion Chargers , LTC and LT are registered trademarks of Linear Technology Corporation. FEATURES DESCRIPTIONU APPLICATIO SU Final Electrical Specifications Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. TYPICAL APPLICATIO U 12.6V, 4A Li-Ion Battery Charger The LTC 4007 is a complete constant-current/constant- voltage charger controller for 3- or 4-cell lithium-ion batteries. The PWM controller uses a synchronous, quasi- constant frequency, constant off-time architecture that will not generate audible noise even when using ceramic capacitors. Charging current is programmable to –5% accuracy using a programming resistor. Charging current can also be monitored as a voltage across the program- ming resistor. The output float voltage is pin programmed for cell count (3 cells or 4 cells) and chemistry (4.2V/4.1V). A timer, programmed by an external resistor, sets the total charge time. Charging is automatically restarted when cell voltage falls below 3.9V/cell. LTC4007 includes a thermistor input, which suspends charging if an unsafe temperature condition is detected. If the cell voltage is less than 2.5V, a low-battery indicator asserts and can be used to program a trickle charge cur- rent to safely charge depleted batteries. The FAULT pin is also asserted and charging terminates if the low-battery condition persists for more than 1/4 of the total charge time. 3C4C CHEM LOBAT I CL ACP SHDN FAULT CHG FLAG NTC R T LOBAT ICL ACP SHDN FAULT CHG FLAG DCIN INFET CLP CLN TGATE BGATE PGND CSP BAT PROG ITH GND LTC4007 32.4k 309k 0.47µFTHERMISTOR 10k NTC TIMING RESISTOR (~2 HOURS) 100k100k100k VLOGIC DCIN 0V TO 28V 0.1µF INPUT SWITCH 15nF 20µF 10µH 4.9k 3.01k 3.01k 0.025Ω 0.025Ω 20µF Li-Ion BATTERY CHARGING CURRENT MONITOR Q1: Si4431DY Q2: FDC6459 SYSTEM LOAD 0.12µF 6.04k 26.7k 0.0047µF
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*U.S. Patent No. 5,723,970
R T FAULT GND 3C4C LOBAT NTC ITH PROG NC SHDN INFET BGATE PGND TGATE CLN CLP FLAG CHEM BAT CSP I CL (Note 1) ACP, SHDN, CHG, FLAG, FAULT, LOBAT, I Operating Ambient Temperature Range ABSOLUTE MAXIMUM RATINGSW WW U PACKAGE/ORDER INFORMATIONW UU ORDER PART NUMBER LTC4007EGN TJMAX = 125°C, qJA = 90°C/W The l denotes specifications which apply over the full operating temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted. Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DCIN Operating Range 62 8 V IQ Operating Current Sum of Current from CLP, CLN , DCIN 3 5 mA ITOL Charge Current Accuracy (Note 3) V CSP – VBAT Target = 100mV –4 4 % l –5 5 % VBAT < 6V, VCSP – VBAT Target = 10mV –60 60 % 6V £ VBAT £ VLOBAT, VCSP – VBAT –35 35 % Target = 10mV TTOL Termination Timer Accuracy R RT = 270k l –15 15 % Shutdown Battery Leakage Current DCIN = 0V l 15 30 mA SHDN = 3V l –10 10 mA UVLO Undervoltage Lockout Threshold DCIN Rising, V BAT = 0 l 4.2 4.7 5.5 V Shutdown Threshold at SHDN l 1 1.6 2.5 V SHDN Pin Current –1 0 mA Operating Current in Shutdown V SHDN = 0V, Sum of Current from CLP, 2 3 mA CLN, DCIN Current Sense Amplifier, CA1 Input Bias Current Into BAT Pin 11.67 mA CMSL CA1/I 1 Input Common Mode Low l 0V CMSH CA1/I 1 Input Common Mode High l VCLN – 0.2 V
The l denotes specifications which apply over the full operating temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Current Comparators ICMP and IREV ITMAX Maximum Current Sense Threshold (VCSP – VBAT)V ITH = 2.4V l 140 165 200 mV ITREV Reverse Current Threshold (VCSP – VBAT) –30 mV Current Sense Amplifier, CA2 Transconductance 1 mmho Source Current Measured at I TH, VITH = 1.4V –40 mA Sink Current Measured at I TH, VITH = 1.4V 40 mA Current Limit Amplifier Transconductance 1.4 mmho VCLP Current Limit Threshold l 93 100 107 mV ICLP CLP Input Bias Current 100 nA Voltage Error Amplifier, EA Transconductance 1 mmho Sink Current Measured at I TH, VITH = 1.4V 36 mA OVSD Overvoltage Shutdown Threshold as a Percent l 102 107 110 % of Programmed Charger Voltage Input P-Channel FET Driver (INFET) DCIN Detection Threshold (VDCIN – VCLN) DCIN Voltage Ramping Up l 0 0.17 0.25 V from VCLN – 0.1V Forward Regulation Voltage (VDCIN – VCLN) l 25 50 mV Reverse Voltage Turn-Off Voltage (VDCIN – VCLN) DCIN Voltage Ramping Down l –60 –25 mV INFET “On” Clamping Voltage (VDCIN – VINFET)I INFET = 1mA l 5 5.8 6.5 V INFET “Off” Clamping Voltage (VDCIN – VINFET)I INFET = –25 mA 0.25 V Thermistor NTCVR Reference Voltage During Sample Time 4.5 V High Threshold V NTC Rising l NTCVR NTCVR NTCVR V Low Threshold V NTC Falling l NTCVR NTCVR NTCVR V Thermistor Disable Current V NTC £ 10V 10 mA Indicator Outputs (ACP, CHG, FLAG, LOBAT, ICL, FAULT C10TOL FLAG (C/10) Accuracy Voltage Falling at PROG l 0.375 0.397 0.420 V LBTOL LOBAT Threshold Accuracy 3C4C = 0V, CHEM = 0V l 7.10 7.32 7.52 V 3C4C = 0V, CHEM = Open l 7.27 7.50 7.71 V 3C4C = Open, CHEM = 0V l 9.46 9.76 10.10 V 3C4C = Open, CHEM = Open l 9.70 10 10.28 V RESTART Threshold Accuracy 3C4C = 0V, CHEM = 0V l 11.13 11.42 11.65 V 3C4C = 0V, CHEM = Open l 11.40 11.70 11.94 V 3C4C = Open, CHEM = 0V l 14.84 15.23 15.54 V 3C4C = Open, CHEM = Open l 15.20 15.60 15.92 V ICL Threshold Accuracy 83 93 1O5 mV
The l denotes specifications which apply over the full operating temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: See Test Circuit. Note 3: Does not include tolerance of current sense resistor or current programming resistor. Note 4: The LTC4007E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOL Low Logic Level of ACP, CHG, FLAG, LOBAT, I OL = 100mA l 0.5 V ICL, FAULT VOH High Logic Level of CHG, LOBAT, ICL IOH = –1mA l 2.7 V IOFF Off State Leakage Current of ACP, FLAG, FAULT V OH = 3V –1 1 mA IPO Pull-Up Current on CHG, LOBAT, ICL V = 0V –10 mA Timer Defeat Threshold at CHG 1 V Programming Inputs (CHEM and 3C4C) VIH High Logic Level l 3.3 V VIL Low Logic Level l 1V IPI Pull-Up Current V = 0V –14 mA Oscillator fOSC Regulator Switching Frequency 255 300 345 kHz fMIN Regulator Switching Frequency in Drop Out Duty Cycle ‡ 98% 20 25 kHz DCMAX Regulator Maximum Duty Cycle V CSP = VBAT 98 99 % Gate Drivers (TGATE, BGATE) VTGATE High (VCLN – VTGATE)I TGATE = –1mA 50 mV VBGATE High C LOAD = 3000pF 4.5 5.6 10 V VTGATE Low (VCLN – VTGATE)C LOAD = 3000pF 4.5 5.6 10 V VBGATE Low I BGATE = 1mA 50 mV TGATE Transition Time TGTR TGATE Rise Time C LOAD = 3000pF, 10% to 90% 50 110 ns TGTF TGATE Fall Time C LOAD = 3000pF, 10% to 90% 50 100 ns BGATE Transition Time BGTR BGATE Rise Time C LOAD = 3000pF, 10% to 90% 40 90 ns BGTF BGATE Fall Time C LOAD = 3000pF, 10% to 90% 40 80 ns VTGATE at Shutdown (VCLN – VTGATE)I TGATE = –1mA, DCIN = 0V, CLN = 12V 100 mV VBGATE at Shutdown I BGATE = 1mA, DCIN = 0V, CLN = 12V 100 mV
DCIN (Pin 1): External DC Power Source Input. Bypass this pin with at least 0.01mF. See Applications Information. CHG (Pin 2): Charge Status Output. When the battery is being charged, the CHG pin is pulled low by an internal N-channel MOSFET. Internal 10 mA pull-up to 3.5V. If V LOGIC is greater than 3.3V, add an external pull-up. The timer function can be defeated by forcing this pin below 1V (or connecting it to GND). ACP(Pin 3): Open-Drain output to indicate if the AC adapter voltage is adequate for charging. This pin is pulled low by an internal N-channel MOSFET if DCIN is below BAT. A pull-up resistor is required. The pin is capable of sinking at least 100mA. R T (Pin 4): Timer Resistor. The timer period is set by placing a resistor, R RT , to GND. This resistor is always required. The timer period is tTIMER = (1hour • RRT/154K). FAULT (Pin 5): Active low open-drain output that indi- cates charger operation has stopped due to a low-battery conditioning error, or that charger operation is suspended due to the thermistor exceeding allowed values. A pull-up resistor is required if this function is used. The pin is capable of sinking at least 100mA. GND (Pin 6): Ground for Low Power Circuitry. 3C4C (Pin 7): Select 3-cell or 4-cell float voltage by connecting this pin to GND or open, respectively. Internal 14mA pull-up to 5.3V. This pin can also be driven with open-collector/drain logic levels. High: 4 cell. Low: 3 cell. LOBAT (Pin 8): Low-Battery Indicator. Active low digital output. Internal 10 mA pull-up to 3.5V. If the battery voltage is below 2.5V/cell (or 2.44V/cell for 4.1V chemis- try batteries) LOBAT will be low. The pin is capable of sinking at least 100mA. If V LOGIC is greater than 3.3V, add an external pull-up. NTC (Pin 9): A thermistor network is connected from NTC to GND. This pin determines if the battery temperature is safe for charging. The charger and timer are suspended and the FAULT pin is driven low if the thermistor indicates a temperature that is unsafe for charging. The thermistor function may be disabled with a 300k to 500k resistor from DCIN to NTC. ITH (Pin 10): Control Signal of the Inner Loop of the Current Mode PWM. Higher ITH voltage corresponds to higher charging current in normal operation. A 6k resistor, in series with a capacitor of at least 0.1mF to GND provides loop compensation. Typical full-scale output current is 40mA. Nominal voltage range for this pin is 0V to 3V. PROG (Pin 11): Current Programming/Monitoring Input/ Output. An external resistor to GND programs the peak charging current in conjunction with the current sensing resistor. The voltage at this pin provides a linear indication of charging current. Peak current is equivalent to 1.19V. Zero current is approximately 0.3V. A capacitor from PROG to ground is required to filter higher frequency components. The maximum resistance to ground is 100k. Values higher than 100k can cause the charger to shut down. NC (Pin 12): No Connect. ICL (Pin 13): Input Current Limit Indicator. Active low digital output. Internal 10mA pull-up to 3.5V. Pulled low if the charger current is being reduced by the input current limiting function. The pin is capable of sinking at least 100mA. If V LOGIC is greater than 3.3V, add an external pull-up. CSP (Pin 14): Current Amplifier CA1 Input. The CSP and BAT pins measure the voltage across the sense resistor, RSENSE, to provide the instantaneous current signals re- quired for both peak and average current mode operation.
BAT (Pin 15): Battery Sense Input and the Negative Reference for the Current Sense Resistor. A precision internal resistor divider sets the final float potential on this pin. The resistor divider is disconnected during shutdown. CHEM (Pin 16):Select 4.1V or 4.2V cell chemistry by connecting the pin to GND or open, respectively. Internal 14mA pull-up to 5.3V. Can also be driven with open- collector/drain logic levels. FLAG (Pin 17): Active low open-drain output that indi- cates when charging current has declined to 10% of maximum programmed current. A pull-up resistor is required if this function is used. The pin is capable of sinking at least 100mA. CLP (Pin 18): Positive input to the supply current limiting amplifier, CL1. The threshold is set at 100mV above the voltage at the CLN pin. When used to limit supply current, a filter is needed to filter out the switching noise. If no current limit function is desired, connect this pin to CLN. CLN (Pin 19): Negative Reference for the Input Current Limit Amplifier, CL1. This pin also serves as the power supply for the IC. A 10mF to 22mF bypass capacitor should be connected as close as possible to this pin. TGATE (Pin 20): Drives the top external P-channel MOSFET of the battery charger buck converter. PGND (Pin 21): High Current Ground Return for the BGATE Driver. BGATE (Pin 22): Drives the bottom external N-channel MOSFET of the battery charger buck converter. INFET (Pin 23): Drives the Gate of the External Input PFET. SHDN (Pin 24): Charger is shut down and timer is reset when this pin is HIGH. Internal 10mA pull-up to 3.5V. This pin can also be used to reset the charger by applying a positive pulse that is a minimum of 0.1ms long.
1.19V 11.67µA TBADRESTART MUX 1.105V EA gm = 1mΩ gm = 1mΩ gm = 1.4mΩ 708mV 1.19V 3C4C FLAG GND CHEM 8LOBAT ICL TGATE BGATE CLP 100mV15nF 20µF RCL CLN PGND 397mV CHG RT NTC 0.47µF 10k NTC RRT + – CL1 TIMER/CONTROLLER THERMISTOR OSCILLATOR BAT 3k RSENSE CSP ITH10 32.4k WATCHDOG DETECT tOFF CLN DCIN OV OSCILLATOR 1.28V PWM LOGIC S R Q CHARGE IREV ICMP ÷ 5 BUFFERED ITH PROG 4007 BD RPROG 26.7k0.0047µF FAULT 5 SHDN 24 ACP 3 INFETQ3 DCIN 0.1µF VIN CLN 5.8V 20µF 0.12µF CA1 CA2 C/10 35mV 17mV
15 ITH
0.6V 4007 TC OPERATIOU Overview The LTC4007 is a synchronous current mode PWM step- down (buck) switcher battery charger controller. The charge current is programmed by the combination of a program resistor (RPROG) from the PROG pin to ground and a sense resistor (RSENSE) between the CSP and BAT pins. The final float voltage is programmed to one of four values (12.3V, 12.6V, 16.4V, 16.8V) with –1% maximum accuracy using pins 3C4C and CHEM. Charging begins when the potential at the DCIN pin rises above the voltage at BAT (and the UVLO voltage) and the SHDN pin is low; the CHG pin is set low. At the beginning of the charge cycle, if the cell voltage is below 2.5V (2.44V if CHEM is low), the LOBAT pin will be low. The LOBAT indicator can be used to reduce the charging current to a low value, typically 10% of full scale. If the cell voltage stays below 2.5V for 25% of the total charge time, the charge sequence will be terminated immediately and the FAULT pin will be set low. An external thermistor network is sampled at regular intervals. If the thermistor value exceeds design limits, charging is suspended and the FAULT pin is set low. If the thermistor value returns to an acceptable value, charging resumes and the FAULT pin is set high. An external resistor on the R T pin sets the total charge time. The timer can be defeated by forcing the CHG pin to a low voltage. As the battery approaches the final float voltage, the charge current will begin to decrease. When the current drops to 10% of the full-scale charge current, an internal C/10 comparator will indicate this condition by latching the FLAG pin low. The charge timer is also reset to 1/4 of the total charge time when FLAG goes low. If this condition is caused by an input current limit condition, described below, then the FLAG indicator will be inhibited. When a time-out occurs, charging is terminated immediately and the CHG pin is forced to a high impedance state. The charger will automatically restart if the cell voltage is below 3.9V (or 3.81V if CHEM is low). To restart the charge cycle manually, simply remove the input voltage and reapply it, or set the SHDN pin high momentarily. When the input voltage is not present, the charger goes into a sleep mode, dropping battery current drain to 15mA. This greatly reduces the current drain on the battery and increases the standby time. The charger is inhibited any time the SHDN pin is high. Input FET The input FET circuit performs two functions. It enables the charger if the input voltage is higher than the CLN pin and provides the logic indicator of AC present on the ACP pin. It controls the gate of the input FET to keep a low forward voltage drop when charging and also prevents reverse current flow through the input FET. If the input voltage is less than V CLN, it must go at least 170mV higher than VCLN to activate the charger. When this occurs the ACP pin is released and pulled up with an external load to indicate that the adapter is present. The
voltage range. This activity is diagrammed in Figure 1.
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Table 1. Truth Table For Indicator States charger must be reset to initiate charging.
voltage between CSP and BAT to a representative current. VPROG is plotted in Figure 2.
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Figure 2. VPROG vs ICHARGE the FLAG indicator will be inhibited if it is not already LOW. compensation, but is typically less than 100ms.
(NOT TO SCALE) VNTC tSAMPLE VOLTAGE ACROSS THERMISTOR tHOLD
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32.4k 0.47µF RTH 10k NTC 60k ~4.5V CLK 45k 15k TBAD
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D C Q Figure 3 the timing resistor connected to R T, keeps switch S1 closed to sample the thermistor: tSAMPLE = 127.5 • 20 • RRT • 17.5pF = 16.2ms, for RRT = 309k The external RC network is driven to approximately 4.5V and settles to a final value across the thermistor of: V VR RRRTH FINAL TH TH .·= + This voltage is stored by C7. Then the switch is opened for a short period of time to read the voltage across the thermistor. tHOLD = 10 • RRT • 17.5pF = 64ms, for RRT = 309k When the tHOLD interval ends the result of the thermistor testing is stored in the D flip-flop (DFF). If the voltage at NTC is within the limits provided by the resistor divider feeding the comparators, then the NOR gate output will be low and the DFF will set T BAD to zero and charging will continue. If the voltage at NTC is outside of the resistor divider limits, then the DFF will set TBAD to one, the charger will be shut down, FAULT pin is set low and the timer will be suspended until T BAD returns to zero (see Figure 4).
zero current when Q1 is off. FLAG trip point is only 5% of maximum charging current. but the FLAG trip point is maintained at 10% of full scale.
1 DCIN
24 SHDN
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- / ± .= W3 0 035 VREF = 1.19V This leaves two degrees of freedom: RSENSE and RPROG. The 3k input resistors must not be altered since internal currents and voltages are trimmed for this value. Pick R SENSE by setting the average voltage between C SP and BAT to be close to 100mV during maximum charger current. Then R PROG can be determined by solving the above equation for RPROG. R Vk RI VPROG REF SENSE CHARGE MAX = W
- . () 0 035
Table 2. Recommended RSNS and RPROG Resistor Values Figure 6. PWM Current Programming
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reduced as well so there is some risk of boost activity. Table 3. Charger Voltage Programming
12.3 LOW LOW
12.6 LOW HIGH
16.4 HIGH LOW
16.8 HIGH HIGH
current will be equal to one half of output charging current. surge conditions such as battery to ground. Figure 7. tTIMER vs RRT
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Highest possible voltage rating on the capacitor will mini- mize problems. Consult with the manufacturer before use. Alternatives include new high capacity ceramic (at least 20mF) from Tokin, United Chemi-Con/Marcon, et al. Other alternative capacitors include OS-CON capacitors from Sanyo. The output capacitor (C3) is also assumed to absorb output switching current ripple. The general formula for capacitor current is: I V V V LfRMS BAT BAT DCIN= () æ Łç ö () ( ) 02 9 1 For example: VDCIN = 19V, VBAT = 12.6V, L1 = 10mH, and f = 300kHz, IRMS = 0.41A. EMI considerations usually make it desirable to minimize ripple current in the battery leads, and beads or inductors may be added to increase battery impedance at the 300kHz switching frequency. Switching ripple current splits be- tween the battery and the output capacitor depending on the ESR of the output capacitor and the battery imped- ance. If the ESR of C3 is 0.2W and the battery impedance is raised to 4 W with a bead or inductor, only 5% of the current ripple will flow in the battery. Inductor Selection Higher operating frequencies allow the use of smaller inductor and capacitor values. A higher frequency gener- ally results in lower efficiency because of MOSFET gate charge losses. In addition, the effect of inductor value on ripple current and low current operation must also be considered. The inductor ripple current DI L decreases with higher frequency and increases with higher VIN. () ( ) æ Łç ö ł÷I fL V V VL OUT OUT IN 1 1± Accepting larger values of DIL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is DI L = 0.4(IMAX). In no case should DIL exceed 0.6(IMAX) due to limits imposed by I REV and CA1. Remember the maximum DIL occurs at the maxi- mum input voltage. In practice 10 mH is the lowest value recommended for use. Lower charger currents generally call for larger inductor values. Use Table 4 as a guide for selecting the correct inductor value for your application. Table 4 MAX AVERAGE MINIMUM INDUCTOR CURRENT (A) INPUT VOLTAGE (V) VALUE ( mH) 1 £ 20 40 –20% 1> 2 0 5 6 –20% 2 £ 20 20 –20% 2> 2 0 3 0 –20% 3 £ 20 15 –20% 3> 2 0 2 0 –20% 4 £ 20 10 –20% 4> 2 0 1 5 –20% Charger Switching Power MOSFET and Diode Selection Two external power MOSFETs must be selected for use with the charger: a P-channel MOSFET for the top (main) switch and an N-channel MOSFET for the bottom (syn- chronous) switch. The peak-to-peak gate drive levels are set internally. This voltage is typically 6V. Consequently, logic-level threshold MOSFETs must be used. Pay close attention to the BV DSS specification for the MOSFETs as well; many of the logic level MOSFETs are limited to 30V or less. Selection criteria for the power MOSFETs include the “ON” resistance R DS(ON), total gate capacitance QG, reverse transfer capacitance C RSS, input voltage and maximum output current. The charger is operating in continuous mode at moderate to high currents so the duty cycles for the top and bottom MOSFETs are given by: Main Switch Duty Cycle = V OUT/VIN Synchronous Switch Duty Cycle = (VIN – VOUT)/VIN. APPLICATIO S I FOR ATIOWU UU
k is a constant inversely related to the gate drive current. the two terms in the main switch dissipation equation. savings or efficiency gains. transition losses due to their larger junction capacitance. Figure 8. Adapter Current Limiting charged without complex load management algo rithms. maximum possible rate of which the adapter is capable.
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Table 5. Common RCL Resistor Values
- Values shown above are rounded to nearest standard value.
adapter rating (see Table 5). Figure 9. Voltage Divider Thermistor Network Figure 10. General Thermistor Network
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APPLICATIO S I FOR ATIOWU UU Example #2: 100kW NTC TLOW = 5°C, THIGH = 50°C RTH = 100k at 25°C, RTH(LOW) = 272.05k at 5°C RTH(HIGH) = 33.195k at 50°C R9 = 226.9k fi 226k (nearest 1% value) R9A = 1.365M fi 1.37M (nearest 1% value) Example #3: 22kW PTC TLOW = 0°C, THIGH = 50°C RTH = 22k at 25°C, RTH(LOW) = 6.53k at 0°C RTH(HIGH) = 61.4k at 50°C R9 = 43.9k fi 44.2k (nearest 1% value) R9A = 154k Sizing the Thermistor Hold Capacitor During the hold interval, C7 must hold the voltage across the thermistor relatively constant to avoid false readings. A reasonable amount of ripple on NTC during the hold interval is about 10mV to 15mV. Therefore, the value of C7 is given by: C7 = t HOLD/(R9/7 • –ln(1 – 8 • 15mV/4.5V)) Example: R9 = 24.3k RRT = 309k (~2 hour timer) C7 = 0.51mF fi 0.56mF (nearest value) Disabling the Thermistor Function If the thermistor is not needed, connecting a resistor between DCIN and NTC will disable it. The resistor should be sized to provide at least 10mA with the minimum voltage applied to DCIN and 10V at NTC. Generally, a 301k resistor will work for DCIN less than 15V. A 499k resistor is recommended for DCIN greater than 15V. Conditioning Depleted Batteries Severely depleted batteries, with less than 2.5V/cell, should be conditioned with a trickle charge to prevent possible damage. This trickle charge is typically 10% of the 1C rate of the battery. The LTC4007 can automatically trickle charge depleted batteries using the circuit in Figure 11. If the battery voltage is less than 2.5V/cell (2.44V/cell if CHEM is low) then the LOBAT indicator will be low and Q4 is off. This programs the charging current with R PROG = R6 + R14. Charging current is approximately 300mA. When the cell voltage becomes greater than 2.5V the LOBAT indicator goes high, Q4 shorts out R13, then R PROG = R6. Charging current is then equal to 3A. PCB Layout Considerations For maximum efficiency, the switch node rise and fall times should be minimized. To prevent magnetic and electrical field radiation and high frequency resonant prob- lems, proper layout of the components connected to the IC is essential. (See Figure 12.) Here is a PCB layout priority list for proper layout. Layout the PCB using this specific order. 1. Input capacitors need to be placed as close as possible to switching FET’s supply and ground connections. Shortest copper trace connections possible. These parts must be on the same layer of copper. Vias must not be used to make this connection. 2. The control IC needs to be close to the switching FET’s gate terminals. Keep the gate drive signals short for a clean FET drive. This includes IC supply pins that con- nect to the switching FET source pins. The IC can be placed on the opposite side of the PCB relative to above. 3. Place inductor input as close as possible to switching FET’s output connection. Minimize the surface area of this trace. Make the trace width the minimum amount needed to support current—no copper fills or pours. Avoid running the connection using multiple layers in parallel. Minimize capacitance from this node to any other trace or plane. 4. Place the output current sense resistor right next to the inductor output but oriented such that the IC’s current sense feedback traces going to resistor are not long. The feedback traces need to be routed together as a single pair on the same layer at any given time with smallest trace spacing possible. Locate any filter component on these traces next to the IC and not at the sense resistor location.
Figure 11. Circuit Application (16.8V/3A) to Automatically Trickle Charge Depleted Batteries
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- Place output capacitors next to the sense resistor
- Output capacitor ground connections need to feed
ground before tying back into system ground.
- Connection of switching ground to system ground or
- Route analog ground as a trace tied back to IC ground
- A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
- If possible, place all the parts listed above on the same
- Copper fills or pours are good for all power connec-
ductance improving EMI performance further.
- For best current programming accuracy provide a
Figure 12. High Speed Switching Path Figure 13. Kelvin Sensing of Charging Current
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- CONTROLLING DIMENSION: INCHES
Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com ª LINEAR TECHNOLOGY CORPORATION 2003 LT/TP 0103 1.5K • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT®1511 Constant-Current/Constant-Voltage 3A Battery High Efficiency Current Mode PWM with 4A Internal Switch Charger with Input Current Limiting LT1513 SEPIC Constant- or Programmable-Current/ Charger Input Voltage May Be Higher, Equal to or Lower Than Battery Voltage; Constant-Voltage Battery Charger Charges Any Number of Cells Up to 20V, 500kHz Switching Frequency LT1571 1.5A Switching Charger 1- or 2-Cell Li-Ion, 500kHz or 200kHz Switching Frequency, Termination Flag LTC1628-PG 2-Phase, Dual Synchronous Step-Down Controller Minimizes C IN and COUT, Power Good Output, 3.5V £ VIN £ 36V LTC1709 2-Phase, Dual Synchronous Step-Down Controller Up to 42A Output, Minimum C IN and COUT, Uses Smallest Components for with VID Intel and AMD Processors LTC1729 LT1769 2A Switching Battery Charger Constant-Current/Constant-Voltage Switching Regulator, Input Current Limiting Maximizes Charge Current LTC1778 Wide Operating Range, No R SENSE Synchronous 2% to 90% Duty Cycle at 200kHz, Stable with Ceramic C OUT Step-Down Controller LTC1960 Dual Battery Charger/Selector with SPI Interface Simultaneous Charge or Discharge of Two Batteries, DAC Programmable Current and Voltage, Input Current Limiting Maximizes Charge Current LTC3711 No R SENSE TM Synchronous Step-Down Controller 3.5V £ VIN £ 36V, 0.925V £ VOUT £ 2V, for Transmeta, AMD and Intel with VID Mobile Processors LTC4006 Small, High Efficiency, Fixed Voltage, Constant-Current/Constant-Voltage Switching Regulator with Termination Lithium-Ion Battery Charger Timer, AC Adapter Current Limit and Thermistor Sensor in a Small 16-Pin Package LTC4008 High Efficiency, Programmable Voltage/Current Constant-Current/Constant-Voltage Switching Regulator, Resistor Voltage/ Battery Charger Current Programming, AC Adapter Current Limit and Thermistor Sensor No RSENSE is a trademark of Linear Technology Corporation. 12.6V, 4A Li-Ion Battery Charger 3C4C CHEM LOBAT I CL ACP SHDN FAULT CHG FLAG NTC R T LOBAT ICL ACP SHDN FAULT CHG FLAG DCIN INFET CLP CLN TGATE BGATE PGND CSP BAT PROG ITH GND LTC4007 R9 32.4k 1% RRT 309k 0.47µF THERMISTOR 10k NTC TIMING RESISTOR (~2 HOURS) R12 100k *R11 100k R10 100k V LOGIC DCIN 0V TO 20V 3A C1 0.1µF INPUT SWITCH C4 15nF Q2 D1 20µF 10µH 4A 4.9k 3.01k 1% R5 3.01k 1% RSENSE 0.025Ω RCL 0.033Ω 20µF BAT CHARGING CURRENT MONITOR SYSTEM LOAD 0.12µF 6.04k 1% R PROG 26.7k 0.0047µF *PIN OPEN D1: MBRS130T3 Q1: Si4431ADY Q2: FDC645N