LTC3101 LINER
Document overview
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Technical content
FEATURES
APPLICATIONS
DESCRIPTION
Wide VIN, Multi-Output DC/DC Converter and PowerPath Controller The L TC®3101 is a complete power management solution for low power portable devices. It provides three high effi ciency switching DC/DC converters which seamlessly transition from battery to USB/wall adapter power when available. A synchronous buck-boost regulator provides complete fl exibility, allowing operation from a single Li-Ion/Polymer battery, 2 to 3 AA cells, a USB port or any other power source operating from 1.8V to 5.5V . T wo always-alive outputs, a 50mA LDO and a 200mA MAX output that tracks the higher voltage input supply, provide power for critical functions or additional external regula- tors. Flash memory cards can be directly powered from the protected 100mA Hot Swap output. Pushbutton control logic and a programmable-duration microprocessor reset generator simplify interfacing to a microprocessor while internal sequencing and independent enable pins provide fl exible power-up options. The L TC3101 is available in a low profi le (0.75mm) 24-lead 4mm × 4mm QFN package. Effi ciency vs VBAT n Low Loss PowerPath™ Control: Seamless, Automatic T ransition from Battery to USB or Wall Adapter Power n Wide VIN Range: 1.8V to 5.5V n Buck-Boost VOUT: 1.5V to 5.25V n Buck-Boost Generates 3.3V at 300mA for VIN ≥ 1.8V , 3.3V at 800mA for VIN ≥ 3V n Dual 350mA Buck Regulators, VOUT: 0.6V to VIN n 38μA Quiescent Current in Burst Mode® Operation n 1.8V , 50mA Always-On LDO n Protected 100mA Hot Swap™ Output n Pushbutton On/Off Control n Current Limited 200mA MAX Output n Programmable Power-Up Sequencing n 24-lead 4mm × 4mm × 0.75mm QFN Package n Ultra-Portable Digital Video Cameras n Personal Handheld GPS Navigators n Portable Medical Instruments L, L T , L TC, L TM and Burst Mode are registered trademarks of Linear Technology Corporation. Hot Swap and PowerPath are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. BAT1 USB1 CRS ENA1 ENA2 ENA3 PWRKEY PWRON PWM PBSTAT RESET USB2 FB3 LDO SW2 FB2 HSO MAX 10μF 10μF2 AA CELLS USB/WALL ADAPTER 4.3V TO 5.5V 10μF 1M VOUT3 = 3.3V 300mA FOR VIN ≥ 1.8V 800mA FOR VIN ≥ 3V 221k Hot Swap OUTPUT : 3.3V AT 100mA TRACKING OUTPUT : 200mA 4.7μH 4.7μF 1.8V AT 50mA VOUT2 1.8V 350mA VOUT1 1.5V 350mA 10μF221k 110k 4.7μH SW1 FB1 10μF
3101 TA01a
4.7μH 0.1μF ON/OFF BAT2 SW3A L TC3101 GND μP SW3B OUT3 DIS ENA VBAT (V) 1.5 EFFICIENCY (%) 2.5 3.5 4.5 5.5
3101 TA01b
IOUT = 150mA BUCK2 IOUT = 150mA BUCK1 IOUT = 150mA
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS VSW1, VSW2, VSW3A, VSW3B Operating Temperature Range (Note 2).... –40°C to 85°C (Note 1) 24 23 22 21 20 19 7 8 9 TOP VIEW UF PACKAGE 24-LEAD (4mm s 4mm) PLASTIC QFN 10 11 12 18PWM SW1 BAT1 USB1 SW2 PWRON HSO OUT3 USB2 SW3A BAT2 RESET ENA2 FB1 FB2 ENA1 SW3B ENA3 FB3 PWRKEY PBSTAT LDO MAX C RS TJMAX = 125°C, θJA = 37°C/W EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3101EUF#PBF L TC3101EUF#TRPBF 3101 24-Lead (4mm × 4mm) Plastic QFN –40°C to 85°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container . Consult L TC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VUSB1 = VUSB2 = VBAT1 = VBAT2 = 3V and VOUT3 = 3.3V , unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Input Operating Voltage Battery Powered USB Powered l l 1.8 1.8 5.5 5.5 V V Undervoltage Lockout Threshold Battery Powered, V BAT Rising USB Powered, VUSB Rising l l 1.7 1.7 1.8 1.8 V V Input Quiescent Current in Standby V PWRON = 0V , VPWRKEY = 3V 15 μA Input Quiescent Current in Burst Mode Operation All Converters Enabled, V FB1 = VFB2 = VFB3 = 0.66V 38 μA Oscillator Frequency l 1.02 1.27 1.52 MHz Buck Converter 1 Feedback Voltage (FB1 Pin) l 583 596 609 mV Feedback Pin Input Current (FB1 Pin) 15 0 n A P-Channel Current Limit Battery Powered (Note 3) USB Powered (Note 3) 440 440 540 540 mA mA Maximum Duty Cycle l 100 %
ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VUSB1 = VUSB2 = VBAT1 = VBAT2 = 3V and VOUT3 = 3.3V , unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Duty Cycle l 0% ENA1 Input Logic Threshold l 0.3 0.7 1.0 V ENA1 Pull-Down Resistance V PWRON = 3V or VPWRKEY = 0V 4.0 MΩ N-Channel Switch Resistance 0.34 Ω P-Channel Switch Resistance Battery Powered USB Powered 0.55 0.58 Ω Ω N-Channel Switch Leakage V SW1 = VUSB1,2 = VBAT1,2 = 5.5V 0.1 5 μA P-Channel Switch Leakage V SW1 = 0V , VUSB1,2 = VBAT1,2 = 5.5V 0.1 10 μA Power Good Threshold V FB1 Falling l –11 –8 –5 % Power Good Hysteresis 2.5 % Buck Converter 2 Feedback Voltage (FB2 Pin) l 583 596 609 mV Feedback Pin Input Current (FB2 Pin) 15 0 n A P-Channel Current Limit Battery Powered (Note 3) USB Powered (Note 3) 440 440 540 540 mA mA Maximum Duty Cycle l 100 % Minimum Duty Cycle l 0% ENA2 Input Logic Threshold l 0.3 0.7 1.0 V ENA2 Pull-Down Resistance V PWRON = 3V or VPWRKEY = 0V 4.0 MΩ N-Channel Switch Resistance 0.34 Ω P-Channel Switch Resistance Battery Powered USB Powered 0.55 0.58 Ω Ω N-Channel Switch Leakage V SW2 = VUSB1,2 = VBAT1,2 = 5.5V 0.1 5 μA P-Channel Switch Leakage V SW2 = 0V , VUSB1,2 = VBAT1,2 = 5.5V 0.1 10 μA Power Good Threshold V FB2 Falling l –11 –8 –5 % Power Good Hysteresis 2.5 % Buck-Boost Converter Operating Output Voltage l 1.5 5.25 V Feedback Voltage (FB3 Pin) l 584 599 614 mV Feedback Pin Input Current (FB3 Pin) 15 0 n A Inductor Current Limit BAT or USB Powered (Note 3) 1.2 1.5 A Reverse Inductor Current Limit (Note 3) 400 mA Burst Mode Inductor Current Limit (Note 3) 450 mA Maximum Duty Cycle Percentage of Period SW3B is Low in Boost Mode l 82 87 % Minimum Duty Cycle Percentage of Period SW3A is High in Buck Mode l 0% ENA3 Input Logic Threshold l 0.3 0.7 1.0 V ENA3 Pull-Down Resistance V PWRON = 3V or VPWRKEY = 0V 4.0 MΩ N-Channel Switch Resistance Switch B (From SW3A to GND) Switch C (From SW3B to GND) 0.150 0.140 Ω Ω P-Channel Switch Resistance Switch A´ (From BAT2 to SW3A) Switch A (From USB2 to SW3A) Switch D (From OUT3 to SW3B) 0.150 0.180 0.195 Ω Ω Ω
ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VUSB1 = VUSB2 = VBAT1 = VBAT2 = 3V and VOUT3 = 3.3V , unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS N-Channel Switch Leakage V SW3A,B = VUSB1,2 = VBAT1,2 = VOUT3 = 5.5V 0.1 5 μA P-Channel Switch Leakage V SW3A,B = 0V , VUSB1,2 = VBAT1,2 = VOUT3 = 5.5V 0.1 10 μA Power Good Threshold V FB3 Falling l –11.5 –8.5 –5.5 % Power Good Hysteresis 2.5 % MAX Output Current Limit V MAX = 2.0V l 200 300 mA Switch Resistance From BAT2 to MAX From USB2 to MAX 0.890 0.930 Ω Ω Load Dependent Supply Current 1.0 μA/mA LDO Output Output Voltage I LDO = 1mA l 1.755 1.800 1.845 V Current Limit V LDO = 1.0V l 50 110 mA Line Regulation Input Voltage (V MAX) = 1.8V to 5.5V , ILDO = 1mA 0.1 % Load Regulation I LDO = 1mA to 50mA 0.9 % Reverse Current in Shutdown V BAT1,2 = VUSB1,2 = 0V , VLDO = 1.8V 0.1 1 μA Load Dependent Supply Current 12 μA/mA Dropout Voltage V MAX = 1.75V , ILDO = 10mA 25 mV Hot Swap Output Switch Resistance 0.730 Ω Switch Current Limit V HSO = 2.0V l 100 150 mA Pushbutton Logic and μP Reset Generator PBSTAT Deglitching Duration 15 24 ms PBSTAT Low Voltage I PBSTAT = 1mA 20 50 mV RESET Low Voltage I RESET = 1mA 20 50 mV CRS Pin Charging Current 0.9 1.0 1.1 μA CRS Pin Threshold Voltage V CRS Rising 1.176 1.200 1.224 V Logic Inputs PWRKEY, PWRON, PWM Input Logic Threshold l 0.3 0.7 1.0 V PWRKEY Pull-Up Resistance 400 kΩ PWRON Pull-Down Resistance 4.0 MΩ Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TC3101 is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating temperature range are ensured by design, characterization and correlation with statistical process controls. Note 3: Current measurements are performed when the L TC3101 is not switching. The current limit values measured in operation will be somewhat higher due to the propagation delay of the comparators. Note 4: The L TC3101 is tested in a proprietary non-switching test mode that internally connects the error amplifi ers in a closed-loop confi guration. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specifi ed maximum operating junction temperature may impair device reliability.
TYPICAL PERFORMANCE CHARACTERISTICS Buck Effi ciency 2 AA Cells to 1.5V Buck Effi ciency 2 AA Cells to 1.2V Buck Effi ciency USB (5V) to 1.8V Buck-Boost Effi ciency 2 AA Cells to 3.3V Buck-Boost Effi ciency USB (5V) to 3.3V Buck-Boost Effi ciency Li-Ion to 3.3V Buck Burst Mode Threshold No-Load Quiescent Current in Burst Mode Operation Standby Quiescent Current (TA = 25°C unless otherwise specifi ed) LOAD CURRENT (mA) 0.1 EFFICIENCY (%) 100 1 10
3101 G01
L = 4.7μH VBAT = 3.2V VBAT = 1.8V PWM Mode Burst Mode OPERATION LOAD CURRENT (mA) 0.1 EFFICIENCY (%) 100 1 10
3101 G02
L = 4.7μH VBAT = 3.2V VBAT = 1.8V PWM Mode Burst Mode OPERATION LOAD CURRENT (mA) 0.1 EFFICIENCY (%) 100 1 10
3101 G03
L = 4.7μH PWM Mode Burst Mode OPERATION LOAD CURRENT (mA) EFFICIENCY (%) 100 1 10
3101 G04
L = 4.7μH VBAT = 3.2V VBAT = 1.8V PWM Mode Burst Mode OPERATION LOAD CURRENT (mA) EFFICIENCY (%) 100 L = 4.7μH 1 10
3101 G05
LOAD CURRENT (mA) EFFICIENCY (%) 100 1 10
3101 G06
L = 4.7μH V BAT = 3.0V VBAT = 4.2V SUPPLY VOLTAGE, VBAT OR VUSB (V) 1.5 4.5
3101 G07
2.5 3.5 5.5 LOAD CURRENT (mA) L = 4.7μH VOUT = 0.8V VOUT = 1.2V VOUT = 1.8V SUPPL Y VOL TAGE, VBAT OR VUSB (V)
3101 G08
QUIESCENT CURRENT (μA) BUCK1, BUCK2 AND BUCK-BOOST ENABLED BUCK-BOOST ENABLED BOTH BUCKS DISABLED SUPPLY VOLTAGE, VBAT OR VUSB (V) INPUT SUPPLY CURRENT (μA)
3101 G09
LDO AND HSO OUTPUTS ACTIVE PWRON = 0V, PWRKEY= FLOATING
Current Limit Thresholds vs Temperature Buck Switch RDS(ON) Buck-Boost P-Channel Switch RDS(ON) Buck-Boost N-Channel Switch R DS(ON) Buck Switch RDS(0N) Buck-Boost P-Channel Switch R DS(0N) Buck-Boost N-Channel Switch R DS(0N) Feedback Voltages LDO Output Voltage TEMPERATURE (°C) –50 SWITCH RDS(ON) (mΩ) 400 500 600 PMOS NMOS 150
3101 G11
TEMPERATURE (°C) –50 180 200 240 100
3101 G12
220SWITCH RDS(ON) (mΩ) SWITCH D SWITCH A SWITCH A´ TEMPERATURE (°C) –50 SWITCH RDS(ON) (mΩ) 100 150 150
3101 G13
SUPPL Y VOL TAGE, VBAT OR VUSB (V) SWITCH RDS(ON) (Ω) 0.1 0.3 0.4 0.5 3 5 6 0.9
3101 G14
0.2 0.6 0.7 0.8 PMOS SWITCHES NMOS SWITCHES SUPPLY VOLTAGE, VBAT, VUSB OR VOUT3 (V) SWITCH RDS(ON) (Ω) 0.22 0.26 0.30
3101 G15
0.18 0.14 0.20 0.24 0.28 0.16 0.12 0.10 2 3 4 6 SWITCH D SWITCH A´ SWITCH A SUPPLY VOLTAGE, VBAT OR VUSB (V) SWITCH RDS(ON) (Ω) 0.16 0.18 0.20
3101 G16
0.14 0.12 0.15 0.17 0.19 0.13 0.11 0.10 2 3 4 6 SWITCH B SWITCH C TEMPERATURE (°C) –50 –0.5 CHANGE IN VOLTAGE FROM 25°C (%)–0.4 –0.2 –0.1 0.5 0.2 0 50
3101 G17
–0.3 0.3 0.4 0.1 100 150 FB3 FB1, FB2 TEMPERATURE (°C) –50 –1.0 CHANGE IN VOLTAGE FROM 25°C (%)–0.8 –0.4 –0.2 1.0 0.4 0 50
3101 G18
–0.6 0.6 0.8 0.2 100 150 TYPICAL PERFORMANCE CHARACTERISTICS(TA = 25°C unless otherwise specifi ed) TEMPERATURE (°C) –50 –10 CHANGE FROM 25°C (%) 0 50
3101 G10
Current, PWM Mode Buck-Boost Maximum Load Current, Burst Mode Operation Buck Output Voltage vs Load Current Buck-Boost Output Voltage vs Load Current CRS Pin Current Hot Swap Switch R DS(0N) MAX Output Switch RDS(0N) LDO Output Voltage vs Supply Voltage SUPPLY VOLTAGE, VBAT OR VUSB (V) LOAD CURRENT (mA) 200 400 600 800 1000 1200 2345
3101 G19
VOUT3 = 3.3V VOUT3 = 5V SUPPLY VOLTAGE, VBAT OR VUSB (V) LOAD CURRENT (mA) 100 120 2345
3101 G20
VOUT3 = 3.3V VOUT3 = 5V LOAD CURRENT (mA) CHANGE IN VOLTAGE FROM 5mA LOAD (%) 0.05 0.10 400
3101 G21
–0.05 –0.10 –0.20 100 200 300 –0.15 0.20 0.15 LOAD CURRENT (mA) –0.5 CHANGE IN OUTPUT VOLTAGE (%)–0.4 –0.2 –0.1 0.5 0.2 200 400
3101 G22
–0.3 0.3 0.4 0.1 600 800 SUPPLY VOLTAGE, VBAT OR VUSB (V) CHANGE IN CURRENT FROM 3V (%) 0.2 0.6 1.0
3101 G23
–0.2 –0.6 0.4 0.8 –0.4 –0.8 –1.0 2 3 4 6 BUCK-BOOST OUTPUT VOLTAGE (V) SWITCH RDS(ON) (Ω) 0.2 0.4 0.6 0.8 1.0 1.2 2345
3101 G24
SUPPL Y VOL TAGE, VBAT OR VUSB (V) SWITCH RDS(ON) (Ω) 0.6 0.8 1.0 4 6
3101 G25
0.4 0.2 23 5 1.2 1.4 1.6 SUPPLY VOLTAGE, VBAT OR VUSB (V) CHANGE IN VOLTAGE FROM 3V (%) 0.1 0.3 0.5
3101 G26
–0.1 –0.3 0.2 0.4 –0.2 –0.4 –1.5 2 3 4 6 LDO Output Voltage vs Load Current LDO LOAD CURRENT (mA) –1.5 CHANGE IN VOLTAGE FROM 1mA (%) –1.0 –0.5 0.5 1.5 20 40
3101 G27
1.0 TYPICAL PERFORMANCE CHARACTERISTICS(TA = 25°C unless otherwise specifi ed)
PBSTAT Deglitch Duration PBSTAT Deglitch Duration Buck-Boost Load Step, 0mA to 800mA Buck-Boost Load Step, 0mA to 300mA Buck Load Step, Burst Mode Operation, 10mA to 350mA Buck Load Step, PWM Mode, 35mA to 350mA Buck-Boost Burst Mode Ripple Buck Burst Mode Ripple TEMPERATURE (°C) –50 DEGLITCH DURATION (ms) 0 50
3101 G28
SUPPL Y VOL TAGE, VBAT OR VUSB (V) DEGLITCH DURATION (ms)
3101 G29
50μs/DIV
3101 G30
VBAT = 3V VOUT = 3.3V L = 4.7μH C OUT = 10μF OUTPUT VOL TAGE 200mV/DIV INDUCTOR CURRENT 500mA/DIV 50μs/DIV
3101 G31
VBAT = 1.8V VOUT = 3.3V L = 4.7μH C OUT = 10μF OUTPUT VOL TAGE 100mV/DIV INDUCTOR CURRENT 200mA/DIV 50μs/DIV
3101 G32
VBAT = 3V VOUT = 1.2V L = 4.7μH C OUT = 10μF CFF = 18pF OUTPUT VOL TAGE 100mV/DIV INDUCTOR CURRENT 200mA/DIV 50μs/DIV
3101 G33
VBAT = 3V VOUT = 1.2V L = 4.7μH C OUT = 10μF CFF = 18pF OUTPUT VOL TAGE 20mV/DIV INDUCTOR CURRENT 200mA/DIV 20μs/DIV
3101 G34
VBAT = 3V VOUT = 3.3V L = 4.7μH C OUT = 10μF ILOAD = 10mA OUTPUT VOL TAGE 10mV/DIV INDUCTOR CURRENT 50mA/DIV 20μs/DIV
3101 G35
VBAT = 3V VOUT = 1.2V L = 4.7μH C OUT = 10μF CFF = 18pF ILOAD = 5mA TYPICAL PERFORMANCE CHARACTERISTICS(TA = 25°C unless otherwise specifi ed)
Buck-Boost Burst to PWM Mode T ransient Buck Output Voltage T ransient on USB Hot Plug Buck-Boost Output Voltage T ransient on USB Hot Plug Buck-Boost Soft-Start, PWM Mode Buck Soft-Start, PWM Mode OUTPUT VOL TAGE 200mV/DIV INDUCTOR CURRENT 200mA/DIV VUSB 2V/DIV 100μs/DIV
3101 G37
VBAT = 3V VOUT = 1.8V ILOAD = 100mA OUTPUT VOL TAGE 200mV/DIV INDUCTOR CURRENT 200mA/DIV VUSB 2V/DIV 100μs/DIV
3101 G38
VBAT = 3V VOUT = 3.3V ILOAD = 100mA OUTPUT VOL TAGE 1V/DIV INDUCTOR CURRENT 200mA/DIV 200μs/DIV
3101 G39
VBAT = 3V VOUT = 3.3V L = 4.7μH C OUT = 10μF OUTPUT VOL TAGE 500mV/DIV INDUCTOR CURRENT 200mA/DIV 200μs/DIV
3101 G40
VBAT = 3V VOUT = 1.2V L = 4.7μH C OUT = 10μF TYPICAL PERFORMANCE CHARACTERISTICS(TA = 25°C unless otherwise specifi ed) VOUT3 50mV/DIV VBAT = 5.5V VOUT3 50mV/DIV VBAT = 3V VOUT3 50mV/DIV VBAT = 1.8V 200μs/DIV
3101 G36
VOUT3 = 3.3V L = 4.7μH C OUT = 10μF ILOAD = 5mA
PWM (Pin 1): Pulse Width Modulation/Burst Mode Se- lection Input. Forcing this pin high causes all switching converters to operate in low noise fi xed frequency PWM mode. Forcing this pin low enables Burst Mode operation for all converters. With PWM held low, the buck-boost converter will operate solely in Burst Mode operation and can only support a minimal load current (typically 50mA). With PWM low, the buck converters will automatically transition from Burst Mode operation at light load currents to PWM mode at heavy load currents. SW1 (Pin 2): Buck Converter 1 Switch Pin. This pin should be connected to one side of the buck inductor . BAT1 (Pin 3): Battery Power Input for Both Buck Converters. A 4.7μF or larger bypass capacitor should be connected between this pin and ground. The bypass capacitor should be located as close to the IC as possible and should via directly down to the ground plane. Pins BAT1 and BAT2 must be connected together in the application. USB1 (Pin 4): USB or Wall Adapter Power Input for Both Buck Converters. A 4.7μF or larger bypass capacitor should be connected from this pin to ground. The bypass capacitor should be located as close to the IC as possible and should via directly down to the ground plane. Pins USB1 and USB2 must be connected together in the application. SW2 (Pin 5): Buck Converter 2 Switch Pin. This pin should be connected to one side of the buck inductor . PWRON (Pin 6): Power-On Input. Forcing this input high enables the IC. Typically, the PWRKEY input is used to initially enable the L TC3101 while the microprocessor is powering up. Once the microprocessor is initialized, it forces PWRON high to keep the L TC3101 enabled when the momentary pushbutton connected to PWRKEY is released. In applications that do not require pushbutton control, the IC can be enabled directly by forcing PWRON high. FB3 (Pin 7): Feedback Voltage Input for the Buck-Boost Converter . The resistor divider connected to this pin sets the output voltage for buck-boost converter . PWRKEY (Pin 8): Pushbutton Power ON/OFF Key. Forcing this pin to ground will turn on the L TC3101 DC/DC con- verters in the internally controlled sequence and initiate a microprocessor reset. This pin is usually connected to an external momentary switch that is used to turn on the IC. This pin has an internal pull-up resistor that is automati- cally connected to the higher of the two input supplies, battery or USB. PBSTAT (Pin 9): Power ON/OFF Key Status Pin. This is a debounced, open-drain output that indicates the state of the PWRKEY pin to the microprocessor . In the typical ap- plication, the microprocessor monitors this pin to detect a second pushbutton activation indicating a power-down request. LDO (Pin 10): Always-Alive LDO Output. This output is internally regulated to 1.8V (typical) and is guaranteed to supply an external load of up to 50mA. The LDO output is always active whenever either supply, battery or USB power , is present (independent of the states of all enables and the pushbutton interface). This output can be utilized to power an external real time clock or charge a superca- pacitor for temporary memory backup when both power sources are removed. MAX (Pin 11): Power Output That T racks the Higher Voltage Input Supply. This output is driven to the higher of the two power inputs, USB2 or BAT2. This output can support a load current of up to 200mA and is short-circuit protected. The MAX output can be used to power an LCD display or external LDOs. The MAX output is operational whenever either supply, BAT2 or USB2, is present, independent of the state of all enables and the pushbutton interface. C RS (Pin 12): Power-on Reset Duration Programming Capacitor . An external capacitor is connected from CRS to ground to set the duration of the microprocessor power- on reset signal.
RESET (Pin 13): Active-Low μP Reset and Fault Signal. This pin provides an active-low microprocessor reset signal. During the power-up sequence, the μP reset sig- nal is held low until all converters are in regulation for a duration programmed by the C RS capacitor . In addition, this pin is held low during a fault condition and when the IC is disabled in order to prevent spurious turn-on of the microprocessor . BAT2 (Pin 14): Battery Power Input for the Buck-Boost Converter . A 10μF or larger bypass capacitor should be con- nected between this pin and ground. The bypass capacitor should be located as close to the IC as possible and should via directly down to the ground plane. Pins BAT1 and BAT2 must be connected together in the application. SW3A (Pin 15): Buck-Boost Switch Pin. This pin should be connected to one side of the buck-boost inductor . USB2 (Pin 16): USB or Wall Adapter Power Input for the Buck-Boost Converter . A 10μF or larger bypass capacitor should be connected from this pin to ground. The bypass capacitor should be located as close to the IC as pos- sible and should via directly down to the ground plane. Pins USB1 and USB2 must be connected together in the application. OUT3 (Pin 17): Buck-Boost Output Voltage. This pin is the power output for the buck-boost regulator . It should be connected to a low ESR capacitor with a value of at least 10μF . For higher output current applications (>400mA), it is recommended that a 22μF or larger output capacitor be used. The capacitor should be placed as close to the IC as possible and should have a short return path to ground. HSO (Pin 18): Hot Swap Output. An internal current-limited switch connects the HSO output to the buck-boost output voltage after the buck-boost output reaches regulation. With the buck-boost operating in PWM mode, this output is guaranteed to support a 100mA load and is short-circuit protected. ENA3 (Pin 19): Enable Pin for Buck-Boost Converter . Forcing this pin above 1V will turn on the buck-boost converter when the IC is enabled (via the pushbutton interface). Forcing this pin below 0.3V will disable the buck-boost converter . SW3B (Pin 20): Buck-Boost Switch Pin. This pin should be connected to one side of the buck-boost inductor . ENA1 (Pin 21): Enable Pin for Buck Converter 1. Forcing this pin above 1V will turn on the buck converter when the IC is enabled (via the pushbutton interface). Forcing this pin below 0.3V will disable buck converter 1. FB2 (Pin 22): Feedback Voltage Input for Buck Converter 2. The resistor divider connected to this pin sets the output voltage for buck converter 2. FB1 (Pin 23): Feedback Voltage Input for Buck Converter 1. The resistor divider connected to this pin sets the output voltage for buck converter 1. ENA2 (Pin 24): Enable Pin for Buck Converter 2. Forcing this pin above 1V will turn on the buck converter when the IC is enabled (via the pushbutton interface). Forcing this pin below 0.3V will disable buck converter 2. Exposed Pad (Pin 25): Small-Signal and Power Ground for the IC. The Exposed Pad must be soldered to the PCB and electrically connected to ground through the shortest and lowest impedance connection possible.
BAT1*3 USB1*4 ALWAYS-ON LDO CONTROL WELL CONTROL WELL CONTROL BAT2* USB2* SW3A SW3B OUT3 A BC D HSO BUCK-BOOST CONTROL PUSHBUTTON CONTROL LOGICBANDGAP REFERENCE OVERTEMPERATURE SHUTDOWN AND UNDERVOL TAGE LOCKOUT 1.27MHz OSCILLATOR 24ms DEGLITCH Hot Swap CONTROL FB3 ENA3 PWRKEY PWM PWRON CRS PBSTAT 1μA 1.20V 3101 BD DISABLED FB1 POWER BAD (IF ENABLED) FB2 POWER BAD (IF ENABLED) FB3 POWER BAD (IF ENABLED) UNDERVOL TAGE FAUL T OVERTEMPERATURE FAUL T 400k VCC RESET SW12 FB1 WELL CONTROL BUCK 1 CONTROL ENA2 BUCK 2 CONTROL GND (EXPOSED PAD) ENA121 SW25 FB2 *BAT1 AND BAT2 MUST BE CONNECTED TOGETHER IN THE APPLICATION USB1 AND USB2 MUST BE CONNECTED TOGETHER IN THE APPLICATION
The L TC3101 provides a complete power management solution for low power portable devices. It generates a total of six output voltage rails and provides a seamless, automatic transition between two input power sources. The L TC3101 contains three high effi ciency synchronous DC/DC converters: a 5-switch buck-boost DC/DC con- verter and two synchronous 3-switch step-down DC/DC converters. The buck-boost DC/DC converter is typically utilized to provide a 3V or 3.3V rail that lies within the input voltage range. The two step-down converters can be confi gured to provide two lower voltage output rails, such as a 1.8V rail for SDRAM and a 1.2V rail to supply the system microprocessor . The L TC3101 can operate from any power source over the wide input voltage range of 1.8V to 5.5V . All three switching DC/DC converters operate from a common 1.27MHz oscil- lator and a single pin can be used to place all three DC/DC converters into Burst Mode operation to reduce the total no-load quiescent current with all six output voltage rails active to only 38μA (typical). In standby operation, with only the LDO and MAX outputs active, the input current is reduced to 15μA (typical). The 5-switch buck-boost DC/DC converter generates a user-programmable output voltage rail that can lie within the voltage range of the input power sources. Utilizing a proprietary switching algorithm, the buck-boost con- verter maintains high effi ciency and low noise operation with input voltages that are above, below, or even equal to the required output rail. A protected Hot Swap output powered by the buck-boost output voltage rail is enabled once the buck-boost reaches regulation. This provides a current-limited output that can be shorted without affecting the primary buck-boost output. One use of the Hot Swap output is to power external fl ash memory cards that need to be hot-plugged without disrupting the primary buck- boost output rail. The synchronous buck converters are typically used to provide two high effi ciency lower voltage rails and sup- port 100% duty cycle operation to extend battery life. The output voltage of each buck converter is independently user programmable and can be set as low as 0.6V . An always-alive LDO provides a fi xed 1.8V output at 50mA which can be utilized to power critical functions such as a real time clock. Reverse blocking allows the LDO to be used to charge a supercapacitor for memory retention when both power sources are removed. The MAX output generates a secondary always-alive, current-limited output rail that tracks the higher voltage input power source (battery or USB) and is convenient for powering additional external LDOs and circuitry that can function directly from a wide input voltage range. A pushbutton interface and internal supply sequencing complete the L TC3101 as a total power supply solution while requiring only a minimal number of supporting external components. Integral to the pushbutton control is an internal microprocessor reset generator with a reset duration that can be easily programmed using a single external capacitor allowing the interface to be customized to each particular application. The extensive functionality and fl exibility of the L TC3101, along with its small size and high effi ciency, make it an excellent power solution for a wide variety of low power portable electronic products. PUSHBUTTON INTERFACE The L TC3101 includes a pushbutton interface that allows a single momentary pushbutton to control the sequenced power-up and power-down of all output rails in coordina- tion with an external microprocessor . In addition, three independent enable pins allow an unused DC/DC converter to be independently disabled and also provide the means to manually implement an alternate power-up sequence. The L TC3101 can be enabled by either forcing PWRON high or by forcing PWRKEY low. In either case, the DC/DC converters (if enabled by their respective enable pin) will power up in the internally fi xed default sequence: buck converter 1, buck converter 2, and fi nally the buck- boost converter . In the typical application, the power-on sequence is initiated when the PWRKEY is driven low by an external momentary pushbutton. Once the microproces- sor is powered up it must assert PWRON high before the pushbutton is released, thereby forcing the L TC3101 to
only the LDO and MAX outputs are active. of the L TC3101 high in order to keep the L TC3101 enabled.
3101 F01
Figure 1. Power-Up Sequence Waveforms
Each of the buck converters and the buck-boost converter have independent enable pins (ENA1, ENA2 and ENA3). These provide an additional degree of fl exibility by allow- ing any unused channels to be independently disabled and skipped in the power-up sequence. For example, if the additional low voltage rail generated by the second buck converter is not required, it can be disabled by simply forcing ENA2 to ground. The power-up sequence will be unaffected except that second buck converter will be skipped. As a result, buck converter 1 will power up and the buck-boost will be enabled as soon as buck con- verter 1 reaches regulation. Any unused channels can be disabled in this fashion and they will simply be skipped in the power-up sequence. Manual Power-Up Via The PWRON Pin If the pushbutton interface is not required, the L TC3101 can be manually enabled by simply forcing the PWRON pin high. When PWRON is forced high any channels that are enabled via their independent enable pin will power up in the standard sequence (buck converter 1, buck con- verter 2 and then the buck-boost converter). An arbitrary power-up sequence can be forced manually, by forcing all enables (ENA1, ENA2, ENA3) low while bringing PWRON high. Then, after waiting 10μs for the logic to initialize, the individual converters can be manually enabled via their independent enable pins in any order required. For example, a simultaneous power-up is initiated by bringing PWRON high while holding ENA1, ENA2 and ENA3 low. Then after a 10μs or longer delay, ENA1, ENA2 and ENA3 can be brought high simultaneously causing the two buck rails and the buck-boost rail to begin rising simultaneously. Fault Conditions On an overtemperature or input undervoltage fault condi- tion, all DC/DC converters, the LDO, and the MAX output are disabled and the C RS pin is driven low which results in the microprocessor reset output, RESET, being driven low as well. In the standard application, this will cause the microprocessor to release the PWRON pin, thereby disabling the L TC3101. Consequently, the L TC3101 will not automatically re-enable even if the fault condition clears. Instead, the L TC3101 will have to be restarted via repeating the normal power-up sequence. Alternatively, if PWRON is held high until the fault condition clears, then any enabled converters will power up in the default sequence once the fault clears and the microprocessor reset will clear after its programmed delay. If the power good comparator for any converter indicates a fault condition (loss of regulation), the C RS pin and RESET pins are driven low. In a typical application, this will place the microprocessor in the reset condition which will release the force on PWRON and therefore disable the L TC3101. However , if PWRON is maintained high, all converters will remain enabled through the fault condition. Once the fault condition clears, the affected converter output will recover , and C RS will begin charging. After the programmed reset duration, RESET will be released. LDO OUTPUT The LDO output generates a regulated 1.8V (nominal) output voltage rail that is guaranteed to support a 50mA load. The LDO output remains active whenever a valid supply is present on either the USB2 or BAT2 inputs and is unaffected by the pushbutton interface. Its always-on status allows the LDO to power critical functions such as a real time clock which must remain powered under all conditions. The LDO output is reverse blocking in shutdown (i.e., when undervoltage lockout threshold is reached) allowing its output to stay charged when both input supplies are removed with reverse leakage guaranteed to be under 1μA. This allows the LDO to be used to charge a supercapaci- tor for memory retention purposes or powering standby functions during times when both power sources are removed. The LDO is specifi cally designed to be stable with a small 4.7μF capacitor , but to also maintain stable operation with arbitrarily large capacitance supercapacitors without requiring a series isolation resistor . The LDO output is current-limit protected. On an undervoltage or overtemperature fault, the LDO is disabled until the fault condition clears.
The MAX output generates a protected output rail that tracks the higher of the two input supplies, BAT2 or USB2. The MAX output is current-limit protected and is guaranteed to support a 200mA load. The MAX output is an always-alive output, meaning it is always enabled independent of the state of the pushbutton interface. This allows the MAX output to power additional LDOs or critical circuitry that must remain powered in standby. In addition, the MAX output can be used to effi ciently power additional application circuits that can operate directly from a wide input voltage range without burdening one of the switching converters. The MAX output is also a convenient supply for forcing logic inputs (such as PWM, ENA1, ENA2 and ENA3) high since it is powered whenever either input supply is present. The MAX output is disabled in undervoltage lockout and during overtemperature shutdown. Since the MAX output serves as the input to the LDO, it is recommended that it be bypassed with a 1μF or greater ceramic capacitor if the LDO is to be used in the application. Hot Swap (HSO) OUTPUT The HSO output is generated by a protected power switch from the output of the buck-boost converter . It provides a current-limited output that can be shorted to ground without disrupting the buck-boost output voltage. This is primarily intended to be used as a supply rail for fl ash memory cards which can be hot-plugged in the applica- tion. When a card is hot-plugged into the HSO output, the supply bypass capacitors on the card are gradually charged via the current-limited output without affecting the buck-boost output rail. The HSO output is not enabled until the buck-boost is enabled and the buck-boost power good comparator indicates it is in regulation. BUCK CONVERTER OPERATION The L TC3101 contains two independent buck DC/DC converters each capable of supplying a 350mA load. Each has an adjustable output voltage that can be set as low as 0.6V . In addition, each buck converter supports low drop- out operation to extend battery life. These converters can be utilized in Burst Mode operation to improve light-load effi ciency and no-load standby current or in PWM mode to ensure low noise operation. Each buck converter has dual P-channel power switches and a single N-channel synchronous rectifi er . The dual P-channel power switches allow the buck converters to operate directly from either the battery or USB inputs (BAT1 or USB1). The buck converters will automatically and seamlessly transition to operate from the higher voltage supply. Both buck converters feature short-circuit protection and frequency foldback to prevent inductor current run-away during low resistance output short conditions. PWM Mode Operation If the PWM pin is forced high, both buck converters will operate in fi xed frequency pulse width modulation mode using current mode control. At the start of each oscillator cycle, the active P-channel switch is turned on and remains on until the inductor current with superimposed slope compensation ramp exceeds the error amplifi er output. At this point, the synchronous rectifi er is turned on and remains on until the inductor current falls to zero or a new switching cycle is initiated. As a result, the buck converter operates with discontinuous inductor current at light loads in order to improve effi ciency. At extremely light loads, the minimum on-time of the P-channel switch will be reached and the buck converter will begin turning off for multiple cycles in order to maintain regulation. Burst Mode Operation When the PWM pin is forced low, both buck converters will automatically and independently transition between Burst Mode operation at suffi ciently light loads (below approximately 10mA) and PWM mode at heavier loads. Burst Mode entry is determined by the peak inductor cur- rent and therefore the load current at which Burst Mode operation will be entered depends on the input voltage, the output voltage and the inductor value. Typical curves for Burst Mode entry threshold are provided in the Typical Performance Characteristics section of this data sheet. In dropout operation, the active P-channel switch will remain on continuously and Burst Mode operation will not be entered.
As the input voltage decreases to a value approaching the output regulation voltage, the duty cycle increases to the maximum on-time of the P-channel switch. Further reduction of the supply voltage will force the main switch to remain on for more than one cycle and subharmonic switching will occur to provide a higher effective duty cycle. If the input voltage is decreased further , the buck converter will enter 100% duty cycle operation and the P-channel switch will remain on continuously. In this dropout state, the output voltage is determined by the input voltage less the resistive voltage drop across the P-channel switch and series resistance of the inductor . Slope Compensation Current mode control requires the use of slope compensa- tion to prevent sub-harmonic oscillations in the inductor current waveform at high duty cycle operation. This function is performed internally on the L TC3101 through the addition of a compensating ramp to the current sense signal. In some current mode ICs, current limiting is performed by clamping the error amplifi er voltage to a fi xed maximum. This leads to a reduced output current capability at low step-down ratios. In contrast, the L TC3101 performs cur- rent-limiting prior to addition of the slope compensation ramp and therefore achieves a peak inductor current limit that is independent of duty cycle. Output Short-Circuit Operation When the output is shorted to ground, the error amplifi er will saturate high and the P-channel switch will turn on at the start of each cycle and remain on until the current limit trips. During this minimum on-time of the P-channel switch, the inductor current will increase rapidly but will decrease very slowly during the remainder of the period due to the very small reverse voltage produced by a hard output short. To eliminate the possibility of inductor current runaway in this situation, the switching frequency of the buck converters is reduced by a factor of four when the voltage on the respective feedback pin (FB1 or FB2) falls below 0.3V . This provides additional time for the inductor current to reset and thereby protects against a build-up of current in the inductor . Internal Voltage Mode Soft-Start Each buck converter has an independent internal voltage mode soft-start circuit with a nominal duration of 800μs. The buck converters remain in regulation during soft-start and will therefore respond to output load transients which occur during this time. In addition, the output voltage rise- time has minimal dependency on the size of the output capacitor or load current during start-up. Error Amplifi er and Internal Compensation The L TC3101 buck converters utilize internal transconduc- tance error amplifi ers. Compensation of the buck converter feedback loops is performed internally to reduce the size of the application circuit and simplify the design process. The compensation network has been designed to allow use of a wide range of output capacitors while simultaneously ensuring a rapid response to load transients. Power Good Comparator Operation Each buck converter has an internal power good compara- tor that monitors the respective feedback pin voltage (FB1 or FB2). The power good comparator outputs are used at power-up for sequencing purposes. During normal opera- tion, the power good comparators are used to monitor the output rails for a fault condition. If either buck power good comparator indicates a fault condition, the C RS and RESET pins are driven low. This can be used to reset a microprocessor in the application circuit when either buck converter output rail loses regulation. The buck power good comparator will trip when the respective feedback pin falls 8% (nominally) below the regulation voltage. With a rising output voltage, the power good comparator will typically clear when the respective feedback voltage rises to within 5.5% of the regulation voltage. In addition, there is a 60μs typical deglitching delay in the power good comparators in order to prevent false trips due to brief voltage transients occurring on load steps.
discontinuity in inductor current or loop characteristics. and the duration of the BD phase decreases proportionally. the converter is operating solely in boost mode.
3101 F02
Figure 2. Buck-Boost Switch Topology Figure 3. Buck-Boost Error Amplifi er and Compensation
transient response of the converter . Increasing the value of R2 generally leads to greater stability at the expense of reduced transient response speed. Increasing the value of R2 can yield substantial transient response improvement in cases where the phase margin has been reduced due to use of a small value output capacitor or a large inductance (particularly with large boost step-up ratios). Conversely, decreasing the value of R2 increases the loop bandwidth which can improve the speed of the converter’s transient response. This can be useful in improving the transient response if a large value output capacitor is utilized. In this case, the increased bandwidth created by decreasing R2 is used to counteract the reduced converter bandwidth caused by the large output capacitor . Current Limit Operation The buck-boost converter has two current limit circuits. The primary current limit is an average current limit cir- cuit which injects an amount of current into the feedback node which is proportional to the extent that the switch A (or A´) current exceeds the current limit value. Due to the high gain of the feedback loop, the injected current forces the error amplifi er output to decrease until the average current through switch A decreases approximately to the current limit value. The average current limit utilizes the error amplifi er in an active state and thereby provides a smooth recovery with little overshoot once the current limit fault condition is removed. Since the current limit is based on the average current through switch A (or A´), the peak inductor current in current limit will have a dependency on the duty cycle (i.e., on the input and output voltages) in the overcurrent condition. The speed of the average current limit circuit is limited by the dynamics of the error amplifi er . On a hard output short, it would be possible for the inductor current to increase sub- stantially beyond current limit before the average current limit circuit would react. For this reason, there is a second current limit circuit which turns off switch A (and A´) if the current ever exceeds approximately 165% of the average current limit value. This provides additional protection in the case of an instantaneous hard output short. Reverse Current Limit A reverse current comparator on switch D monitors the current entering the OUT3 pin. When this current exceeds 400mA (typical) switch D will be turned off for the re- mainder of the switching cycle. This feature protects the buck-boost converter from excessive reverse current if the buck-boost output is held above the regulation voltage by an external source. Burst Mode Operation With the PWM pin held low, the buck-boost converter operates utilizing a variable frequency switching algorithm designed to improve effi ciency at light load and reduce the standby current at zero load. In Burst Mode operation, the inductor is charged with fi xed peak amplitude current pulses. These current pulses are repeated as often as necessary to maintain the output regulation voltage. The maximum output current, I MAX, which can be supplied in Burst Mode operation is dependent upon the input and output voltage as given by the following formula: I V VV AMAX IN IN OUT = + ()01 5.• If the buck-boost load exceeds the maximum Burst Mode current capability, the output rail will lose regulation and the power good comparator will indicate a fault condition. In Burst Mode operation, the error amplifi er is not used but is instead placed in a low current standby mode to reduce supply current and improve light load effi ciency. Internal Voltage Mode Soft-Start The buck-boost converter has an internal voltage mode soft-start circuit with a nominal duration of 800μs. The converter remains in regulation during soft-start and will therefore respond to output load transients that occur during this time. In addition, the output voltage rise time has minimal dependency on the size of the output capaci- tor or load. During soft-start, the buck-boost converter is forced into PWM mode operation regardless of the state of the PWM pin.
Power Good Comparator Operation The buck-boost converter contains an internal power good comparator that continuously monitors the voltage of the feedback pin FB3. The output of this comparator is used during power-up for sequencing purposes. In ad- dition, during operation, if the power good comparator indicates a fault condition, C RS and RESET will be driven low. This feature can be used to reset a microprocessor in the application circuit if the buck-boost output loses regulation. In Burst Mode operation (PWM = low), the buck-boost power good comparator will indicate a fault when the feedback voltage falls approximately 8.5% below the regu- lation voltage. There is approximately 2.5% hysteresis in this threshold when the output voltage is returning good. In addition, there is a 60μs typical deglitching delay in order to prevent false trips due to short duration voltage transients in response to load steps. In PWM mode, operation of the power good comparator is complicated by the fact that the feedback pin voltage is driven to the reference voltage independent of the output voltage through the action of the voltage mode error amplifi er . Since the soft-start is voltage mode, the feedback voltage will track the output voltage correctly during soft-start, and the power good comparator output will correctly indicate the point at which the buck-boost attains regulation at the end of soft-start. However , once in regulation, the feedback voltage will no longer track the output voltage and the power good comparator will not immediately respond to a loss of regulation in the output. For this reason, the power good comparator output is also designed to indicate a fault condition if the buck-boost converter enters current limit. The only means by which a loss of regulation can occur is if the current limit has been reached thereby preventing the buck-boost converter from delivering the required output current. In such cases, the occurrence of current limit will directly cause the power good comparator to indicate a fault state. However , there may be cases at the boundary of reaching current limit when the buck-boost converter is continuously in current limit, causing the power good comparator to indicate a fault, but the output voltage may be slightly above the actual power good threshold. COMMON FUNCTIONS Thermal Shutdown If the die temperature exceeds 150°C all DC/DC converters will be disabled. In addition, the LDO and MAX outputs are disabled. All power devices are turned off and all switch nodes will be high impedance. The soft-start circuits for all converters are reset during thermal shutdown to provide a smooth recovery once the overtemperature condition is eliminated. All DC/DC converters (if enabled) and the LDO and MAX outputs will restart when the die temperature drops to approximately 140°C. Undervoltage Lockout If the supply voltage decreases below 1.65V (typical) then all DC/DC converters will be disabled and all power devices are turned off. In addition, the MAX and LDO outputs are disabled. The LDO is forced into its reverse blocking state, allowing the LDO output to remain powered with less than 1μA reverse current being drawn by the L TC3101. The soft-start circuits for all DC/DC converters are reset during undervoltage lockout to provide a smooth restart once the input voltage rises above the undervoltage lockout threshold. Active Output Discharge All three DC/DC converter outputs are actively discharged to ground when disabled through 1kΩ (typical) imped- ances. The buck converter outputs are discharged through the inductor via a pull-down resistor on the respective switch pin. OPERATION
The basic L TC3101 application circuit is shown as the Typical Application on the front page of this data sheet. The external component selection is dependent upon the required performance of the IC in each particular appli- cation given considerations and tradeoffs such as PCB area, output voltages, output currents, ripple voltages and effi ciency. This section of the data sheet provides some basic guidelines and considerations to aid in the selection of external components and the design of the application circuit. C RS Capacitor Selection A capacitor from the C RS pin to ground is used to pro- gram the duration of the microprocessor reset signal on the RESET pin. A low leakage ceramic capacitor should be utilized to ensure reliable temperature independent operation. At the start of the active-low reset pulse, a 1μA (typical) current begins charging the C RS capacitor . The RESET pulse ends when the voltage at the CRS pin reaches 1.20V (typical). Therefore, the required CRS capacitor value, CRS, is given by the following equation where tRESET is the desired reset duration in milliseconds: C t μFRS RESET= ()1200 If the microprocessor reset function of the L TC3101 is unused, the CRS pin can be left unconnected. LDO Output Capacitance The LDO has been specifi cally designed for stable opera- tion with a wide range of output capacitors. For most ap- plications, a low ESR ceramic capacitor of at least 4.7μF should be utilized. Large valued supercapacitors can be connected directly to the LDO output without requiring a series isolation resistor for loop stability. However , if the supercapacitor has signifi cant ESR, it may be necessary to place a small 4.7μF ceramic in parallel with the super- capacitor to maintain an adequate phase margin. MAX Capacitor Selection The MAX output serves as the input to the LDO. There- fore, even if the MAX output is unused directly in the application, it is recommended that it be bypassed with a 1μF or larger ceramic capacitor . There is no limit to the maximum capacitance on this pin. However , the soft-start duration is formed by the current-limited output charg- ing the capacitance attached to the pin so larger output capacitors will result in proportionally longer soft-start durations. Buck Inductor Selection The choice of buck inductor value infl uences both the ef- fi ciency and the magnitude of the output voltage ripple. Larger inductance values will reduce inductor current ripple and will therefore lead to lower output voltage ripple. For a fi xed DC resistance, a larger value inductor will yield higher effi ciency by lowering the peak current to be closer to the average output current. However , a larger inductor within a given inductor family will generally have a greater series resistance, thereby counteracting this effi ciency advantage. Given a desired peak-to-peak current ripple, ΔI L, the required inductance can be calculated via the following expression, where f represents the switching frequency in MHz: L V fI V V μHOUT L OUT IN = ⎛ ⎠⎟ ()• – Δ 1 A reasonable choice for ripple current is ΔIL = 140mA which represents 40% of the maximum 350mA load current. The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current in order to prevent core saturation and loss of effi ciency during operation. To optimize effi ciency the inductor should have a low DC resistance (DCR). In particularly space-restricted applications it may be advantageous to use a much smaller value inductor at the expense of larger ripple current. In such cases, the converter will operate in discontinuous conduction for a wider range of output loads and effi ciency will be reduced. In addition, there is a minimum inductor value required to maintain stability of the current loop as determined by the fi xed internal slope compensation. Specifi cally, if the
several common output voltages. Table 1. Buck Minimum Inductance application height, required output current and effi ciency. decreases with increased inductance. converter output in order to minimize output voltage ripple. Table 2. Representative Buck Inductors Programming section for more details).
Table 3. Buck Minimum Recommended Output Capacitance (FB1 or FB2) as shown in Figure 4. commonly utilized output voltages. Table 4. Buck Resistor Divider and Feedforward Capacitor
3101 F04
Figure 4. Setting the Buck Output Voltages
divider connected to the FB3 pin as shown in Figure 5. be limited by the total resistive losses in the power stage. Characteristics section of this data sheet. minimizes the chances of interference with other circuitry.
3101 F05
Figure 5. Setting the Buck-Boost Output Voltage set the desired output voltage according to Equation 2.
- – VV IVV CVfP LOAD OUT IN OUT OUT -P(BOOST) = () – Given that the output current is discontinuous in boost mode, the ripple in this mode will generally be much larger than the magnitude of the ripple in buck mode. In addi- tion to controlling the ripple magnitude, the value of the output capacitor also affects the location of the resonant frequency in the open-loop converter transfer function. If the output capacitor is too small, the bandwidth of the converter will extend high enough to degrade the phase margin. To prevent this from happening, it is recommended that a minimum value of 10μF be used for the buck-boost output capacitor . If the required buck-boost load current is greater than 400mA, it is recommended that the output capacitor be increased to 22μF to improve output voltage ripple and loop stability. Buck-Boost Input Capacitor Selection The supply current to the buck-boost converter is provided by the USB2 and BAT2 pins. In addition, these pins provide power to the internal circuitry of the L TC3101. It is recom- mended that a low ESR ceramic capacitor with a value of at least 10μF be located as close to each of these pins as possible. In addition, the return trace from each pin to the ground plane should be made as short as possible. Capacitor Vendor Information Both the input bypass capacitors and DC/DC converter output capacitors used with the L TC3101 must be low ESR and designed to handle the large AC currents generated by switching converters. This is important to maintain proper functioning of the IC and to reduce output ripple. Many modern low voltage ceramic capacitors experience signifi cant loss in capacitance from their rated value with increased DC bias voltages. For example, it is not uncommon for a small surface mount ceramic capacitor APPLICATIONS INFORMATION provides a small sampling of inductors that are well suited to many L TC3101 buck-boost converter applications. All inductor specifi cations are listed at an inductance value of 4.7μH for comparison purposes but other values within these inductor families are generally well suited to this ap- plication. Within each family (i.e., at a fi xed size), the DC resistance generally increases and the maximum current generally decreases with increased inductance.
Table 5. Representative Buck-Boost Surface Mount Inductors to reduce the output voltage ripple to acceptable levels.
loss over temperature is minimized. Table 6. Representative Bypass and Output Capacitors The L TC3101 switches large currents at high frequencies. sure a stable, noise-free and effi cient application circuit.
- All circulating high current paths should be kept as
- The Exposed Pad is the small-signal and power ground
increase the power handling capabilities of the IC.
- The components shown in bold and their connections
EMI and reduces inductive drops.
- Connections to all of the components shown in bold
output current capability of the buck-boost converter .
- To prevent large circulating currents from disrupting
- Keep the connection from the resistor dividers to the
away from the switch pin connections.
- Crossover connections (such as the one shown from
3101 F06
Figure 6. PCB Layout Recommendations
2 AA Cell/USB/Wall Adapter Power Supply with Six Output Rails and Pushbutton On/Off
C1-C5: MURATA GRM31CR71A106KA01 L1, L2: TAIYO YUDEN NR3010T4R7M L3: COILCRAFT LPS4018-472ML RESET PWM USB2 FB3 LDO SW2 FB2 HSO MAX ENA3 ENA2 ENA1 10μF 10μF 2 AA CELLS USB POWER 4.3V TO 5.5V 10μF R8 V OUT3 = 3.3V 300mA FOR VIN ≥ 1.8V 800mA FOR VIN ≥ 3V 221k 4.7μH 4.7μF TRACKING OUTPUT 200mA Hot Swap OUTPUT 3.3V 100mA 4.7μF 4.7μF 1.8V 50mA V OUT2 1.8V 350mA VOUT1 1.5V 350mA 10μFR6 221k 110k 4.7μH SW1 FB1 10μF C10 22pF 22pF
3101 TA02a
4.7μH 0.22μF ON/OFF BAT2 SW3A L TC3101 GND SW3B OUT3 WALL ADAPTER 4.0V TO 5.5V μP VOUT1 Waveforms During Power-Up Buck-Boost Converter Effi ciency vs Load Current Buck Converter Effi ciency vs Load Current, VBAT = 3V LOAD CURRENT (mA) EFFICIENCY (%) 10 100
3101 TA02c
VBAT = 2V VBAT = 3V LOAD CURRENT (mA) EFFICIENCY (%) 10 100
3101 TA02d
BUCK1 (1.5V) BUCK2 (1.8V) PWRKEY 5V/DIV VOUT1 2V/DIV VOUT2 2V/DIV VOUT3 5V/DIV HSO 5V/DIV CRS 100mV/DIV 5ms/DIV
3101 TA02b
Manual Enable with Simultaneous Start-Up Power-Up Waveforms BAT1 USB1 USB2 ENA1 ENA2 ENA3 FB3 LDO SW2 FB2CRS DISABLE ENABLE HSO MAX PWM PWRON 10μF 0.22μF 10μF 2 AA CELLS USB POWER 4.3V TO 5.5V 10μF R1 V OUT3 = 3.3V 300mA FOR VIN ≥ 1.8V 800mA FOR VIN ≥ 3V 221k 4.7μH TRACKING OUTPUT 200mA Hot Swap OUTPUT 3.3V 100mA 4.7μF 4.7μF 4.7μF 1.8V 50mA V OUT2 1.8V 350mA VOUT1 1.5V 350mA 10μF 221k 110k 4.7μH SW1 FB1 C11 10μF C10 22pF 22pF
3101 TA03a
4.7μH BAT2 SW3A L TC3101 GND SW3B OUT3 ENABLE 5V/DIV OUTPUT VOL TAGES 1V/DIV HSO 2V/DIV 200μs/DIV
3101 TA03b
RESET Timing During Power Up ENABLE 5V/DIV VOUT1 2V/DIV RESET 5V/DIV VOUT2 5V/DIV VOUT3 5V/DIV CRS 2V/DIV 50ms/DIV
3101 TA03c
Li-Ion/USB-Powered Six Output Power Supply with Pushbutton Control Buck-Boost Effi ciency vs Load Current Buck Converter 1 Effi ciency vs Load Current Buck Converter 2 Effi ciency vs Load Current BAT1 USB1 CRS PWRKEY PWRON PWM PBSTAT L1, L2: WURTH 744031004 L3: TAIYO YUDEN NR4018T4R7M 50k 50k RESET USB2 FB3 LDO SW2 FB2 HSO MAX ENA3 ENA2 ENA1 10μF 10μF Li-Ion 1.8V TO 4.2V USB POWER 4.3V TO 5.5V 10μF R3 V OUT3 = 3.3V 300mA FOR VIN ≥ 1.8V 800mA FOR VIN ≥ 3V 221k 4.7μH TRACKING OUTPUT 200mA Hot Swap OUTPUT 3.3V 100mA 4.7μF 4.7μF 4.7μF 1.8V 50mA V OUT2 1.2V 350mA VOUT1 0.8V 350mA 10μF 221k 221k 4.7μH SW1 FB1 C11 22μF C10 22pF 22pF
3101 TA04a
4.7μH 0.22μF ON/OFF BAT2 SW3A L TC3101 GND SW3B OUT3 μP VOUT2 LOAD CURRENT (mA) EFFICIENCY (%) 10 100
3101 TA04b
VBAT = 3.0V VBAT = 4.2V LOAD CURRENT (mA) EFFICIENCY (%) 10 100 VBAT = 3.0V VBAT = 4.2V LOAD CURRENT (mA) EFFICIENCY (%) 10 100
3101 TA04d
VBAT = 3.0V VBAT = 4.2V
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION Sequenced Start-Up, Buck-Boost Followed by Buck Converters BAT1 USB1 CRS PWRKEY PWRON PBSTAT 50k 50k RESET USB2 FB3 LDO SW2 FB2 HSO MAX PWM ENA1 ENA2 ENA3 10μF 10μF 2 AA CELLS USB POWER 4.3V TO 5.5V 10μF V OUT3 = 3.3V 300mA FOR VIN ≥ 1.8V 800mA FOR VIN ≥ 3V 221k 100k 4.7μH TRACKING OUTPUT 200mA Hot Swap OUTPUT 3.3V 100mA 4.7μF 4.7μF 4.7μF 0.1μF 1.8V 50mA V OUT2 1.8V 350mA VOUT1 1.2V 350mA C10 10μF 221k 110k 4.7μH SW1 FB1 C12 10μF C11 22pF 22pF
3101 TA05a
4.7μH 0.033μF ON/OFF BAT2 SW3A L TC3101 GND SW3B OUT3 μP VOUT1 Power-Up Waveforms 24-Lead Plastic QFN (4mm × 4mm) (Reference L TC DWG # 05-08-1697) 4.00 p 0.10 (4 SIDES) NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT , SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONL Y A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (NOTE 6) 0.40 p 0.10 2423 BOTTOM VIEW—EXPOSED PAD 2.45 p 0.10 (4-SIDES) 0.75 p 0.05 R = 0.115 TYP 0.25 p 0.05
0.50 BSC
0.200 REF
0.00 – 0.05 (UF24) QFN 0105 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.70 p0.05 0.25 p0.05 2.45 p 0.05 (4 SIDES) 3.10 p 0.05 4.50 p 0.05 PACKAGE OUTLINE PIN 1 NOTCH R = 0.20 TYP OR 0.35 s 45o CHAMFER TYPICAL APPLICATIONS PWRKEY 5V/DIV PBSTAT 2V/DIV OUTPUT VOL TAGES 1V/DIV CRS 2V/DIV RESET 2V/DIV 10ms/DIV
3101 TA05b
Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 2008 LT 1208 • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS L T3009 3μA I Q, 20mA Low Dropout Linear Regulator V IN: 1.6V to 20V , VOUT as Low as 0.6V , IQ = 3μA, ISD < 1μA, SC70 and DFN Packages L TC3100 700mA Synchronous Step-Up, 250mA Step-Down DC/DC Converters, 100mA LDO VIN: 0.65V to 5V , Step-Up VOUT : 1.5V to 5.25V , Step-Down VOUT as Low as 0.6V , IQ = 15μA, ISD < 1μA, QFN Package L TC3409 600mA, Low V IN, 2.6MHz Synchronous Step-Down DC/DC Converter VIN: 1.6V to 5.5V , VOUT as Low as 0.61V , IQ = 65μA, ISD < 1μA, L TC3440 600mA (I OUT), 2MHz Synchronous Buck-Boost DC/DC Converter VIN: 2.5V to 5.5V , VOUT : 2.5V to 5.25V , IQ = 25μA, ISD < 1μA, MSOP and DFN Packages L TC3442 1.2A (I OUT), 2MHz Synchronous Buck-Boost DC/DC Converter with Programmable Burst Mode Operation VIN: 2.4V to 5.5V , VOUT : 2.4V to 5.25V , IQ = 35μA, ISD < 1μA, DFN Package L TC3444 400mA (I OUT), 1.5MHz Synchronous Buck-Boost DC/DC Converter VIN: 2.75V to 5.5V , VOUT : 0.5V to 5V , ISD < 1μA, DFN Package L TC3455 Dual DC/DC Converter with USB Power Manager and Li-Ion Battery Charger VIN: 3V to 5.5V , T ransition Between Inputs, IQ = 110μA, ISD < 2μA, L TC3456 2-Cell, Multi-Output DC/DC Converter with USB Power Manager VIN: 1.8V to 5.5V , Dual DC/DC Converter and Hot Swap Outputs, Seamless T ransition Between Inputs, IQ = 180μA, ISD < 1μA, QFN Package L TC3520 1A (I OUT) Synchronous Buck-Boost and 600mA Step-Down DC/DC Converters with LDO Controller VIN: 2.2V to 5.5V , Buck-Boost VOUT : 2.2V to 5.25V , Step-Down VOUT as Low as 0.8V , IQ = 55μA, ISD < 1μA, QFN Package L TC3522 400mA (I OUT) Synchronous Buck-Boost and 200mA Step-Down DC/DC Converters VIN: 2.4V to 5.5V , Buck-Boost VOUT : 2.2V to 5.25V , Step-Down VOUT as Low as 0.6V , IQ = 25μA, ISD < 1μA, QFN Package L TC3523 Synchronous 600mA Step-Up and 400mA Step-Down 2.4MHz DC/DC Converters VIN: 1.8V to 5.5V , Step-Up VOUT : 1.8V to 5.25V , Step-Down VOUT as Low as 0.6V , IQ = 45μA, ISD < 2μA, QFN Package L TC3527 Dual 2.2MHz 800mA/400mA Synchronous Step-Up DC/DC Converters VIN: 0.5V to5V , VOUT : 1.6V to 5.25V , IQ = 40μA, ISD < 1μA, DFN Package L TC3530 600mA (I OUT), 2MHz Synchronous Buck-Boost DC/DC Converter VIN: 1.8V to 5.5V , VOUT : 1.8V to 5.25V , IQ = 12μA, ISD < 2μA, QFN Package L TC3533 2A (I OUT), 2MHz Synchronous Buck-Boost DC/DC Converter V IN: 1.8V to 5.5V , VOUT : 1.8V to 5.25V , IQ = 40μA, ISD < 1μA, DFN Package L TC3537 600mA, 2.2MHz Synchronous Step-Up DC/DC Converter and 100mA LDO VIN: 0.68V to 5V , VOUT : 1.5V to 5.25V , IQ = 30μA, ISD < 1μA, QFN Package L TC3549 250mA, Low V IN, 2.25MHz Synchronous Step-Down DC/DC Converter VIN: 1.6V to 5.5V , VOUT as Low as 0.61V , IQ = 50μA, ISD < 1μA, L TC3555 High Effi ciency USB Power Manager , Li-Ion/Polymer Battery Charger and T riple Step-Down DC/DC Converters VIN: 2.7V to 5.5V , 1.5A Maximum Charge Current, 180mΩ Ideal Diode, T wo 400mA and One 1A Buck DC/DC, IQ = 20μA, QFN Package L TC3556 High Effi ciency USB Power Manager with Dual Step-Down and Buck-Boost DC/DC Converters VIN: 2.7V to 5.5V , 1.5A Maximum Charge Current, 1A Buck-Boost DC/DC, Dual 400mA Step-Down DC/DC, IQ = 20μA, QFN Package L TC3557 USB Power Manager with Li-Ion Charger and Three Step-Down Regulators VIN: 2.7V to 5.5V , Seamless T ransition Between Inputs, 1.5A Charging Current, T wo 400mA and One 600mA Step-Down DC/DC, QFN Package L TC3566/ L TC3567 Switching USB Power Manager with Li-Ion/Polymer Charger , 1A Buck-Boost Converter Plus LDO Multi-Function PMIC: Switchmode Power Manager and 1A Buck-Boost Regulator Plus LDO, Charge Current Programmable up to 1.5A from Wall Adapter Input, Synchronous Buck-Boost Converters Effi ciency: >95%, ADJ Output: Down to 0.8V at 1A, L TC3567 Has I 2C Interface, 4mm × 4mm QFN-24 Package L TC3586 Switching USB Power Manager with Li-Ion/Polymer Charger Plus Dual Buck Plus Buck-Boost Plus Boost DC/DC Maximizes Available Power from USB Port, “Instant On” Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ Option, T wo 400mA Synchronous Buck Regulators, One 1A Buck-Boost Regulator , One 600mA Boost Regulator , 4mm × 6mm 38-Pin QFN Package