LTC4364-1 LINER
Document overview
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Technical content
The L TC®4364 surge stopper with ideal diode controller protects loads from high voltage transients. It limits and regulates the output during an overvoltage event, such as load dump in automobiles, by controlling the voltage drop across an external N-channel MOSFET pass device. The L TC4364 also includes a timed, current limited circuit breaker . In a fault condition, an adjustable fault timer must expire before the pass device is turned off. The L TC4364-1 latches off the pass device while the L TC4364-2 automati- cally restarts after a delay. The L TC4364 precisely monitors the input supply for overvoltage (OV) and undervoltage (UV) conditions. The external MOSFET is held off in un - dervoltage and auto-retry is disabled in overvoltage. An integrated ideal diode controller drives a second MOS- FET to replace a Schottky diode for reverse input protec- tion and output voltage holdup. The L TC4364 controls the forward voltage drop across the MOSFET and minimizes reverse current transients upon power source failure, brownout or input short. Overvoltage Protector Regulates Output at 27V During Input T ransient Ideal Diode Holds Up Output During Input Short 4A, 12V Overvoltage Output Regulator with Ideal Diode Withstands 200V 1ms T ransient at VIN
APPLICATIONS
n Wide Operating Voltage Range: 4V to 80V n Withstands Surges Over 80V with VCC Clamp n Adjustable Output Clamp Voltage n Ideal Diode Controller Holds Up Output Voltage During Input Brownouts n Reverse Input Protection to –40V n Reverse Output Protection to –20V n Overcurrent Protection n Low 10μA Shutdown Current at 12V n Adjustable Fault Timer n 0.1% Retry Duty Cycle During Faults (L TC4364-2) n Available in 4mm × 3mm 14-Lead DFN, 16-Lead MSOP , and 16-Lead SO Packages n Automotive/Avionic Surge Protection n Hot Swap/Live Insertion n Redundant Supply ORing n Output Port Protection L, L T , L TC, L TM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. OUTSENSEDGATESOURCEHGATE TMRGND 0.22µF UVUV OV 60V OV ENOUT ENABLE FAULT
436412 TA01a
10/uni03A92.2k 383k VIN 12V 90.9k 10k 102k 22µF VOUT CLAMPED AT 27V 4.99k CMZ5945B 68V FDB33N25 FDB3682 10m/uni03A9 6.8nF VCC L TC4364 50ms/DIV CTMR = 6.8µF ILOAD = 0.5A VIN 20V/DIV 12V 12VVOUT 20V/DIV 92V INPUT SURGE 27V CLAMP (ADJUSTABLE)
4364 TA01b
CLOAD = 6300µF ILOAD = 0.5AVIN 10V/DIV 12V 12VVOUT 10V/DIV
4364 TA01c
DGATE, HGATE Voltages Voltage Difference (SENSE to SOURCE) ..–100V to 100V (Notes 1, 2) FB TMR ENOUT FLT GND OV UV OUT SENSE DGATE SOURCE HGATE V CC SHDN TOP VIEW DE PACKAGE 14-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 45°C/W EXPOSED PAD (PIN 15) PCB GND CONNECTION OPTIONAL OUT SENSE NC DGATE SOURCE HGATE NC V CC FB TMR ENOUT FLT GND OV UV SHDN TOP VIEW MS PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 120°C/W TOP VIEW S PACKAGE 16-LEAD PLASTIC SO OUT SENSE NC DGATE SOURCE HGATE NC V CC FB TMR ENOUT FLT GND OV UV SHDN TJMAX = 150°C, θJA = 100°C/W PIN CONFIGURATION ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L TC4364CDE-1#PBF L TC4364CDE-1#TRPBF 43641 14-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C L TC4364IDE-1#PBF L TC4364IDE-1#TRPBF 43641 14-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C L TC4364HDE-1#PBF L TC4364HDE-1#TRPBF 43641 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C L TC4364CDE-2#PBF L TC4364CDE-2#TRPBF 43642 14-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C L TC4364IDE-2#PBF L TC4364IDE-2#TRPBF 43642 14-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C L TC4364HDE-2#PBF L TC4364HDE-2#TRPBF 43642 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C L TC4364CMS-1#PBF L TC4364CMS-1#TRPBF 43641 16-Lead Plastic MSOP 0°C to 70°C L TC4364IMS-1#PBF L TC4364IMS-1#TRPBF 43641 16-Lead Plastic MSOP –40°C to 85°C L TC4364HMS-1#PBF L TC4364HMS-1#TRPBF 43641 16-Lead Plastic MSOP –40°C to 125°C L TC4364CMS-2#PBF L TC4364CMS-2#TRPBF 43642 16-Lead Plastic MSOP 0°C to 70°C L TC4364IMS-2#PBF L TC4364IMS-2#TRPBF 43642 16-Lead Plastic MSOP –40°C to 85°C L TC4364HMS-2#PBF L TC4364HMS-2#TRPBF 43642 16-Lead Plastic MSOP –40°C to 125°C Operating Ambient Temperature Range Lead Temperature (Soldering, 10 sec)
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L TC4364CS-1#PBF L TC4364CS-1#TRPBF L TC4364S-1 16-Lead Plastic SO 0°C to 70°C L TC4364IS-1#PBF L TC4364IS-1#TRPBF L TC4364S-1 16-Lead Plastic SO –40°C to 85°C L TC4364HS-1#PBF L TC4364HS-1#TRPBF L TC4364S-1 16-Lead Plastic SO –40°C to 125°C L TC4364CS-2#PBF L TC4364CS-2#TRPBF L TC4364S-2 16-Lead Plastic SO 0°C to 70°C L TC4364IS-2#PBF L TC4364IS-2#TRPBF L TC4364S-2 16-Lead Plastic SO –40°C to 85°C L TC4364HS-2#PBF L TC4364HS-2#TRPBF L TC4364S-2 16-Lead Plastic SO –40°C to 125°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Consult L TC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear .com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V . SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Operating Supply Range l 4 80 V ICC Supply Current VCC = SOURCE = SENSE = OUT = 12V , No Fault l 370 750 µA ICC(SHDN) Supply Current in Shutdown Shutdown l 10 50 μA ICC(REV) Reverse Input Current VCC = −30V l 0 –10 μA Surge Stopper ∆VHGATE HGATE Gate Drive, (VHGATE − VSOURCE) VCC = 4V , DGATE Low, IHGATE = 0µA, −1µA VCC = 8V to 80V , DGATE Low, IHGATE = 0µA, −1µA l l V V IHGATE(UP) HGATE Pull-Up Current VCC = HGATE = DGATE = SOURCE = 12V l –10 –20 –30 µA IHGATE(DN) HGATE Pull-Down Current Overvoltage: FB = 1.5V , ∆VHGATE = 5V l 60 130 mA Overcurrent: ∆VSNS = 100mV , ∆VHGATE = 5V l 60 130 mA Shutdown/Fault Turn-Off: ∆VHGATE = 5V l 0.4 1 mA ISRC SOURCE Input Current VCC = SOURCE = SENSE = OUT = 12V VCC = SOURCE = 12V , Shutdown VSOURCE = –30V l l l –2.0 –3.5 µA µA mA V FB FB Servo Voltage VCC = 12V to 80V l 1.22 1.25 1.28 V IFB FB Input Current FB = 1.25V l 0 1 µA ∆VSNS Overcurrent Fault Threshold, SENSE – VOUT) VCC = 4V to 80V , OUT = 2.5V to VCC, 0°C to 125°C VCC = 4V to 80V , OUT = 2.5V to VCC, –40°C to 125°C VCC = 4V to 80V , OUT = 0V to 1.5V l l l mV mV mV I SNS SENSE Input Current SENSE = VCC = SOURCE = OUT = 12V SENSE = –15V l l 110 µA mA ITMR(UP) TMR Pull-Up Current, Overvoltage TMR = 1V , FB = 1.5V , VCC – OUT = 0.5V TMR = 1V , FB = 1.5V , VCC – OUT = 75V l l –1.3 –40 –2.2 –50 –60 µA µA TMR Pull-Up Current, Overcurrent TMR = 1V , ∆VSNS = 60mV , VCC – OUT = 0.5V TMR = 1V , ∆VSNS = 60mV , VCC – OUT = 75V l l –210 –10 –260 –14 –310 µA µA TMR Pull-Up Current, Warning TMR = 1.3V , FB = 1.5V , VCC – OUT = 0.5V l –3 –5 –7 µA TMR Pull-Up Current, Retry TMR = 1V , FB = 1.5V l –1.3 –2 –3 µA ITMR(DN) TMR Pull-Down Current TMR = 1V , FB = 1.5V , Retry Shutdown l l 1.1 0.3 0.75 2.7 1.5 µA mA V TMR(F) TMR Fault Threshold FLT Falling, VCC = 4V to 80V l 1.22 1.25 1.28 V VTMR(G) TMR Gate Off Threshold HGATE Falling, VCC = 4V to 80V l 1.32 1.35 1.38 V
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V . SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VTMR(R) TMR Retry Threshold HGATE Rising (After 32 Cycles), VCC = 4V to 80V l 0.125 0.15 0.175 V ∆VTMR Early Warning Timer Window VTMR(G) – VTMR(F), VCC = 4V to 80V l 75 100 125 mV VUV UV Input Threshold UV Falling, VCC = 4V to 80V l 1.22 1.25 1.28 V VUV(HYST) UV Input Hysteresis l 25 50 80 mV VUV(RST) UV Reset Threshold UV Falling, VCC = 4V to 80V , L TC4364-1 Only l 0.5 0.6 0.7 V VOV OV Input Threshold OV Rising, VCC = 4V to 80V l 1.22 1.25 1.28 V VOV(HYST) OV Input Hysteresis 12 mV IIN UV , OV Input Current UV , OV = 1.25V UV , OV = –30V l l –0.3 –0.6 µA mA VOL ENOUT , FLT Output Low ISINK = 0.25mA ISINK = 2mA l l 0.1 0.5 0.3 1.3 V V I LEAK ENOUT , FLT Leakage Current ENOUT , FLT = 80V l 0 2.5 µA ∆VOUT(TH) Out High Threshold (VCC – VOUT) ENOUT from Low to High l 0.4 0.7 1 V VOUT(RST) Out Reset Threshold ENOUT from High to Low l 1.4 2.2 3 V IOUT OUT Input Current VCC = OUT = 12V , SHDN Open OUT = –15V l l µA mA Output Current in Shutdown, I SNS + IOUT VCC = SOURCE = SENSE = OUT = 12V , Shutdown l 12 40 µA VSHDN SHDN Input Threshold VCC = 4V to 80V l 0.5 1.6 2.2 V VSHDN(FL T) SHDN Pin Float Voltage VCC = 12V to 80V l 2.3 4 6.5 V ISHDN SHDN Input Current SHDN = 0.5V Maximum Allowable Leakage, V CC = 4V SHDN = –30V l l –1 –3.3 –1.5 –120 –300 µA µA µA D Retry Duty Cycle, Overvoltage Retry Duty Cycle, Output Short FB = 1.5V , V CC = 80V , OUT = 16V ∆VSNS = 60mV , VCC – OUT = 12V l l 0.125 0.075 0.2 0.12 t OFF ,HGATE(UV) Undervoltage to HGATE Low Propagation Delay UV Steps from 1.5V to 1V l 1.3 4 μs tOFF ,HGATE(OV) Overvoltage to HGATE Low Propagation Delay FB Steps from 1V to 1.5V l 0.25 1 μs tOFF ,HGATE(OC) Overcurrent to HGATE Low Propagation Delay SNS Steps from 0mV to 150mV , OUT = 0V l 0.5 2 μs Ideal Diode ΔVDGATE DGATE Gate Drive, (VDGATE − VSOURCE) VCC = 4V , No Fault, IDGATE = 0µA, −1µA VCC = 8V to 80V , No Fault, IDGATE = 0µA, −1µA l l 8.5 V V I DGATE(UP) DGATE Pin Pull-Up Current DGATE = SOURCE = VCC = 12V , ∆VSD = 0.1V l –5 –10 –15 µA IDGATE(DN) DGATE Pin Pull-Down Current ∆VDGATE = 5V , ∆VSD = –0.2V ∆VDGATE = 5V , Shutdown/Fault Turn-Off l l 0.4 130 mA mA ∆VSD Ideal Diode Regulation Voltage, SOURCE − VSENSE) ∆VDGATE = 2.5V , VCC = SOURCE = 12V ∆VDGATE = 2.5V , VCC = SOURCE = 4V l l mV mV t OFF(DGATE) DGATE Turn-Off Propagation Delay ∆VSD Steps from 0.1V to –1V l 0.35 1.5 μs Note 1: Stress beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All Currents into device pins are positive and all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. Note 3: Internal clamps limit the HGATE and DGATE pins to minimum of 10V above the SOURCE pin. Driving these pins to voltages beyond the clamp may damage the device.
TYPICAL PERFORMANCE CHARACTERISTICS ISNS + IOUT in Shutdown vs VCC ICC(SHDN) vs Temperature GATE Pull-Up Current vs VCC ∆VHGATE vs IHGATE ∆VDGATE vs IDGATE ∆VHGATE vs VIN in Figure 1 Supply Current vs VCC ICC(SHDN) vs VCC ∆VDGATE vs VIN in Figure 1 VCC (V) SUPPLY CURRENT (µA) 250 300 350
436412 G01
VCC = SOURCE = SENSE = OUT ICC ISRC ISNS + IOUT VCC (V) ICC(SHDN) (µA) 20 40 60 80
436412 G02
SHDN = 0 OUT = 0 OUT = VCC TEMPERATURE (°C) –50 ICC(SHDN) (µA)
436412 G03
–25 0 50 OUT = 0 OUT = 12V 75 100 125 SHDN = 0 VCC = 12V VCC (V) ISNS + IOUT IN SHUTDOWN (µA) 100 30 50 80
436412 G04
SOURCE = VCC SNS = OUT = 48V SNS = OUT = 24V SNS = OUT = 12V VCC (V) IGATE(UP) (µA) –12 –16 8 12 40 80
436412 G05
–20 –24 6 10 20 60 HGATE DGATE HGATE = DGATE = SOURCE = VCC ∆VSD = 100mV IHGATE (µA) ∆VHGATE (V) –20
436412 G06
–5 –10 –15 VCC = 12V IDGATE (µA) ∆VDGATE (V) –10
436412 G07
–4 –2 –6 –8 VCC = 12V VIN (V) ∆VHGATE (V) 8 12 16 20
436412 G08
2.2k 4.7k 10k R4 IN FIGURE 1 VIN (V) ∆VDGATE (V) 8 12 16 20
436412 G09
2.2k 4.7k 10k R4 IN FIGURE 1
TYPICAL PERFORMANCE CHARACTERISTICS Overcurrent Threshold vs OUT Voltage Overvoltage TMR Current vs V CC – VOUT Overcurrent TMR Current vs V CC – VOUT EN, FLT Output Low vs Current Retry Duty Cycle vs VCC – VOUT (L TC4364-2 Only) HGATE Pull-Down Current vs Temperature DGATE Pull-Down Current vs Temperature Ideal Diode Regulation Voltage vs V CC Ideal Diode Regulation Voltage vs Temperature TEMPERATURE (°C) –50 IHGATE(DN) (mA) 150 175 200 25 75
436412 G10
–25 0 50 100 125 ∆VSNS = 100mV OR FB = 1.5V ∆VHGATE = 5V VCC = 12V TEMPERATURE (°C) –50 IDGATE(DN) (mA) 150 175 200 25 75
436412 G11
–25 0 50 100 125 VSENSE – VSOURCE = 200mV VCC = 12V ∆VDGATE = 5V VOUT (V) ∆VSNS (mV) 1.5 2.5 4.0
436412 G12
VCC – VOUT (V) ITMR(UP) (µA) –10 –20 –30 –40 20 40 60 80
436412 G13
–50 –60 10 30 50 70 OVERVOLTAGE CONDITION OUT = 5V TMR = 1V VCC – VOUT (V) ITMR(UP) (µA) –50 –100 –150 –200 20 40 60 80
436412 G14
–250 –300 10 30 50 70 OVERCURRENT CONDITION OUT = 5V TMR = 1V VCC – VOUT (V) RETRY DUTY CYCLE (%) 0.4 0.6
436412 G15
0.2 20 40 6010 30 50 70 0.8 0.3 0.5 0.1 0.7 OVERVOLTAGE CONDITION OUT = 16V OVERCURRENT CONDITION OUT = 0V CURRENT (mA) VOL (V) 0.25 0.50 0.75 1.00 1.25 1.50 1 2 3 4
436412 G16
VCC = 12V VCC (V) ∆VSD (mV)30
436412 G17
TEMPERATURE (°C) –50 ∆VSD (mV) 0 50 75 100
436412 G18
–25 25 125 VCC = 4V VCC = 12V
DGATE: Diode Controller Gate Drive Output. When the load current creates more than 30mV of drop across the MOSFET , the DGATE pin is pulled high by an internal charge pump current source and clamped to 12V above the SOURCE pin. When the load current is small, the DGATE pin is actively driven to maintain 30mV across the MOSFET . If reverse current develops, a 130mA fast pull-down circuit quickly connects the DGATE pin to the SOURCE pin, turning off the MOSFET . Connect to SOURCE or leave open if unused. ENOUT : Enable Output. An open-drain output that goes high impedance when the voltage at the OUT pin is above CC − 0.7V), indicating the external MOSFETs are fully on. The state of the pin is latched and resets when the OUT pin drops below 2.2V . The internal FET is capable of sinking up to 2mA and can withstand up to 80V . Connect to GND if unused. Exposed Pad (DE Package Only): Exposed pad may be left open or connected to device ground (GND). FB: Voltage Regulator Feedback Input. Connect this pin to the resistive divider connected between the OUT pin and ground. During an overvoltage condition, the HGATE pin is controlled to maintain 1.25V at the FB pin. Connect to GND to disable the overvoltage clamp. FLT: Fault Output. An open-drain output that pulls low after the TMR pin reaches the warning threshold of 1.25V . It indicates the pass device controlled by the HGATE pin is about to turn off because either the supply voltage has stayed at an elevated level for an extended period of time (overvoltage fault) or the device is in an overcurrent con- dition (overcurrent fault). The internal FET is capable of sinking up to 2mA and can withstand up to 80V . Connect to GND if unused. GND: Device Ground. HGATE: Surge Stopper Gate Drive Output. The HGATE pin is pulled up by an internal charge pump current source and clamped to 12V above the SOURCE pin. Both voltage and current amplifiers control the HGATE pin to regulate the output voltage and limit the current through the MOSFET . OUT : Output Voltage Sense Input. This pin senses the voltage at the drain of the external N-channel MOSFET connected to the DGATE pin. The voltage difference between V CC and OUT sets the fault timer current. When this difference drops below 0.7V , the ENOUT pin goes high impedance. OV: Overvoltage Comparator Input. When OV is above its threshold of 1.25V , the fault retry function is inhibited. When OV falls below its threshold, the HGATE pin is al - lowed to turn back on when fault conditions are cleared. At power-up, an OV voltage higher than its threshold blocks turn-on of the external N-channel MOSFET controlled by the HGATE pin (see Applications Information). Connect to GND if unused. SENSE: Current Sense Input. Connect this pin to the input side of the current sense resistor . The current limit circuit controls the HGATE pin to limit the sense voltage between the SENSE and OUT pins to 50mV if OUT is above 2.5V . When OUT drops below 1.5V , the sense voltage is reduced to 25mV for additional protection during an output short. The sense amplifier also starts a current source to charge up the TMR pin. The voltage difference between SENSE and OUT must be limited to less than 30V . Connect to OUT if unused. SHDN: Shutdown Control Input. Pulling the SHDN pin below 0.5V shuts off the L TC4364 and reduces the V CC pin current to 10μA. Pull this pin above 2.2V or disconnect it to allow the internal current source to turn the part back on. When left open, the SHDN voltage is internally clamped to 4V . The leakage current to ground at the pin should be limited to no more than 1μA if no pull-up device is used to turn the part on. The SHDN pin can be pulled up to 100V or below GND by 40V without damage. SOURCE: Common Source Input and Gate Drive Return. Connect this pin directly to the sources of the external back-to-back N-channel MOSFETs. SOURCE is the anode of the ideal diode and the voltage sensed between this pin and the SENSE pin is used to control the source-drain voltage across the N-channel MOSFET (forward voltage of the ideal diode).
TMR: Fault Timer Input. Connect a capacitor between this pin and ground to set the times for fault warning, fault turn-off, and cool down periods. Either voltage regulation or current regulation starts pulling up the TMR pin. The current charging up this pin during the fault conditions increases with the voltage difference between V CC and OUT pins (see Applications Information). When TMR reaches 1.25V , the FLT pin pulls low to indicate the detection of a fault condition. If the condition persists, the pass device controlled by HGATE turns off when TMR reaches the threshold of 1.35V . As soon as the fault condition disap- pears, a cool down interval commences while the TMR pin cycles 32 times between 0.15V and 1.35V with 2μA charge and discharge currents. When TMR crosses 0.15V the 32nd time, the HGATE pin is allowed to pull high turn- ing the pass device back on if the OV pin voltage is below its threshold for the L TC4364-2 version. The HGATE pin latches low after fault time-out for the L TC4364-1. UV: Undervoltage Comparator Input. When the UV pin falls below its 1.25V threshold, the HGATE pin is pulled down with a 1mA current. When the UV pin rises above 1.25V plus the hysteresis, the HGATE pin is pulled up by the internal charge pump. For L TC4364-1, after HGATE is latched off, pulling the UV pin below 0.6V resets the latch and allows HGATE to retry. If unused, connect to the SHDN pin. V CC: Positive Supply Voltage Input. The positive supply input ranges from 4V to 80V for normal operation. It can also be pulled below ground potential by up to 40V during a reverse battery condition, without damaging the part. Shutting down the L TC4364 by pulling the SHDN pin to ground reduces the V CC current to 10μA.
1.35V 0.15V TMR VCC 1.25V 2µA UVIN SHDN OV OC ENOUT SET VCC – 0.7V 2.2V ENOUT RESET 50mV/ 25mV +– 30mV +– 30mV OUT FB 1.25V SHDN UV 1.25V OV CONTROL CIRCUITRY – + – + IAVA – + –+ DAFD 20µA 10µA HGATE OFF DGATE OFF 12V12V HGATE SOURCE DGATE FLT SENSEVCC CHARGE PUMP f = 620kHz ENOUT GND 436412 BD 32x
The L TC4364 is designed to suppress high voltage surges and limit the output voltage to protect load circuitry and ensure normal operation in high availability power systems. It features an overvoltage protection regulator that drives an external N-channel MOSFET (M1) as the pass device and an ideal diode controller that drives a second external N-channel MOSFET (M2) for reverse input protection and output voltage holdup. The L TC4364 operates from a wide range of supply voltage, from 4V to 80V . With a clamp limiting the V CC supply, the input voltage may be higher than 80V . The input supply can also be pulled below ground potential by up to 40V without damaging the L TC4364. The low power supply requirement of 4V allows it to operate even during cold cranking conditions in automotive applications. Normally, the pass device M1 is fully on, supplying current to the load with very little power loss. If the input voltage surges too high, the voltage amplifier (VA) controls the gate of M1 and regulates the voltage at the OUT pin to a level that is set by an external resistive divider from the OUT pin to ground and the internal 1.25V reference. The L TC4364 also detects an overcurrent condition by monitoring the voltage across an external sense resistor placed between the SENSE and OUT pins. An active current limit circuit (IA) controls the gate of M1 to limit the sense voltage to 50mV if OUT is above 2.5V . In the case of a severe output short that brings OUT below 1.5V , the sense voltage is reduced to 25mV to reduce the stress on M1. During an overvoltage or overcurrent event, a current source starts charging up the capacitor connected at the TMR pin to ground. The pull-up current source in overcurrent condition is 5 times of that in overvoltage to accelerate turn-off. When TMR reaches 1.25V , the FLT pin pulls low to warn of impending turn-off. The pass device M1 stays on and the TMR pin is further charged up until it reaches 1.35V , at which point the HGATE pin pulls low and turns off M1. The fault timer allows the load to continue functioning during brief transient events while protecting the MOSFET from being damaged by a long period of input overvoltage, such as load dump in vehicles. The fault timer period decreases with the voltage across the MOSFET , to help keep the MOSFET within its safe operating area (SOA). The L TC4364-1 latches off M1 and keeps FLT low after a fault timeout. The L TC4364-2 allows M1 to turn back on and FLT to go high impedance after a cool down timer cycle, provided the OV pin is below its threshold. After the HGATE pin is latched low following fault, mo - mentarily pulling the SHDN pin below 0.5V resets the fault and allows HGATE to pull high for both L TC4364-1 and L TC4364-2. In addition, momentarily pulling the UV pin below 0.6V allows HGATE to pull high after the cool down timer delay for L TC4364-1, but has no effect on L TC4364-2. The source and drain of MOSFET M2 serve as the anode and cathode of the ideal diode. The L TC4364 controls the DGATE pin to maintain a 30mV forward voltage across the drain and source terminals of M2. It reduces the power dissipation and increases the available supply voltage to the load, as compared to using a discrete blocking diode. If M2 is driven fully on and the load current results in more than 30mV of forward voltage, the forward voltage is equal to R DS(ON) • ILOAD. In the event of an input short or a power supply failure, reverse current temporarily flows through the MOSFET M2 that is on. If the reverse voltage exceeds –30mV , the L TC4364 pulls the DGATE pin low strongly and turns off M2, minimizing the disturbance at the output. If the input supply drops below the GND pin voltage, the DGATE pin is pulled to the SOURCE pin voltage, keeping M2 off. When the HGATE pin pulls low in any fault condi- tion, the DGATE pin also pulls low, so both pass devices are turned off. If the output (and so the SOURCE pin, through the body diode of M2) drops below GND, the HGATE pin is pulled to the SOURCE pin voltage, turning M1 off and shutting down the forward current path. An input undervoltage condition is accurately detected using the UV pin. The HGATE and DGATE pins remain low if UV is below its 1.25V threshold. The SHDN pin not only turns off the pass devices but also shuts down the internal circuitry, reducing the supply current to 10µA.
block reverse current flow in the event the input collapses. protection is shown in Figure 1. of overvoltage, such as during load dump in automobiles. using the SHDN or UV pin (see Resetting Faults). protects against short circuits and excessive load current. below 1.5V for additional protection during an output short. where ILIM is the desired current limit. Figure 1. 4A, 12V Overvoltage Output Regulator with Reverse Current Protection
436412 F01
the SHDN or UV pin (see Resetting Faults). ternal resistive divider connected to the input (Figure 1). until the supply voltage drops below 60V . a long period of time, reducing the stress on the MOSFET . input UV threshold is set by the resistive dividers to 6V . than would a fixed timer current. CC – VOUT in both overvoltage and overcurrent events.
436412 F0210k
Figure 2. External UV and OV Configuration Blocks Start-Up Into
436412 F03
Figure 3. Fault Timer Current of the L TC4364 but is lower than 1.35V , the TMR pin is discharged by 2μA.
overstressing the pass device. pins can all withstand up to –40V with respect to GND. shorting the DGATE pin to the SOURCE pin, keeping M2 off. as the pass devices to conduct the load current (Figure 1). voltage, and the safe operating area, SOA. M2 will be stressed by the voltage held up at the output.
436412 F04
Figure 4. Auto-Retry Cool Down Timer Cycle Following an Overvoltage Fault (L TC4364-2 Only)
energy above a certain voltage. where VIN = Nominal Input Voltage.
436412 F05tr
Figure 5. Prototypical T ransient Waveform Figure 6. Safe Operating Area Required to Survive Prototypical
436412 F06
Then: P2t = ILOAD 2 1 3 tr b− a( ) b + 1 2 τ 2a2Inb a + 3a2 + b2 – 4ab Typically VREG ≈ VIN and τ >> tr simplifying the above to: P2t = 1 2ILOAD
2 VPK − VREG( )
2 τ For the transient conditions of VPK = 80V , VIN = 12V , VREG = 16V , tr = 10μs and τ = 1ms, and a load current of 3A, P2t is 18.4W2s—easily handled by a MOSFET in a D-pak package. The P2t of other transient waveshapes is evalu- ated by integrating the square of MOSFET power versus time. L TSpice™ can be used to simulate timer behavior for more complex transients and cases where overvoltage and overcurrent faults coexist. Short-Circuit Stress SOA stress of M1 must also be calculated for output short- circuit conditions. Short-circuit P 2t is given by: P2t = VIN •∆VSNS RSNS
- tOC where ∆VSNS is the overcurrent fault threshold and tOC is the overcurrent timer interval. For VIN = 15V , OUT = 0V , ∆VSNS = 25mV , RSNS = 12mΩ and CTMR = 100nF , P2t is 2.2W2s—less than the transient SOA calculated in the previous example. Nevertheless, to account for circuit tolerances this figure should be doubled to 4.4W 2s. Limiting Inrush Current and HGATE Pin Compensation The L TC4364 limits the inrush current to any load capaci- tance by controlling the HGATE pin voltage slew rate. An external capacitor , CHG, can be connected from HGATE to ground to slow down the inrush current further at the expense of slower turn-off time. The gate capacitor is set at: CHG = IHGATE(UP) IINRUSH
- CL where IHGATE(UP) is the HGATE pin pull-up current, IINRUSH is the desired inrush current, CL is total load capacitance at the output. In typical applications, a C HG of 6.8nF is recommended for loop compensation during overvoltage and overcurrent events. With input voltage steps faster than 5V/μs, a larger gate capacitor helps prevent self enhancement of the N-channel MOSFET . The added gate capacitor slows down the turn-off time during fault conditions and allows higher peak currents to build up during an output short event. If this is a concern, an extra resistor , R6, in series with C HG can restore the turn-off time. A diode, D5, should be placed across R6 with the cathode connected to C HG as shown in Figure 1. In a fast transient input step, D5 provides a bypass path to C HG for the benefit of holding HGATE low and preventing self enhancement. Shutdown The L TC4364 can be shut down to a low current mode by pulling SHDN below 0.5V . The quiescent VCC current drops to 10μA for both the L TC4364-1 and the L TC4364-2. The SHDN pin can be pulled up to 100V or below GND by up to 40V without damage. Leaving the pin open allows an internal current source to pull it up to about 4V and turn the part on. The leakage current at the pin should be limited to no more than 1μA if no pull-up device is used to help turn it on. Supply T ransient Protection The L TC4364 is tested to operate to 80V and guaranteed to be safe from damage between 100V and −40V . Voltage transients above 100V or below −40V may cause permanent damage. During a short-circuit condition, the large change in current flowing through power supply traces coupled with parasitic inductances from associated wiring can cause destructive voltage transients in both positive and negative directions at the V CC, SOURCE, and OUT pins. To reduce the voltage transients, minimize the power trace parasitic inductance by using short, wide traces. A small RC filter (R4 and C1 in Figure 1) at the V CC pin filters high voltage spikes of short pulse width. APPLICATIONS INFORMATION
1V to the minimum operating voltage. input short, protecting the OUT and SENSE pins. of overvoltage early warning (Figure 1). at 6V; the maximum supply current for L TC4364 is 750μA. Select 2.2k for R4 to accommodate all conditions. rating of 200W at 10/1000μs.
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Figure 7. Buffering VCC to Extend Input Supply Range
Choosing 250μA for the resistive divider: R8 = 1.25V 250µA = 5k Select 4.99k for R8. 1.25V = 102.8k The closest standard value for R7 is 102k. Now, calculate the sense resistor , RSNS, value: RSNS = ∆VSNS(MIN) ILIM = 45mV 4A = 11 mΩ Choose 10mΩ for RSNS. CTMR is then chosen for 1ms of early warning time: CTMR = 1 ms•5µA 100mV = 50nF The closest standard value for CTMR is 47nF . Finally, calculate R1, R2 and R3 for 6V low battery detec- tion and 60V input overvoltage level: R1+ R2+ R3 = 1.25V R2+ R3 60V R1+ R2+ R3 = 1.25V Simplify the equations and choose 10k for R3 to get: R2= 60V 6V –1 •R3= 9 •R3= 90k R1= 6V 1.25V –1 Select 90.9kΩ for R2 and 383kΩ for R1. The pass device, M1, should be chosen to withstand an output short condition with V CC = 14V . In the case of a severe output short where VOUT = 0V , ITMR(UP) = 55μA and the total overcurrent fault time is: tOC = CTMR •VTMR(G) ITRM(UP) = 47nF •1.35V 55µA = 1.15ms The maximum power dissipation in M1 is: P = ∆VDS(M1) •∆VSNS(MAX) RSNS = 14V •32mV 10mΩ = 45W The corresponding P2t is 2.3W2s. During an output overload or soft short, the voltage at the OUT pin could stay at 2V or higher . The total overcurrent fault time when V OUT = 2V is: tOC = 47nF •1.35V 49µA = 1.3ms The maximum power dissipation in M1 is: P = 14V – 2V( ) •55mV 10mΩ = 66W The corresponding P2t is 5.7W2s. Both of the above condi- tions are well within the safe operating area of FDB33N25. To select the pass device, M2, first calculate R DS(ON) to achieve the desired forward drop V FW at maximum load current (5.5A). If VFW = 0.25V: RDS(ON) ≤ VFW ILOAD(MAX) = 0.25V 5.5A = 45.5mΩ The FDB3682 offers a maximum R DS(ON) of 36mΩ at VGS = 10V so is a good fit. Its minimum BV DSS of 100V is also sufficient to handle V OUT transients up to 100V during an input short-circuit event. Layout Considerations To achieve accurate current sensing, use Kelvin connections to the current sense resistor , RSNS. Limit the resistance from the SOURCE pin to the sources of the MOSFETs to below 10Ω. The minimum trace width for 1oz copper foil is 0.02" per amp to ensure the trace stays at a reason - able temperature. Note that 1oz copper exhibits a sheet resistance of about 530μΩ/square. Small resistances can cause large errors in high current applications. Noise im- munity will be improved significantly by locating resistive dividers close to the pins with short V CC and GND traces. APPLICATIONS INFORMATION
Figure 8. 2A Wide Range Hot Swap Controller with Circuit Breaker Figure 9. 28V Hot Swap with Overvoltage Output Regulation at 27V , Circuit Breaker , and Reverse Current Protection Figure 10. 48V Hot Swap with Overvoltage Output Regulation at 72V , Circuit Breaker , and Reverse Current Protection
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Figure 11. Redundant Supply Diode-OR with Overvoltage Surge Protection Figure 12. High Side Switch with Ideal Diode for Load Protection
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Figure 13. Overvoltage Regulator with Output Keep Alive During Shutdown Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings.
- DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
- ALL DIMENSIONS ARE IN MILLIMETERS
- DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
- EXPOSED PAD SHALL BE SOLDER PLATED
- SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
3.00 REF
0.200 REF
0.50 BSC
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(Reference L TC DWG # 05-08-1669 Rev Ø) MSOP (MS16) 1107 REV Ø 0.53 ± 0.152 (.021 ± .006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 16151413121110 1 2 3 4 5 6 7 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.889 ± 0.127 (.035 ± .005) RECOMMENDED SOLDER PAD LAYOUT 0.305 ± 0.038 (.0120 ± .0015) TYP 0.50 (.0197) BSC 4.039 ± 0.102 (.159 ± .004) (NOTE 3) 0.1016 ± 0.0508 (.004 ± .002) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 0.280 ± 0.076 (.011 ± .003) REF 4.90 ± 0.152 (.193 ± .006) PACKAGE DESCRIPTION Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings. .016 – .050 (0.406 – 1.270) .010 – .020 0° – 8° TYP .008 – .010 (0.203 – 0.254) N 2 3 4 5 6 7 8 N/2 .150 – .157 (3.810 – 3.988) NOTE 3 16 15 14 13 .386 – .394 (9.804 – 10.008) NOTE 3 .228 – .244 (5.791 – 6.197) 12 11 10 9 S16 REV G 0212 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .245 MIN N 1 2 3 N/2 .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G)
Figure 14. 0.25A, 12V Surge Stopper with Output Port Protection