LT3748 LINER
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Technical content
Features
applications
Description
The L T®3748 is a switching regulator controller specifically designed for the isolated flyback topology and capable of high power . It drives a low side external N-channel power MOSFET from an internally regulated 7V supply. No third winding or opto-isolator is required for regulation as the part senses the isolated output voltage directly from the primary-side flyback waveform. The L T3748 utilizes boundary mode to provide a small magnetic solution without compromising load regulation. Operating frequency is set by load current and transformer magnetizing inductance. The gate drive of the L T3748 combined with a suitable external MOSFET allow it to deliver load power up to several tens of watts from input voltages as high as 100V . The L T3748 is available in a high voltage 16-lead MSOP package with four leads removed. 25W , 12V Output, Isolated Telecom Supply n 5V to 100V Input Voltage Range n 1.9A Average Gate Drive Source and Sink Current n Boundary Mode Operation n No T ransformer Third Winding or Opto-Isolator Required for Regulation n Primary-Side Winding Feedback Load Regulation n VOUT Set with T wo External Resistors n INTVCC Pin for Control of Gate Driver Voltage n Programmable Soft Start n Programmable Undervoltage Lockout n Available in MSOP Package n Isolated Telecom Converters n High Power Automotive Supplies n Isolated Industrial Power Supplies Output Load and Line Regulation typical application L, L T , L TC, L TM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5438499 and 7471522. EN/UVLO TC SS RFB RREF VC GND INTV CC L T3748 3748 TA01a56.2k 2nF VIN 36V TO 72V VOUT+ 12V VOUT– VIN 4:1 412k 15.4k 10µF 3.8µH60.8µH 100µF GATE SENSE 4700pF 4.7µF 6.04k 243k 0.033/uni03A9 10k LOAD CURRENT (A)
11.4 VOUT (V)
11.6 11.8 12.0 12.2 14.4 12.6 0.5 1.0 1.5 2.0
3748 TA01b
VIN = 72V VIN = 48V VIN = 36V
Operating Junction Temperature Range orDer inForMation electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 10V , unless otherwise noted. LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L T3748EMS#PBF L T3748EMS#TRPBF 3748 16-Lead Plastic MSOP –40°C to 125°C L T3748IMS#PBF L T3748IMS#TRPBF 3748 16-Lead Plastic MSOP –40°C to 125°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear .com/tapeandreel/ PARAMETER CONDITIONS MIN TYP MAX UNITS Input Voltage Range l 5 100 V Quiescent Current Not Switching V EN/UVLO = 0.2V 1.3 1.75 mA µA VIN Quiescent Current, INTVCC Overdriven V INTVCC = 10V 300 450 µA INTVCC Voltage Range l 4.5 20 V INTVCC Pin Regulation Voltage 6.8 7 7.2 V INTVCC Dropout (VIN – VINTVCC), IINTVCC = 10mA, VIN = 5V 0.7 V INTVCC Undervoltage Lockout Falling Threshold l 3.45 3.6 3.75 V EN/UVLO Pin Threshold EN/UVLO Pin Voltage Rising l 1.19 1.223 1.25 V EN/UVLO Pin Hysteresis Current EN/UVLO = 1V 1.9 2.4 2.9 µA Soft-Start Current VSS = 0.4V (Note 3) 5 µA Soft-Start Threshold 0.65 V Soft-Start Reset Current 3 mA Maximum SENSE Current Limit Threshold V C = 2.2V l 100 100 105 110 mV mV Minimum SENSE Current Limit Threshold V C = 0V 15 mV Maximum to Minimum SENSE Threshold Ratio l 5.2 6.6 8.2 mV/mV (Note 1) pin conFiguration V IN EN/UVLO INTVCC GATE SENSE GND R FB RREF TC V C SS GND TOP VIEW MS PACKAGE 16 (12)-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 90°C/W
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L T3748E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The L T3748I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 3: Current flows out of the pin. PARAMETER CONDITIONS MIN TYP MAX UNITS SENSE Overcurrent Threshold VC = 2.2V 115 130 145 mV SENSE Input Bias Current VSENSE = 10mV (Note 3) 10 15 20 µA RREF Voltage VC = 1.1V l 1.20 1.195 1.223 1.24 1.245 V V RREF Voltage Line Regulation 5V < VIN < 100V 0.005 0.025 %/V RREF Pin Bias Current (Note 3) l 35 500 nA TC Current into RREF RTC = 20k 27.5 µA Error Amplifier Voltage Gain 115 V/V Error Amplifier T ransconductance ∆I = 10µA 155 µmhos VC Source Current VC = 1.1V , VRREF = 0.5V –45 µA VC Sink Current VC = 1.1V , VRREF = 2V 48 µA Flyback Comparator T rip Current Current into R FB Pin, RREF = 6.04k 10 µA Minimum GATE Off-Time 700 ns Minimum GATE On-Time 250 ns Maximum Discontinuous Off-Time V C = 0V 24 µs Maximum GATE Off-Time VRREF = 0.5V 55 µs Maximum GATE On-Time VSENSE = 0V 55 µs GATE Output Rise Time CL = 3300pF , 10% to 90% 16 ns GATE Output Fall Time CL = 3300pF , 10% to 90% 16 ns GATE Output Low (VOL) 0.05 V GATE Output High (VOH) VINTVCC – 0.05 V electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 10V , unless otherwise noted.
typical perForMance characteristics INTVCC Undervoltage Lockout vs TemperatureINTVCC Voltage vs VIN Voltage INTVCC Regulator Dropout vs INTVCC Current Soft-Start Current vs Temperature Output Regulation vs Temperature Quiescent Current vs Temperature INTVCC Voltage vs Temperature TA = 25°C, unless otherwise noted. Quiescent Current vs VIN Voltage INTVCC Dropout vs Temperature TEMPERATURE (oC) –50
14.4 VOUT (V)
14.6 14.8 15.0 15.2 0 50 100 150
3748 G01
15.4 15.6 –25 25 75 125 FIGURE 15 CIRCUIT IOUT = 150mA ON EACH OUTPUT VIN = 12V TEMPERATURE (°C) –50 QUIESCENT CURRENT (mA) 1.3 1.4 1.5 150
3748 G02
1.2 1.1 0.8 0 50 100–25 25 75 125 1.0 0.9 1.7 1.6 VSS = 0V INTVCC = OPEN VIN = 72V VIN = 36V VIN = 12V VIN = 6V VIN (V) QUIESCENT CURRENT (mA) 0.6 0.8 1.0 60 100
3748 G03
0.4 0.2 20 40 80 1.2 1.4
1.6 VSS = 0V
INTVCC = OPEN TEMPERATURE (°C) –50 6.5 INTVCC VOLTAGE (V) 6.6 6.8 6.9 7.0 7.5 7.2 0 50 75
3748 G04
6.7 7.3 7.4 7.1 –25 25 100 125 150 IINTVCC = 0mA IINTVCC = 10mA VIN VOLTAGE (V) 4 6 VINTVCC (V)6.0 6.5 7.0
3748 G05
5.5 5.0 8 20 8010 40 100 4.5 4.0 7.5 IINTVCC = 0mA IINTVCC = 10mA TEMPERATURE (°C) –50 INTVCC UVLO (V) 3.7 3.8 3.9 25 50 75 100 125
3748 G06
3.6 3.5 –25 0 150 3.4 3.3 4.0 RISING THRESHOLD FALLING THRESHOLD INTVCC CURRENT (mA) INTVCC REGULATOR DROPOUT (V) 0.5 1.0 1.5 2.0 2.5 3.0 VIN = 5V 10 20 30 40
3748 G07
150°C 100°C 25°C –50°C TEMPERATURE (oC) –50 INTVCC DROPOUT (V) 0.5 1.0 1.5 2.0 0 50 100 150
3748 G08
2.5 3.0 –25 25 75 125 VIN = 5V IINTVCC = 20mA IINTVCC = 10mA IINTVCC = 5mA TEMPERATURE (oC) –50 SOFT-START CURRENT (µA) 0 50 100 150
3748 G09
–25 25 75 125
typical perForMance characteristics Error Amplifier T ransconductance vs Temperature Error Amplifier Output Current vs R REF Pin Voltage SENSE Pin Threshold vs Temperature EN/UVLO Current vs Temperature EN/UVLO Threshold vs Temperature TC Pin Voltage vs Temperature T A = 25°C, unless otherwise noted. Maximum Discontinuous Off-Time vs Temperature GATE Rise and Fall Time vs Charge GATE Rise and Fall Time vs INTV CC Voltage TEMPERATURE (°C) –50 EN/UVLO CURRENT (µA) 0.5 1.0 1.5 2.0 0 50 100 150
3748 G10
2.5 3.0 –25 25 75 125 VEN/UVLO = 1.1V VEN/UVLO = 0.9V VEN/UVLO = 1.3V TEMPERATURE (°C) –50 EN/UVLO THRESHOLD (V) 1.20 1.30 150
3748 G11
1.10 1.00 0 50 100–25 25 75 125 1.40 1.15 1.25 1.05 1.35 TEMPERATURE (°C) –50 TC VOLTAGE (V) 0.5 0.6 0.7 150
3748 G12
0.4 0.3 0 50 100–25 25 75 125 0.2 0.1 0.9 0.8 TEMPERATURE (°C) –50
100 TRANSCONDUCTANCE (µmhos)
3748 G13
–25 25 100 125 150 VIN = 100V VIN = 6V VREF (V) IVC (µA)0 2.0
3748 G14
–20 –40 –10 –30 –50 –60 0.5 1.0 1.5 2.5 150°C 100°C 25°C –50°C TEMPERATURE (°C) –50 SENSE THRESHOLD (mV) 120 150
3748 G15
0 50 100–25 25 75 125 160 100
140 OVERCURRENT
VC = 2.2V VC = 0.2V TEMPERATURE (°C) –50 MAXIMUM DISCONTINUOUS OFF-TIME (µs) 0 50 75
3748 G16
–25 25 100 125 150 TOTAL GATE CHARGE (nC) GATE RISE AND FALL TIME (ns) AVERAGE GATE SOURCE, SINK CURRENT (A) 20 40 60 80
3748 G17
0.5 1.0 1.5 2.0 RISE TIME FALL TIME Q = C • V VINTVCC = 7V tr, tf 10% TO 90% AVERAGE CURRENT VINTVCC (V) GATE RISE AND FALL TIME (ns)
3748 G18
CGATE = 3.3nF tr, tf 10% TO 90%
VIN (Pin 1) Input Voltage. This pin supplies current to the internal start-up circuitry and is the reference voltage for the feedback circuitry connected to the RFB pin. This pin must be locally bypassed with a capacitor . EN/UVLO (Pin 3): Enable/Undervoltage Lockout. A resistor divider connected to VIN is tied to this pin to program the minimum input voltage at which the L T3748 will operate. At a voltage below ~0.5V , the part draws less than 1µA quiescent current. When below 1.223V but above ~0.5V , the part will draw quiescent current but will not regulate the INTV CC supply or power the gate drive circuitry. Above 1.223V , all internal circuitry will start and the SS pin will source 5μA. When EN/UVLO falls below 1.223V , 2.4μA is sunk from the pin to provide programmable hysteresis for undervoltage lockout. INTV CC (Pin 5): Gate Driver Bias Voltage. This pin supplies current to the internal gate driver circuitry of the L T3748. The INTVCC pin must be locally bypassed with a capacitor . This pin may also be connected to V IN if a third winding is not used and if VIN ≤ 20V . If a third winding is used, the INTVCC voltage should be lower than the input voltage for proper operation. GATE (Pin 6): N-Channel MOSFET Gate Driver Output. Switches between INTVCC and GND. SENSE (Pin 7): The Current Sense Input for the Control Loop. Kelvin connect this pin to the positive terminal of the switch current sense resistor , RSENSE, in the source of the N-channel MOSFET . The negative terminal of the current sense resistor should be connected to the GND plane close to the IC. GND (Pins 8, 9): Ground. SS (Pin 10): Soft-Start Pin. This pin delays start-up and clamps V C pin voltage. Soft-start timing is set by the size of the external capacitor at the pin. Switching starts when V SS reaches ~0.65V . VC (Pin 11): Compensation Pin for the Internal Error Amplifier . Connect a series RC from this pin to ground to compensate the switching regulator . A 100pF capacitor in parallel helps eliminate noise. TC (Pin 12): Output Voltage Temperature Compensation. Connect a resistor to ground to produce a current pro- portional to absolute temperature to be sourced into the RREF node. I TC = 0.55V/RTC. RREF (Pin 14): Input Pin for the External Ground-Referred Reference Resistor . The resistor at this pin should be 6.04k, but for convenience in selecting a resistor divider ratio, the value may range from 5.76k to 6.34k. The resistor should be as close to the L T3748 as possible. R FB (Pin 16): Input Pin for the External Feedback Resistor . This pin is connected to the transformer primary at the external MOSFET power switch. The ratio of this resistor to the R REF resistor , times the internal bandgap reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). The average current through this resistor during the flyback period should be approximately 200μA. The resistor should be as close to the L T3748 as possible.
VOUT– VIN TC SS VIN SENSE VC NPS:1 5µA 20µA COUT DOUT CIN LPRI LSEC RFB RREF RSENSE RC CC INTERNAL REFERENCE AND REGULATORS CURRENT LIMIT 50µs MAX ON TIMER 50µs MAX OFF TIMER TC CURRENT R QS R S ERROR AMP 100mV +– – 2.4µA GND 8, 9 3748 BD Q2Q1 1.223V 1.223V 1.223V EN/UVLO RFB RREF GATE NMOS gm 6.04k 161
The L T3748 is a current mode switching regulator con- troller designed specifically for the isolated flyback topol- ogy. The special problem normally encountered in such circuits is that information relating to the output voltage on the isolated secondary side of the transformer must be communicated to the primary side in order to maintain regulation. Historically, this has been done with opto- isolators or extra transformer windings. Opto-isolator circuits waste output power and the extra components increase the cost and physical size of the power supply. Opto-isolators can also exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation and aging over life. Circuits employing extra transformer windings also exhibit deficiencies. Using an extra wind- ing adds to the transformer’s physical size and cost, and dynamic response is often mediocre. The L T3748 derives its information about the isolated output voltage by examining the primary-side flyback pulse waveform. In this manner , no opto-isolator nor extra transformer winding is required for regulation. The output voltage is easily programmed with two resistors. The L T3748 features a boundary mode control method, (also called critical conduction mode) where the part operates at the boundary between continuous conduc- tion mode and discontinuous conduction mode. Due to the boundary control mode operation, the output voltage can be calculated from the transformer primary voltage when the secondary current is almost zero. This method improves load regulation without external resistors and capacitors. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional switching regulators, including current comparators, inter- na l reference and regulators, logic, timers and an N-channel MOSFET gate driver . The novel sections include a special sampling error amplifier and a temperature compensation circuit. Boundary Mode Operation Boundary mode is a variable frequency, current mode switching scheme. The external N-channel MOSFET turns on and the inductor current increases until it reaches the V C pin-controlled current limit. After the external MOSFET is turned off, the voltage on the drain of the MOSFET rises to the output voltage multiplied by the primary-to-secondary transformer turns ratio plus the input voltage. When the secondary current through the output diode falls to zero, the voltage on the drain of the MOSFET falls below V IN. A boundary mode detection comparator detects this event and turns the external MOSFET back on. Boundary mode returns the secondary current to zero every cycle, so the parasitic resistive voltage drops do not cause load regulation errors. Boundary mode also allows the use of a smaller transformer compared to continu- ous conduction mode and does not exhibit subharmonic oscillation. At low output currents the L T3748 delays turning on the external MOSFET and thus operates in discontinuous mode. Unlike traditional flyback converters, the external MOSFET has to turn on to update the output voltage information. Below 0.6V on the V C pin, the current comparator level decreases to its minimum value and a variable delay timer waits to reset before turning on the external MOSFET . With the addition of delay before turning the MOSFET back on, the part starts to operate in discontinuous mode. The average output current is able to decrease while still allow- ing a minimum off-time for the error amplifier sampling circuitry. The typical maximum discontinuous off-time with V C equal to 0V is 24µs.
Pseudo-DC Theory of Operation The RREF and RFB resistors as depicted in the Block Diagram are external resistors used to program the output voltage. The L T3748 operates much the same way as traditional current mode switchers with the exception of the unique error amplifier which derives its feedback information from the flyback pulse. Operation is as follows: when the NMOS output switch turns off, its drain voltage rises above V IN. The amplitude of this flyback pulse (i.e., the difference between it and V IN) is given as: VFLBK = (VOUT + VF + ISEC • ESR) • NPS VF = DOUT forward voltage ISEC = T ransformer secondary current ESR = Total impedance of secondary circuit NPS = T ransformer effective primary-to-secondary turns ratio The flyback voltage is converted to a current by R FB and Q2. Nearly all of this current flows through resistor RREF to form a ground-referred voltage. This voltage is fed into the flyback error amplifier . The flyback error amplifier samples this output voltage information when the secondary-side winding current reaches zero. The error amplifier uses a bandgap voltage, 1.223V , as the reference voltage. The relatively high gain in the overall loop will then cause the voltage at the R REF resistor to be nearly equal to the bandgap reference voltage, VBG. The relationship between VFLBK and VBG may then be expressed as: V R V R or V V R R FLBK FB BG REF FLBK BG FB REF = = VBG = Internal bandgap reference Combining with the previous VFLBK expression yields an expression for V OUT, in terms of the internal reference, programming resistors, transformer turns ratio and diode forward voltage drop: V V R R N V I ESROUT BG FB REF PS F SEC= − −1 ( ) Additionally, it includes the effect of nonzero secondary output impedance (ESR). This term can be assumed to be zero in boundary control mode. Temperature Compensation The first term in the V OUT equation does not have a tem- perature dependence, but the diode forward drop, VF , has a significant negative temperature coefficient. To compensate for this, a positive temperature coefficient current source is internally connected to the R REF pin. The current is set by resistor RTC to ground connected between the TC pin and ground. To cancel the temperature coefficient, the following equation is used: d d d d d V T R R N V T or R R N V F FB TC PS TC TC FB PS = − = −
- • , F F TC FB PST V T R N/ •d d d ≈ (dVF/dT) = Diode’s forward voltage temperature coef- ficient (dVTC/dT) = 1.85mV/°C VTC = 0.55V The resistor value given by this equation should also be verified experimentally and adjusted, if necessary, to achieve optimal regulation over temperature. The revised output voltage is as follows: V V R R N V V R OUT BG FB REF PS F TC TC = − −
- • – ( )R N I ESRFB PS SEC applications inForMation
Selecting Actual RREF , RFB and RTC Resistor Values The preceding equations define how the L T3748 would regulate the output voltage if the system had no time de- lays and no error sources. However , there are a number of repeatable delays and parasitics in each application which will affect the output voltage and force a re-evaluation of the R FB and RTC component values. The following approach is the best method for selecting the correct values. The expression for VOUT, developed in the Operation sec- tion, can be rearranged to yield the following expression for RFB: R R N V V V VFB REF PS OUT F TC BG = +( ) + •where: VOUT = Output voltage VF = Output diode forward voltage NPS = Effective primary-to-secondary turns ratio VTC = 0.55V The equation assumes the temperature coefficients of the output diode and VTC are equal and substitutes RFB/NPS for the value of RTC. This is a good first order approximation but will be revisited later . First, the value of R REF should be approximately 6.04k since the L T3748 is trimmed and specified using this value. If the impedance of RREF varies considerably from 6.04k, additional errors will result. However , a variation in R REF of several percent is acceptable. This yields a bit of freedom in selecting standard 1% resistor values to yield nominal R FB/RREF ratios. With starting values for R FB and RTC, an initial iteration of the application should be built with final selections of all external components (transformer , diode, MOSFET , etc.). The resulting V OUT should be measured and used to re-evaluate the value of RFB due to non-idealities in the sampling system: R V V RFB NEW OUT DESIRED OUT MEASURED FB OLD( ) ( ) ( ) ( )•= With a new value of R FB selected, the temperature co- efficient of the output diode in the application can be tested to verify the nominal R TC value. The R TC resistor should be removed from the circuit under test (this will cause V OUT to increase for this step) and V OUT should be measured over temperature at a desired target output load. It is very important for this evaluation that uniform temperature be applied to both the output diode and the L T3748—if freeze spray or a heat gun is used there can be a significant mismatch in temperature between the two devices that causes significant error . Attempting to extrapolate the data from a diode datasheet or assuming the nominal R TC value may yield a better result if there is no method to apply uniform heat or cooling such as an oven. With at least two data points (although more data points from hot to cold are recommended), the change in V/°C can be determined by: V TEMP V V TEMP TEMP OUT OUT OUT= 1 2 1 2 Using the measured VOUT temperature coefficient, an exact RTC value can be selected using the following equation: R R N mV C V TEMP TC FB PS OUT = °• . / 1 85 If the value of R TC has changed significantly, which can happen with the use of some output diodes that have a very low forward drop, the R FB value may need to be changed to restore V OUT to the desired value. As in the previous iteration, after measuring V OUT , a new RFB can once again be selected using: R V V RFB NEW OUT DESIRED OUT MEASURED FB OLD( ) ( ) ( ) ( )•= Once the values of RFB and RTC are selected, the regulation accuracy from board to board for a given application will be very consistent, typically under ±5% when including device variation of all the components in the system (assuming resistor tolerances and transformer windings matching of 1% or better). However , if the transformer , the output diode or MOSFET switch are changed or the layout is dramatically altered, there may be some change in V OUT .
GATE node high for shorter than approximately 250ns. the current control loop will lose its ability to regulate. current limitations and thermal limitations. and the use of any additional snubbing components.
3748 F01
Figure 1. Maximum Output Power at 12VOUT with a
shown in Figure 2, until parasitic losses begin to dominate. transferred through the saturated core, leading to heating. all thermal limitations outside of the L T3748. information should be carefully considered. shows the details of several of these transformers.
3748 F02
Figure 2. Maximum Output Power at 12VOUT
Table 1. Pre-Designed T ransformers—Typical Specifications Unless Otherwise Noted *2.5k isolation, others are rated for 1.5kV isolation. †TARGET APPLICATION, NOT GUARANTEED. setting total turns and mutual inductance. decreasing turns ratio can deliver more power . There are two significant constraints on the turns ratio.
some amount of overshoot caused by leakage inductance.
- • –= ( ) ( ) 2 1 For a more general analysis, Figure 5 illustrates a sweep of windings ratio on the x-axis while comparing output power and estimated efficiency for a 5V output using a 48V input. If the desired application required 20W , the maximum power curve indicates that a winding ratio of 12:1 would be sufficient at a current limit of 2A (R SENSE = 0.05Ω), while a winding ratio of 5:1 would deliver the same power at 3A. However , when examining the corresponding efficiency at max load for those two windings ratios and current limits, the 5:1, 3A selection is clearly the superior solution with an estimated efficiency of 85% compared to 78% for the 12:1, 2A application. There are several caveats to this evaluation. First, as the diode forward voltage becomes a smaller percentage of total loss at higher output voltages (>12V) the RMS current becomes less of a concern and minimizing it will have a much smaller impact on efficiency. More significantly, if a lower turns ratio forces the use of a diode with a larger forward drop to obtain a higher reverse voltage rating, any gains from minimizing current might be lost. For low output voltages (3.3V or 5V) or high input voltages (>48V), a turns ratio greater than one can be used with multiple primary windings relative to the secondary to maximize the transformer’s current gain. INPUT VOL TAGE (V) OUTPUT POWER (W)
3748 F03
3748 F05
Figure 3. Maximum Output Power at 12V Out Using Three Figure 4. Sources of Loss In 5V , 2A Out Typical Application Figure 5. Estimated Efficiency and Output Power at 5V
inductance should be minimized. little margin for leakage inductance spiking. waveforms are shown in Figure 6.
3748 F06
Figure 6. Observed Waveforms at MOSFET Drain when
spike if it is desirable to use a lower reverse voltage diode. 0.5A output typical application, Figure 17. DS(MAX) rating of the Si7464DP MOSFET . Figure 7. RCD Clamp Figure 8. Waveform of MOSFET Drain During Normal Operation
3748 F07
Figure 9. Waveform of MOSFET Drain During Normal Operation
3748 F08
variations), this can be accommodated by adjusting the RFB/RREF resistor ratio. Winding Resistance Effects Resistance in either the primary or secondary will reduce overall efficiency (POUT/PIN). Good output voltage regula- tion will be maintained independent of winding resistance due to the boundary mode operation of the L T3748. Bifilar Winding A bifilar , or similar winding technique, is a good way to minimize troublesome leakage inductances. However , re- member that this will also increase primary-to-secondary capacitance and limit the primary-to-secondary breakdown voltage, so, bifilar winding is not always practical. The Linear Technology Applications group is available and extremely qualified to assist in the selection and/or design of the transformer. Selecting a Current Sense Resistor The external current sense resistor allows the user to optimize the current limit behavior for the particular ap- plication under consideration. As the current sense resistor is varied from several ohms down to tens of milliohms, peak switch current goes from a fraction of an ampere to tens of amperes. Care must be taken to ensure proper circuit operation, especially with small current sense resistor values. For example, a peak MOSFET switch current of 4A requires a sense resistor of 0.025Ω. Note that the instantaneous peak power in the sense resistor is 1W , and it must be rated accordingly. The L T3748 has only a single sense line to this resistor . Therefore, any parasitic resistance in the ground side connection of the sense resistor will increase its apparent value. In the case of a 0.025Ω sense resistor , 1mΩ of parasitic resistance will cause a 4% reduction in peak switch current. Therefore, resistance of printed circuit copper traces and vias cannot necessarily be ignored. Another issue for proper operation of the current sense circuitry is avoiding prematurely tripping the SENSE threshold while slewing the MOSFET drain when the GATE pin goes high. The L T3748 does not begin to compare the SENSE pin voltage with the target threshold until the GATE pin is near its final value, or until at least 150ns has passed, whichever occurs more slowly. This should be entirely sufficient for most applications but premature tripping of the SENSE comparator may occur in cases where a MOSFET with very high Q G is used with a series resistor at the GATE pin. Output Short Circuits and SENSE Pin Over Current The L T3748 has an internal threshold to detect when primary inductor current exceeds the programmed range. This can result from an inductive output short-circuit and an output voltage below zero, reflecting a voltage back to the primary side of the transformer which, in turn, causes the L T3748 to turn the external MOSFET on before the secondary current has discharged. When the voltage at the SENSE pin exceeds approximately 130mV—equivalent to 30% higher than the programmed I LIM(MAX) in the RSENSE resistor—the SS pin will be reset, stopping switching. Once the soft-start capacitor is recharged and the soft- start threshold is reached, switching will resume at the minimum current limit. High Drain Capacitance and Low Current Operation When designing applications with some combination of a low current limit (I LIM < 1A), a high secondary-to-primary turns ratio (NPS << 1), multiple output windings, or very capacitive output diodes, it is important to minimize the capacitance reflected onto the primary winding and on the drain of the external MOSFET . After the MOSFET turns off during each switching cycle, the primary current charges that capacitance to slew the MOSFET drain until the second- ary begins to deliver power , and if the drain node does not slew and remain above V IN within approximately 200ns once the GATE pin goes low and the MOSFET turns off, the L T3748 may detect that the current in the secondary is zero and turn the MOSFET back on prematurely, caus- ing the L T3748 to switch continuously while delivering very little power to the output. The result will be droop of the output voltage at lighter loads and oscillation at the V C node. This problem can be prevented by maximizing NPS (minimizing ratio of secondary windings to primary windings), increasing the peak drain current (minimizing R SENSE), and minimizing the output diode and transformer capacitance.
The L T3748 contains an optional soft-start function that is enabled by connecting an explicit external capacitor between the SS pin and ground. Internal circuitry prevents the control voltage at the V C pin from exceeding that on the SS pin. The soft-start function is engaged whenever power at VIN is removed, or as a result of either undervoltage lockout, overcurrent in the sense resistor or thermal (overtemperature) shutdown. The SS node is then discharged to roughly 600mV. When this condition is removed, a nominal 5µA current acts to charge up the SS node towards roughly 2.2V . For example, a 0.1µF soft-start capacitor will place a 0.05V/ms limit on the turn-on ramp rate at the V C node. ENABLE and Undervoltage Lockout (UVLO) A resistive divider from VIN to the EN/UVLO pin implements undervoltage lockout (UVLO). The EN/UVLO pin threshold is set at 1.223V . In addition, the EN/UVLO pin draws 2.4µA when the voltage at the pin is below 1.223V . This current provides user programmable hysteresis based on the value of R1. The effective UVLO thresholds are: V V R R R µA R V IN UVLO RISING IN U ( , ) 2 2 4 1 V VLO FALLING V R R R, ) Figure 10 shows the implementation of external shutdown control while still using the UVLO function. The NMOS grounds the EN/UVLO pin when turned on, and puts the L T3748 in shutdown with a quiescent current draw of less than 1µA. Minimum Load Requirement The L T3748 recovers output voltage information using the flyback pulse that occurs once the external MOSFET turns off and the secondary winding conducts current. In order to regulate the output voltage, the L T3748 needs to sample the flyback pulse. The L T3748 delivers a minimum amount of energy even during light load conditions to ensure accurate output voltage information. The minimum delivery of energy creates a minimum load requirement on the output of approximately 2% of maximum load. The minimum operating frequency at minimum load is approximately 42kHz. Alternatively, a Zener diode sufficiently rated to handle the minimum load power can be used to provide a minimum load without decreasing efficiency in normal operation. In selecting a Zener diode for this purpose, the Zener voltage should be high enough that the diode does not become the load path during transient conditions but the voltage must still be low enough that the MOSFET and output voltage ratings are not exceeded when the Zener functions as the minimum load. INTV CC Pin Considerations The INTVCC pin powers the internal circuitry and gate driver of the L T3748. Three unique configurations exist for regulation of the INTV CC pin as shown in Figure 11. In the first configuration, the internal LDO drives the INTV CC pin internally from the VIN supply. In the second configuration, the V IN supply directly drives the INTV CC pin through a direct connection bypassing the internal LDO. Use this optional configuration for voltages lower than 20V . In the third configuration, an external supply or third winding drives the INTV CC pin. Use this option when a voltage supply exists lower than the input supply but higher than the regulated INTV CC voltage. Using a lower voltage supply provides a more efficient source of power for internal circuitry and reduces power dissipation in the L T3748. When calculating the minimum input voltage required for a valid INTV CC, or the power dissipated in the L T3748, it is useful to know how much current will be drawn from the INTV CC LDO during normal operation. The easiest way to calculate this current is to use the gate charge (QG) for the L T3748 EN/UVLO GND VIN
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(OPTIONAL)Figure 10. Undervoltage Lockout (UVLO)
the L T3748 will stop switching. plays an important role for any DC/DC converter .
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Figure 11. INTVCC Pin Configurations
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Figure 12. INTVCC Current at Low VIN Can Cause the L T3748 to
with a design focus of maximizing efficiency.
- Select T ransformer Turns Ratio
- NPS) IDIODE(RMS) = √(ILIM • NPS)2 • (1 – D)/3 The equation for output power can be rearranged to solve for the current limit, I LIM, which can be solved at the nominal or the minimum V IN depending on application requirements. In this application the 2A load requirement will be set at V IN = 9V to reduce operating stresses at higher input voltages. The results of the aforementioned equations in this application are found in Table 2. applications inForMation Evaluating the results of the table, the 1:2 turns ratio looks demanding in terms of diode reverse-voltage requirements (a diode with higher reverse bias capability generally will have a larger forward drop and therefore lower application efficiency) and primary side currents and only decreases the output diode RMS current by 13% from the 1:1 case. However , on evaluating the minimum and maximum in- ductance requirements in Step 3, even the 1:1 case does not allow for enough on-time from maximum V IN for the range of inductance that provides sufficient off-time. For that reason, a 2:1 turns ratio is selected, easing the requirement on the output diode reverse voltage rating in the process. 2. Calculate Sense Resistor Value The sense resistor can be calculated by the following equation: R mV ISENSE LIM = 100 The desired 6A current limit leads to an unusual value of 0.017Ω, so the current limit is increased to use a more standard 0.016Ω value and I LIM of 6.25A. 3. Select a T ransformer Based on Inductance and Saturation Current Requirements The transformer in this application will be selected to optimize efficiency at a 80kHz minimum switching fre- quency at maximum load from the nominal input voltage. In applications where transformer size is the primary requirement, reducing the current limit or increasing the switching frequency may be required. The following equa- tions select the inductance required for a given switching frequency at max load and then verify that the inductance is large enough to satisfy the minimum on and off times of the L T3748.
Table 2. Voltage Stresses, Output Capability and Diode Current vs Turns Ratio in 12VIN to 5V , 2A Application
LPRI ≤ VIN(MIN) • (VOUT + VF(DIODE)) • NPS/(fSW(MIN) • ILIM • ((VOUT + VF(DIODE)) • NPS + VIN(MIN))) LPRI ≥ (VOUT + VF(DIODE)) • RSENSE • 400ns • NPS/15mV LPRI ≥ VIN(MAX) • RSENSE • 200ns/15mV For this application, the primary inductance with a 2:1 transformer and a 0.016Ω sense resistor for an 6.25A current limit is bounded by the minimum desired switch- ing frequency and the minimum off time requirement to be between 9.6µH and 11.5µH. Looking at Table 1, there are no transformers that fit that exact requirement. For the sake of prototyping, a transformer with slightly less than the desired primary inductance is selected with the PA3177NL. The application will need to be tested thoroughly for sta- bility at higher input voltages and when the current limit is at a minimum (in the middle of the output load range). The easiest solution to ease the requirement on minimum on-time is to reduce the maximum V IN voltage although alternatively NPS could be increased at the expense of ef- ficiency (and requiring a more thorough redesign). 4. Select a MOSFET Switch The selected 2:1 transformer requires a nominal 55V rating on the MOSFET switch, assuming no leakage inductance. However , even a small amount of leakage inductance may cause the drain to ring to double the anticipated voltage, and generally this needs to be verified in the final design. However , at currents below 10A it is fairly easy to find a MOSFET with sufficiently low R DS(ON) to be a very small contributor to maximum load efficiency losses while similarly having a low enough Q G to require minimum current and minimal losses when driving the MOSFET at lighter loads. Also, while considering the efficiency gains and losses with a given MOSFET , it is important to real- ize that a trade-off in R DS(ON) for VDS(MAX) may backfire if a snubber needs to be added to the circuit to meet the voltage requirements and dissipates more energy than the difference in switch resistance. For that reason, a Vishay Si7738 is selected to give lots of margin with its 150V rating. The RMS current in the MOSFET can be calculated, squared and multiplied by the R DS(ON) to calculate losses and the current required to drive the FET at frequency can be determined, by the following equations: I MOSFET(RMS) = √ILIM2 • D/3 IINTVCC = fSW • QG PINTVCC = IINTVCC • (VIN – VINTVCC) In this application the MOSFET RMS current at maximum load is about 2.7A, which into the 0.038Ω R DS(ON) will be 0.28W , or on the order of 2% loss in efficiency. Assuming that the maximum operating frequency is around four times higher than the maximum load frequency (at about a quarter the output load) and reading the approximate Q G at 7V operation from the Vishay data sheet, the approximate INTV CC current is likely close to 8mA, dissipating 0.04W when the load is on the order of 2.5W , or less than 2%, and much less at maximum load. 5. Select the Output Diode The output diode reverse voltage, as calculated earlier , is the first important specification for the output diode. As with the MOSFET , choosing a diode with enough margin should preclude the use of a snubber . The second criterion is the power requirement of the diode which is more difficult to correctly ascertain—some manufacturers give direct data about power dissipation versus duty cycle, which can be used with the data from the table to determine. To avoid using a snubber , a diode with a 60V reverse-bias capabil- ity and minimal forward drop was selected—in this case, the Diodes Inc. SBR 8U60P5. In this particular application where maximizing efficiency is the goal, minimizing the maximum voltage requirement on V IN may allow the use of a diode with a lower reverse bias rating and a lower forward drop which could further increase efficiency. Al- ternatively, if no efficient diode is available for a particular reverse bias rating, it may be more beneficial to increase the windings ratio until a diode with low forward drop can be selected and then reevaluate whether that solution with higher RMS diode current is beneficial. applications inForMation
- Select the Feedback Resistor for Proper Output
- Select the Output Capacitor
- • 8. Add Snubber Circuitry as Necessary With the primary components selected, the application should be constructed to evaluate ringing at the drain of the MOSFET switch and to evaluate step response to optimize the compensation network. If using an RC snubber , the equations from the Applications Information section can be used or a rough estimate of component values may come from using the published leakage inductance of the transformer and selecting a snubber capacitor ranging from 2 to 3 times larger than the published MOSFET output capacitance. In this example, at maximum load while at maximum input voltage, the drain of the MOSFET switch is probed and measured to peak at approximately 125V , well below the 150V rating of the Si7738. Similarly, the anode of the output diode is probed to look at potential ringing when the MOSFET switch turns on and a peak of 45V is measured across the diode. Therefore, no snubber circuitry is required. applications inForMation 9. Optimize the Compensation Network To set the compensation, the application is first configured with a 22nF capacitor and 10k resistor as a starting point. A load step is applied at both light and heavy loads at the 60V maximum input voltage and the capacitance is decreased until damping decreases to the desired limit, in this case with a compensation capacitance of 2.2nF and a response implying about 60˚ of phase margin. After verifying stability at the minimum input voltage, as well, the compensation capacitance is doubled for safety margin. The series re- sistance is varied from 5k to 50k but the optimal response is observed with 25k. For best ripple performance, select a compensation capacitor not less than 1nF , and select a compensation resistor not greater than 50k. 10. Soft-Start Capacitor and UVLO Resistor Divider A soft-start capacitor helps during the start-up of the flyback converter . Select the UVLO resistor divider for the intended input operation range. These equations are aforementioned. DESIGN EXAMPLE: 48V IN TO 12V , 2A OUT The second example is a telecom application shown on the front page of the datasheet. The focus of this application is a cheap, small and simple solution. Table 3 shows the results of the initial step for selecting the turns ratio. In this example, the output diode is a much smaller ef- ficiency loss due to the smaller voltage drop across it in ratio to V OUT so minimizing output diode current is not as important. Of greater importance is minimizing the stresses on the MOSFET and output diode and the 4:1 case seems to be the best compromise for that to avoid using a snubber on either device.
Table 3. Voltage Stresses, Output Capability and Diode Current vs Turns Ratio in 48VIN to 12V , 2A Application
20µH of primary inductance is required for minimum off-time while selecting the transformer , but in order to minimize output ripple at maximum load a 60.8µH trans- former is selected. To meet the saturation current (12A, peak, on the secondary windings), a Versa-Pak VP4-0047-R provides a compact and efficient solution. For the MOSFET switch, since the input voltage is so high, resistive losses on the primary side will be very low so minimizing R DS(ON) is of minimum benefit. However , since the current for the gate drive is pulled from a high V IN, minimizing both QG and operating frequency is essential unless a third winding is added. The Vishay Si7464DP , with a 200V V DS(MAX) and low gate charge, keeps the INTVCC current to just over 3mA, worst-case, which when added to quiescent current will keep power dissipation in the L T3748 to just over 1/4W at 72V V IN. The output diode only nominally has 30V of reverse bias but a B360 diode is selected to ensure enough margin that a snubber will not be required. A more expensive diode with lower forward drop might recover several percent efficiency and if high temperature operation is required a diode rated for more average current at temperature might be needed, but the B360 is small and inexpensive. The rest of the design and component selection is straight- forward. Suggested Layout See Figures 13 and 14 for the DC1557A demo board layout. Note the proximity of the R REF and RFB resistors (R9, R5) to the L T3748 for optimal regulation. The location of these two resistors as close to the physical pins of the L T3748 is critical for accurate regulation. In addition, the high frequency current path from the V IN bypass capacitor (C2) through the primary-side winding, the MOSFET switch and sense resistor (R10) is a very tight loop. Similarly, the high frequency current path for the MOSFET gate switching from the INTV CC capacitor through the source of the MOSFET and sense resistor is similarly small in area. For improved regulation it is recommended that the user ensure that the high current ground is kept separate or at least physically isolated from the small-signal ground used by the other ground-referenced pins.
Figure 15. Automotive IGBT Controller Supply
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Figure 16. ±300V Isolated Flyback Converter
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Figure 17. 48V , 0.5A Supply from 24V to 96V Input
3748 F17243k 2nF
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Figure 18. Efficiency of 48V Supply of Figure 17
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package Description MSOP (MS12) 0510 REV A 0.53 p 0.152 (.021 p .006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 1.0 (.0394) BSC 0.50 (.0197) BSC 16 14 121110 1 3 5 6 7 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.254 (.010) 0o – 6o TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.889 p 0.127 (.035 p .005) RECOMMENDED SOLDER PAD LAYOUT 0.305 p 0.038 (.0120 p .0015) TYP 0.50 (.0197) BSC 1.0 (.0394) BSC 4.039 p 0.102 (.159 p .004) (NOTE 3) 0.1016 p 0.0508 (.004 p .002) 3.00 p 0.102 (.118 p .004) (NOTE 4) 0.280 p 0.076 (.011 p .003) REF 4.90 p 0.152 (.193 p .006) Varitation: MS16 (12) 16-Lead Plastic MSOP with 4 Pins Removed (Reference LTC DWG # 05-08-1847 Rev A)
Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2010 LT 0710 • PRINTED IN USA relateD parts typical application 5V , 2A Output from Automotive Input with Continuous Operation from 6V to 45V EN/UVLO TC SS RFB RREF VC GND INTV CC L T3748 3748 TA0234.8k 2nF VIN 12V TYP VOUT+ 5V , 2A 50mVP-P RIPPLE VOUT– VIN 2:1 D2825k 215k 10µF 8.3µH GATE SENSE 100µF 10V 2.2nF 4.7µF 6.04k 52.3k 0.016/uni03A9 D1: DIODES INC. SBR8U60P5 D2: DIODES INC. BZT52C5V6 M1: Si7738DP T1: PULSE PA3177NL 25k PART NUMBER DESCRIPTION COMMENTS L T3573 40V Isolated Flyback Converter Monolithic No-Opto Flyback with Integrated 1.25A, 60V Switch L T3574/L T3575 40V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 0.65A / 2.5A 60V Switch L T3757/L T3758 40V/100V Flyback, Boost Controllers Universal Controllers with Small Package and Powerful Gate Drive L T3957/L T3958 40V/100V Flyback, Boost Converters Monolithic with Integrated 5A/3.3A Switch L T1725 20V Isolated Flyback Controller Controller with Load Compensation Circuitry L T1737 20V Isolated Flyback Controller No Opto-Isolator or Third Winding Required, Up to 50W Output L TC 3803/L TC3803-3 L TC3803-5 200kHz/300kHz Flyback DC/DC Controllers VIN and VOUT Limited Only by External Components L TC3805/L TC3805-5 Adjustable Frequency Flyback Controllers VIN and VOUT Limited Only by External Components