LT3511

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Isolated Flyback Converter The L T®3511 is a high voltage monolithic switching regula- tor specifically designed for the isolated flyback topology. No third winding or opto-isolator is required for regula- tion as the part senses output voltage directly from the primary-side flyback waveform. The device integrates a 240mA, 150V power switch, high voltage circuitry, and control into a high voltage 16-lead MSOP package with four leads removed. The L T3511 operates from an input voltage range of 4.5V to 100V and delivers up to 2.5W of isolated output power . T wo external resistors and the transformer turns ratio easily set the output voltage. Off-the-shelf transformers are available for several applications. The high level of integration and the use of boundary mode operation results in a simple, clean, tightly regulated application solution to the traditionally tough problem of isolated power delivery. Output Load and Line Regulation48V to 5V Isolated Flyback Converter

APPLICATIONS

n 4.5V to 100V Input Voltage Range n Internal 240mA, 150V Power Switch n Boundary Mode Operation n No T ransformer Third Winding or Opto-Isolator Required for Regulation n Improved Primary-Side Winding Feedback Load Regulation n V OUT Set with T wo External Resistors n BIAS Pin for Internal Bias Supply and Power Switch Driver n No External Start-Up Resistor n 16-Lead MSOP Package n Isolated Telecom Power Supplies n Isolated Auxiliary/Housekeeping Power Supplies n Isolated Industrial, Automotive and Medical Power Supplies L, L T , L TC, L TM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5438499, 7471522. EN/UVLO TC RFB RREF SW VC GND BIAS L T3511

3511 TA01a

69.8k 16.9k VIN 36V TO 72V VOUT 0.3A VOUT 4:1 1M1μF 43.2k 19μH300μH 22μF 3.3nF 4.7μF 10k 169k t tVIN LOAD CURRENT (mA)

4.75 VOUT (V)

4.85 4.95 5.05 50 100 150 200

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5.15 5.25 4.80 4.90 5.00 5.10 5.20 300 VIN = 36V VIN = 72V VIN = 48V

Operating Junction Temperature Range (Note 2) (Note 1) ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V unless otherwise noted. ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L T3511EMS#PBF L T3511EMS#TRPBF 3511 16-Lead Plastic MSOP –40°C to 125°C L T3511IMS#PBF L T3511IMS#TRPBF 3511 16-Lead Plastic MSOP –40°C to 125°C L T3511HMS#PBF L T3511HMS#TRPBF 3511 16-Lead Plastic MSOP –40°C to 150°C L T3511MPMS#PBF L T3511MPMS#TRPBF 3511 16-Lead Plastic MSOP –55°C to 150°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Consult L TC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear .com/tapeandreel/ PIN CONFIGURATION EN/UVLO V IN GND BIAS NC GND SW R FB RREF TC VC GND TOP VIEW MS PACKAGE 16(12)-LEAD PLASTIC MSOP θJA = 90°C/W PARAMETER CONDITIONS MIN TYP MAX UNITS Input Voltage Range VIN = BIAS l 6 4.5 100 V V Quiescent Current Not Switching VEN/UVLO = 0.2V 2.7 3.5 mA μA EN/UVLO Pin Threshold EN/UVLO Pin Voltage Rising l 1.15 1.21 1.27 V EN/UVLO Pin Current V EN/UVLO = 1.1V VEN/UVLO = 1.4V 2.0 2.6 3.3 μA μA Maximum Switching Frequency 650 kHz Maximum Current Limit 240 330 430 mA Minimum Current Limit 35 60 90 mA Switch VCESAT ISW = 100mA 0.3 V RREF Voltage l 1.18 1.17 1.20 1.215 1.23 V V R REF Voltage Line Regulation 6V < VIN < 100V 0.01 0.03 %/V RREF Pin Bias Current (Note 3) l 80 400 nA Error Amplifier Voltage Gain 150 V/V Error Amplifier T ransconductance ΔI = 2μA 140 μmhos

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L T3511E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The L T3511I is guaranteed to meet performance specifications from –40°C to 125°C operating junction temperature range. The L T3511H is guaranteed The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Switching Frequency 40 kHz TC Current into RREF RTC = 53.6k 9.5 μA BIAS Pin Voltage Internally Regulated 3 3.1 3.2 V to meet performance specifications from –40°C to 150°C operating junction temperature range. The L T3511MP is guaranteed over the full –55°C to 150°C operating junction range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 3: Current flows out of the R REF pin. Note 4: The SW pin is rated to 150V for transients. Operating waveforms of the SW pin should keep the pedestal of the flyback waveform below 100V as shown in Figure 5. TYPICAL PERFORMANCE CHARACTERISTICS Switch VCESAT Switch Current Limit Quiescent Current vs VIN Output Voltage Quiescent Current BIAS Pin Voltage TEMPERATURE (°C) –50 4.75 VOUT (V) 4.80 4.90 4.95 5.00 5.25 5.10 0 50 75

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4.85 5.15 5.20 5.05 –25 25 100 125 150 VIN = 48V TEMPERATURE (°C) –50 –25 IQ (mA) 0 50 75

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VIN = 24V VIN = 48V VIN = 100V TEMPERATURE (°C) –50 2.0 BIAS VOL TAGE (V) 2.5 3.0 3.5 4.0 –25 0 25 50

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VIN = 24V , 10mA VIN = 24V , NO LOAD SWITCH CURRENT (mA) 05 0 SWITCH VCESAT VOLTAGE (mV) 400 1000 100 200 250

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TEMPERATURE (°C) –50 CURRENT LIMIT (mA) 350

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–25 0 50 400 300 250 150 5 210 5 1 0 0 1 5 7 MINIMUM CURRENT LIMIT MAXIMUM CURRENT LIMIT VOL TAGE (V) IQ (mA)2

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TA = 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS Maximum Frequency vs Temperature Minimum Frequency vs Temperature EN/UVLO Shutdown Threshold vs Temperature Boundary Mode Waveform Light Load Discontinuous Mode Waveform EN/UVLO Pin (Hysteresis) Current vs Temperature EN/UVLO Pin Current vs V EN/UVLO EN/UVLO Threshold vs Temperature T A = 25°C, unless otherwise noted. TEMPERATURE (°C) –50 –25 EN/UVLO PIN CURRENT (μA) 0 50 75

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EN/UVLO = 1.2V TEMPERATURE (°C) –50 EN/UVLO THRESHOLD (V) 2.0 2.5 3.0 25 75

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1.5 1.0 –25 0 5 210 5 1 0 0 1 0 5 0.5 VEN/UVLO VOLTAGE (V) EN/UVLO PIN CURRENT (μA) 20 40 60 80

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TEMPERATURE (°C) –50 –25 MAXIMUM FREQUENCY (kHz) 400 1000 0 50 75

3511 G10

TEMPERATURE (°C) –50 –25 MINIMUM FREQUENCY (kHz) 100 0 50 75

3511 G11

TEMPERATURE (°C) –50 EN/UVLO THRESHOLD (V) 0.1 0.3 0.4 0.5 0.9

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0.2 0–25 75 10025 5 2 10 5 1 0.6 0.7 0.8 20V/DIV 1μs/DIV

3511 G12

2μs/DIV

3511 G13

EN/UVLO (Pin 1): Enable/Undervoltage Lockout. The EN/ UVLO pin is used to start up the L T3511. Pull the pin to 0V to shut down the L T3511. This pin has an accurate 1.21V threshold and can be used to program an undervoltage lockout (UVLO) threshold using a resistor divider from supply to ground. A 2.6μA pin current hysteresis allows the programming of undervoltage lockout (UVLO) hys- teresis. EN/UVLO can be directly connected to V IN. If left open circuit the part will not power up. VIN (Pin 3): Input Supply Pin. This pin supplies current to the internal start-up circuitry, and serves as a reference voltage for the DCM comparator and feedback circuitry. Must be locally bypassed with a capacitor . GND (Pin 5, 8, 9): Ground Pins. All three pins should be tied directly to the local ground plane. BIAS (Pin 6): Bias Voltage. This pin supplies current to the switch driver and internal circuitry of the L T3511. This pin may also be connected to V IN if a third winding is not used and if V IN < 20V . The part can operate down to 4.5V when BIAS and V IN are connected together . If a third winding is used, the BIAS voltage should be lower than the input voltage and greater than 3.3V for proper operation. BIAS must be bypassed with a 4.7μF capacitor placed close to the pin. VC (Pin 10): Compensation Pin for Internal Error Amplifier . Connect a series RC from this pin to ground to compensate the switching regulator . An additional 100pF capacitor from this pin to ground helps eliminate noise. T C (Pin 11): Output Voltage Temperature Compensa- tion. Connect a resistor to ground to produce a current proportional to absolute temperature to be sourced into the R REF node. I TC = 0.55V/RTC. RREF (Pin 12): Input Pin for External Ground-Referred Reference Resistor . The resistor at this pin should be 10k. For nonisolated applications, a traditional resistor voltage divider from V OUT may be connected to this pin. RFB (Pin 14): Input Pin for External Feedback Resistor . This pin is connected to the transformer primary (V SW). The ratio of this resistor to the R REF resistor , times the internal bandgap reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). For nonisolated applications, this pin should be connected to GND with a 1M resistor . SW (Pin 16): Switch Pin. Collector of the internal power switch. Minimize trace area at this pin to minimize EMI and voltage spikes.

VOUT– VIN TC BIAS SWVIN VIN GND 120mV1.2V VC N:1 RSENSE 0.02Ω L1A L1B INTERNAL REFERENCE AND REGULATORS OSCILLATOR TC CURRENT ONE SHOT R Q S S gm 3μA 3511 BD 1.2V DRIVER EN/UVLO RFB RREF

The L T3511 is a current mode switching regulator IC de- signed specifically for the isolated flyback topology. The key problem in isolated topologies is how to communicate information regarding the output voltage from the isolated secondary side of the transformer to the primary side. Historically, opto-isolators or extra transformer windings communicate this information across the transformer . Opto-isolator circuits waste output power , and the extra components increase the cost and physical size of the power supply. Opto-isolators can also exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation and aging over life. Circuits employing an extra transformer winding also exhibit deficiencies. Using an extra winding adds to the transformer’s physical size and cost, and dynamic response is often mediocre. In the L T3511, the primary-side flyback pulse provides information about the isolated output voltage. In this man- ner , neither opto-isolator nor extra transformer winding is required for regulation. T wo resistors program the output voltage. Since this IC operates in boundary mode, the part calculates output voltage from the switch pin when the secondary current is almost zero. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional switching regulators including internal bias regulator , os- cillator , logic, current amplifier , current comparator , driver , and output switch. The novel sections include a special flyback error amplifier and a temperature compensation circuit. In addition, the logic system contains additional logic for boundary mode operation. The L T3511 features boundary mode control, where the part operates at the boundary between continuous con- duction mode and discontinuous conduction mode. The VC pin controls the current level just as it does in normal current mode operation, but instead of turning the switch on at the start of the oscillator period, the part turns on the switch when the secondary-side winding current is zero. Boundary Mode Operation Boundary mode is a variable frequency, current mode switching scheme. The switch turns on and the inductor current increases until a VC pin controlled current limit. After the switch turns off, the voltage on the SW pin rises to the output voltage divided by the secondary-to-primary transformer turns ratio plus the input voltage. When the secondary current through the diode falls to zero, the SW pin voltage falls below V IN. A discontinuous conduction mode (DCM) comparator detects this event and turns the switch back on. Boundary mode returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. Boundary mode also allows the use of a smaller transformer compared to continuous conduction mode and does not exhibit subharmonic oscillation. At low output currents, the L T3511 delays turning on the switch, and thus operates in discontinuous mode. Unlike traditional flyback converters, the switch has to turn on to update the output voltage information. Below 0.6V on the VC pin, the current comparator level decreases to its minimum value, and the internal oscillator frequency decreases. With the decrease of the internal oscillator , the part starts to operate in DCM. The output current is able to decrease while still allowing a minimum switch off time for the flyback error amplifier . The typical minimum internal oscillator frequency with VC equal to 0V is 40kHz.

In the Block Diagram, RREF (R4) and RFB (R3) are external resistors used to program the output voltage. The L T3511 operates similar to traditional current mode switchers, except in the use of a unique error amplifier , which derives its feedback information from the flyback pulse. Operation is as follows: when the output switch, Q1, turns off, its collector voltage rises above the V IN rail. The am- plitude of this flyback pulse, i.e., the difference between it and V IN, is given as: V FLBK = (VOUT + VF + ISEC • ESR) • NPS VF = D1 forward voltage ISEC = T ransformer secondary current ESR = Total impedance of secondary circuit NPS = T ransformer effective primary-to-secondary turns ratio RFB and Q2 convert the flyback voltage into a current. Nearly all of this current flows through R REF to form a ground- referred voltage. The resulting voltage forms the input to the flyback error amplifier . The flyback error amplifier samples the voltage information when the secondary side winding current is zero. The bandgap voltage, 1.20V , acts as the reference for the flyback error amplifier . The relatively high gain in the overall loop will then cause the voltage at R REF to be nearly equal to the bandgap reference voltage VBG. The resulting relationship between VFLBK and VBG approximately equals: VFLBK RFB ⎟ = VBG RREF or VFLBK = VBG RFB RREF VBG = Internal bandgap reference Combination of the preceding expression with earlier derivation of VFLBK results in the following equation: VOUT = VBG RFB RREF ⎟ 1 NPS ⎟ –V F –ISEC ESR() The expression defines VOUT in terms of the internal ref- erence, programming resistors, transformer turns ratio and diode forward voltage drop. Additionally, it includes the effect of nonzero secondary output impedance (ESR). Boundary control mode minimizes the effect of this im- pedance term. Temperature Compensation The first term in the V OUT equation does not have tem- perature dependence, but the diode forward drop has a significant negative temperature coefficient. A positive temperature coefficient current source connects to the R REF pin to compensate. A resistor to ground from the TC pin sets the compensation current. The following equation explains the cancellation of the temperature coefficient: δVF δT = – RFB RTC

• 1 NPS
• δVTC δT or, RTC = –RFB NPS
• 1 δVF / δT
• δVTC δT ≈ RFB NPS (δVF/δT) = Diode’s forward voltage temperature coefficient (δVTC/δT) = 2mV VTC = 0.55V Experimentally verify the resulting value of RTC and adjust as necessary to achieve optimal regulation over temperature. The addition of a temperature coefficient current modifies the expression of output voltage as follows: VOUT = VBG RFB RREF ⎟ 1 NPS ⎟ –VF – VTC RTC ⎟ • RFB NPS –ISEC ESR() Output Power A flyback converter has a complicated relationship be- tween the input and output current compared to a buck or a boost. A boost has a relatively constant maximum input current regardless of input voltage and a buck has a relatively constant maximum output current regardless of input voltage. This is due to the continuous nonswitching behavior of the two currents. A flyback converter has both discontinuous input and output currents which makes it

amount of output power at given input voltages.

3511 F01

3511 F02

3511 F04

Figure 1. Output Power for 3.3V Output Figure 2. Output Power for 5V Output Figure 3. Output Power for 12V Output Figure 4. Output Power for 24V Output

3511 F03

TRANSFORMER DESIGN CONSIDERATIONS Successful application of the L T3511 relies on proper transformer specification and design. Carefully consider the following information in addition to the traditional guidelines associated with high frequency isolated power supply transformer design. Linear Technology has worked with several leading mag- netic component manufacturers to produce pre-designed flyback transformers for use with the L T3511. Table 1 shows the details of these transformers. Table 1. Predesigned T ransformers 750311558 300 1.5 4:1:1 1500 500 Würth Elektronik 48V to 5V , 0.3A 24V to 5V , 0.2A 12V to 5V , 0.13A 48V to 3.3V , 0.33A 24V to 3.3V , 0.28A 12V to 3.3V , 0.18A 750311019 400 5 6:1:2 1500 750 Würth Elektronik 24V to 5V , 0.26A 12V to 5V , 0.17A 48V to 3.3V , 0.43A 24V to 3.3V , 0.35A 12V to 3.3V , 0.2A 750311659 300 2 1:1:0.2 1500 560 Würth Elektronik 48V to 24V , 0.07A 750311660 350 3 2:1:0.33 1500 520 Würth Elektronik 48V to 15V , 0.1A 48V to 12V , 0.12A 24V to 15V , 0.09A 12V to 15V , 0.045A 750311838 350 3 2:1:1 1500 520 Würth Elektronik 48V to ±15V , 0.05A 48V to ±12V , 0.06A 24V to ±15V , 0.045A 750311963 200 0.4 1:5:5 1500 650 Würth Elektronik 12V to ±70V , 0.004A 12V to ±100V , 0.003A 12V to ±150V , 0.002A 750311966 120 0.45 1:5:0.5 1500 900 Würth Elektronik 12V to +120V and –12V , 0.002A 10396-T024 300 2.0 4:1:1 1500 500 Sumida 48V to 5V , 0.3A 24V to 5V , 0.2A 12V to 5V , 0.13A 48V to 3.3V , 0.33A 24V to 3.3V , 0.28A 12V to 3.3V , 0.18A 10396-T026 300 2.5 6:1:2 1500 500 Sumida 24V to 5V , 0.26A 12V to 5V , 0.17A 48V to 3.3V , 0.43A 24V to 3.3V , 0.35A 12V to 3.3V , 0.2A 01355-T057 250 2.0 1:1:0.2 1500 500 Sumida 48V to 24V , 0.07A 10396-T022 300 2.0 2:1:0.33 1500 500 Sumida 48V to 15V , 0.1A 48V to 12V , 0.12A 24V to 15V , 0.09A 12V to 15V , 0.045A 10396-T028 300 2.5 2:1:1 1500 500 Sumida 48V to ±15V , 0.05A 48V to ±12V , 0.06A 24V to ±15V , 0.045A

Note that when using an R FB/RREF resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. In contrast, the use of simple ratios of small integers, e.g., 1:1, 2:1, 3:2, provides more freedom in setting total turns and mutual inductance. Typically, choose the transformer turns to maximize avail- able output power . For low output voltages (3.3V or 5V), a N:1 turns ratio can be used with multiple primary windings relative to the secondary to maximize the transformer’s current gain (and output power). However , remember that the SW pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. In addition, leakage inductance will cause a voltage spike (V LEAKAGE) on top of this reflected voltage. This total quantity needs to remain below the absolute maximum rating of the SW pin to prevent breakdown of the internal power switch. Together these conditions place an upper limit on the turns ratio, N, for a given application. Choose a turns ratio low enough to ensure: N < 150V – VIN(MAX) –VLEAKAGE VOUT + VF For larger N:1 values, choose a transformer with a larger physical size to deliver additional current. In addition, choose a large enough inductance value to ensure that the off-time is long enough to measure the output voltage. For lower output power levels, choose a 1:1 or 1:N trans- former for the absolute smallest transformer size. A 1:N transformer will minimize the magnetizing inductance (and minimize size), but will also limit the available output power . A higher 1:N turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch. The turns ratio is an important element in the isolated feedback scheme. Make sure the transformer manufacturer guarantees turns ratio accuracy within ±1%. Saturation Current The current in the transformer windings should not ex- ceed its rated saturation current. Energy injected once the core is saturated will not be transferred to the secondary and will instead be dissipated in the core. Information on saturation current should be provided by the transformer manufacturers. Table 1 lists the saturation current of the transformers designed for use with the L T3511. Primary Inductance Requirements The L T3511 obtains output voltage information from the reflected output voltage on the switch pin. The conduction of secondary winding current reflects the output voltage on the primary. The sampling circuitry needs a minimum of 400ns to settle and sample the reflected output voltage. In order to ensure proper sampling, the secondary winding needs to conduct current for a minimum of 400ns. The following equation gives the minimum value for primary- side magnetizing inductance: LPRI ≥ tOFF(MIN) •NPS •V OUT + VF() IPEAK(MIN) t OFF(MIN) = 400ns I PEAK(MIN) = 55mA In addition to the primary inductance requirement for sampling time, the L T3511 has internal circuit constraints that prevent the switch from staying on for less than 100ns. If the inductor current exceeds the desired current limit during that time, oscillation may occur at the output as the current control loop will lose its ability to regulate. The following equation, based on maximum input voltage, must also be followed in selecting primary-side magnetiz- ing inductance: LPRI ≥ tON(MIN) •V IN(MAX) IPEAK(MIN) t ON(MIN) = 100ns I PEAK(MIN) = 55mA

transformer leakage inductance. A clamp circuit is recommended for most applications. ensures well defined and consistent clamping voltages. and Figure 6 shows the connection of the DZ clamp. Figure 5. Maximum Voltages for SW Pin Flyback Waveform

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Figure 6. DZ Clamp will be below the 78V maximum.

• L C •IPK(VIN(MIN)) 2 •fSW • 1+ NPS •V OUT + VF() VZENER –NPS •V OUT + VF() LC = Leakage Inductance IPK(VIN(MIN)) = VOUT •IOUT •2 η •VIN(MIN) •D VIN(MIN) fSW = 1 tON + tOFF = 1 LPRI •IPK(VIN(MIN)) VIN(MIN) + LPRI •IPK(VIN(MIN)) NPS •V OUT + VF() Tables 2 and 3 show some recommended diodes and Zener diodes.

Table 2. Recommended Zener Diodes Table 3. Recommended Diodes voltage spike on the primary side of the transformer . cantly affect output regulation. (over manufacturing variations).

build transformers to this specification. using the iterative design procedure. dard 1% resistor values to yield nominal RFB/RREF ratios. configuration. The EN/UVLO pin threshold is set at 1.21V .

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Figure 7. Undervoltage Lockout (UVLO)

of 10mA to 15mA depending on the specific application. Verify minimum load requirements for each application. Zener with cathode connected to the output. The BIAS pin powers the internal circuitry of the L T3511. will allow the part to operate down to 4.5V and up to 15V . efficient source of power for internal circuitry.

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Figure 8. BIAS Pin Configurations

DESIGN PROCEDURE/DESIGN EXAMPLE Use the following design procedure as a guide to design- ing applications for the L T3511. Remember , the unique sampling architecture requires an iterative process for choosing correct resistor values. The design example involves designing a 15V output with a 100mA load current and an input range from 36V to 72V . V IN(MIN) = 36V , VIN(NOM) = 48V , VIN(MAX) = 72V , VOUT = 15V and IOUT = 100mA Step 1: Select the transformer turns ratio. NPS < VSW(MAX) –VIN(MAX) –VLEAKAGE VOUT + VF VSW(MAX) = Max rating of internal switch = 150V VLEAKAGE = Margin for transformer leakage spike = 40V VF = Forward voltage of output diode = assume approxi- mately ~ 0.5V Example: NPS < 150V – 72V – 40V 15V + 0.5V NPS < 2.45 NPS = 2 The choice of turns ratio is critical in determining output power as shown earlier in the Output Power section. At this point, a third winding can be added to the transformer to drive the BIAS pin of the L T3511 for higher efficiencies. Choose a turns ratio that sets the third winding voltage to regulate between 3.3V and 6V for maximum efficiency. Choose a third winding ratio to drive BIAS winding with 5V . (Optional) Example: NTHIRD NS = VTHIRD VOUT = 5V 15V = 0.33 The turns ratio of the transformer chosen is as follows NPRIMARY: NSECONDARY: NTHIRD = 2:1:0.33. Step 2: Calculate maximum power output at minimum V IN. POUT(VIN(MIN)) = η • V IN(MIN) • IIN = η • V IN(MIN) • D • IPEAK • 0.5 D = VOUT + VF() •NPS VOUT + VF() •NPS + VIN(MIN) η = Efficiency = ~75% IPEAK = Peak switch current = 0.26A Example: D = 0.46 POUT(VIN(MIN)) = 1.62 IOUT(VIN(MIN)) = POUT(VIN(MIN))/VOUT = 0.11A The chosen turns ratio satisfies the output current re- quirement of 100mA. If the output current was too low, the minimum input voltage could be adjusted higher . The turns ratio in this example is set to its highest ratio given switch voltage requirements and margin for leakage in- ductance voltage spike. Step 3: Determine primary inductance, switching fre- quency and saturation current. Primary inductance for the transformer must be set above a minimum value to satisfy the minimum off and on time requirements. LPRI ≥ tOFF(MIN) •NPS •V OUT + VF() IPEAK(MIN) t OFF(MIN) = 400ns I PEAK(MIN) = 55mA LPRI ≥ tON(MIN) •V IN(MAX) IPEAK(MIN) t ON(MIN) = 100ns I PEAK(MIN) = 55mA APPLICATIONS INFORMATION

Example: LPRI ≥ 400ns • 2 • 15 + 0.5() 0.055 LPRI ≥ 225μH LPRI ≥ 100ns • 72 0.055 LPRI ≥ 131μH In addition, primary inductance will determine switching frequency. fSW = 1 tON + tOFF = 1 LPRI •IPEAK VIN + LPRI •IPEAK NPS •V OUT + VF() IPEAK = VOUT •IOUT •2 η •VIN •D Example: Let’s calculate switching frequency at our nominal V IN of 48V . D = 15 + 0.5() •2 15 + 0.5() •2 + 48 = 0.39 IPEAK = 15V • 0.1A • 2 0.75 • 48V • 0.39 = 0.21A Let’s choose LPRI = 350μH. Remember , most transform- ers specify primary inductance with a tolerance of ±20%. f SW = 256kHz Finally, the transformer needs to be rated for the correct saturation current level across line and load conditions. In the given example, the worst-case condition for switch current is at minimum V IN and maximum load. IPEAK = VOUT •IOUT •2 η •VIN •D IPEAK = 15V • 0.1A • 2 0.75 • 36V • 0.46 = 0.24A Ensure that the saturation current covers steady-state operation, start-up and transient conditions. To satisfy these conditions, choose a saturation current 50% or more higher than the steady-state calculation. In this example, a saturation current between 400mA and 500mA is chosen. Table 1 presents a list of pre-designed flyback transform- ers. For this application, the Würth 750311660 transformer will be used. Step 4: Choose the correct output diode. The two main criteria for choosing the output diode include forward current rating and reverse voltage rating. The maximum load requirement is a good first-order guess at the average current requirement for the output diode. A better metric is RMS current. IRMS = IPEAK(VIN(MIN)) •NPS • 1–D VIN(MIN) Example: IRMS = 0.24 • 2 • 1– 0.46 = 0.2A Next calculate reverse voltage requirement using maxi- mum VIN: VREVERSE = VOUT + VIN(MAX) NPS Example: VREVERSE = 15V + 72V = 51V A 0.5A, 60V diode from Diodes Inc. (SBR0560S1) will be used. Step 5: Choose an output capacitor . The output capacitor choice should minimize output voltage ripple and balance the trade-off between size and cost for a larger capacitor . Use the equation below at nominal V IN: C = IOUT •D ΔVOUT •f SW APPLICATIONS INFORMATION

Example: Design for ripple levels below 50mV . C = 0.1A • 0.39 0.05V • 256kHz = 3.1 μF A 10μF , 25V output capacitor is chosen. Remember ce- ramic capacitors lose capacitance with applied voltage. The capacitance can drop to 40% of quoted capacitance at the max voltage rating. Step 6: Design clamp circuit. The clamp circuit protects the switch from leakage induc- tance spike. A DZ clamp is the preferred clamp circuit. The Zener and the diode need to be chosen. The maximum Zener value is set according to the maxi- mum V IN: V ZENER(MAX) ≤ 150V – VIN(MAX) Example: V ZENER(MAX) ≤ 150V – 72V V ZENER(MAX) ≤ 78V In addition, power loss in the clamp circuit is inversely related to the clamp voltage as shown previously. Higher clamp voltages lead to lower power loss. A 68V Zener with a maximum of 72V will provide optimal protection and minimize power loss. Half-watt Zeners will satisfy most clamp applications involving the L T3511. Power loss can be calculated using the equations presented in the Leakage Inductance and Clamp Circuit section. The Zener chosen is a 68V 0.5W Zener from On Semicon- ductor (MMSZ5266BT1G). Choose a diode that is fast and has sufficient reverse voltage breakdown: V REVERSE > VSW(MAX) VSW(MAX) = VIN(MAX) + VZENER(MAX) Example: V REVERSE > 140V The diode needs to handle the peak switch current of the switch which was determined to be 0.24A. A 200V , 0.6A diode from Diodes Inc. (BAV21W) is chosen. Step 7: Compensation. Compensation will be optimized towards the end of the de- sign procedure. Connect a resistor and capacitor from the VC node to ground. Use a 20k resistor and a 2.2nF capacitor . Step 8: Select R FB and RTC Resistors. Use the following equations to choose starting values for RFB and RTC. Set RREF to 10k. RFB = VOUT + VF + 0.55V() •NPS •RREF 1.2V RREF = 10k RTC = RFB NPS Example: 1.2V = 267k RTC = 267k = 133k Step 9: Adjust RFB based on output voltage. Power up the application with application components connected and measure the regulated output voltage. Readjust R FB based on the measured output voltage. RFB(NEW) = VOUT VOUT(MEAS)

• RFB(OLD) Example: RFB(NEW) = 15V 16.8V
• 267k = 237k Step 10: Remove RTC and measure output voltage over temperature. Measure output voltage in a controlled temperature envi- ronment like an oven to determine the output temperature coefficient. Measure output voltage at a consistent load current and input voltage, across the temperature range of operation. This procedure will optimize line and load regulation over temperature. APPLICATIONS INFORMATION

Calculate the temperature coefficient of VOUT: ΔVOUT ΔTemp = VOUT(HOT) –V OUT(COLD) THOT(°C) –TCOLD(°C) Example: VOUT measured at 100mA and 48VIN ΔVOUT ΔTemp = 15.70V – 15.37V 125°C– – 5 0°C() = 1.9mV/°C Step 11: Calculate new value for RTC. RTC(NEW) = RFB NPS

• 1.85mV / °C ΔVOUT ΔTemp Example: RTC(NEW) = 237k
• 1.85 1.9 = 118k Step 12: Place new value for R TC, measure VOUT, and readjust RFB due to RTC change. RFB(NEW) = VOUT VOUT(MEAS)
• RFB(OLD) Example: RFB(NEW) = 15V 15V
• 237k = 237k Step 13: Verify new values of RFB and RTC over temperature. Measure output voltage over temperature with R TC connected. Step 14: Optimize compensation. Now that values for R FB and RTC are fixed, optimize the compensation. Compensation should be optimized for transient response to load steps on the output. Check transient response across the load range. Example: The optimal compensation for the application is: R C = 22.1k, CC = 4.7nF Step 15: Ensure minimum load. Check minimum load requirement at maximum input voltage. The minimum load occurs at the point where the output voltage begins to climb up as the converter delivers more energy than what is consumed at the output. Example: The minimum load at an input voltage of 72V is: 7mA Step 16: EN/UVLO resistor values. Determine amount of hysteresis required. Voltage hysteresis = 2.6μA • R1 Example: Choose 2V of hysteresis. R1= 2V 2.6μA = 768k Determine UVLO Threshold. VIN(UVLO,FALLING) = 1.2V • R1+ R2() R2 = 1.2V • R1 VIN(UVLO,FALLING) – 1.2V Set UVLO falling threshold to 30V . R2 = 1.2V • 768k 30V – 1.2V = 32.4k VIN(UVLO,FALLING) = 1.2V • R1+ R2() 32.4k = 30V VIN(UVLO,RISING) = VIN(UVLO,FALLING) + 2.6μA • R1 = 30V + 2.6μA • 768k = 32V APPLICATIONS INFORMATION

48V to 5V Isolated Flyback Converter 48V to 15V Isolated Flyback Converter

3511 TA02

69.8k VIN 36V TO 72V VOUT+ 0.3A V OUT– 4:1:1 D1 43.2k μF C4 μF 300μH 19μH C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM32ER71C226KE18B D1, D2: DIODES INC. SBR140S3 D3: DIODES INC. BAV21W T1: WÜRTH 750311558 Z1: ON SEMI MMSZ5266BT1G 10k 169k 16.9k OPTIONAL THIRD WINDING FOR HV OPERATION 3.3nF 4.7μF L1C 19μH EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF

3511 TA03

97.6k VIN 36V TO 72V VOUT+ 15V 0.1A VOUT– 2:1 D1 43.2k 1μF C4 10μF 350μH 88μH 10k 237k 13k 6.8nF 4.7μF EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM31CR71E106KA12 D1: DIODES INC. SBR0560S1 D2: DIODES INC. BAV21W T1: WÜRTH 750311660 Z1: ON SEMI MMSZ5266BT1G

24V to 5V Isolated Flyback Converter 48V to 24V Isolated Flyback Converter

3511 TA04

V OUT– 1:1 D1 43.2k μF C4 4.7μF 300μH 300μH 10k 187k 33.2k 3.3nF 4.7μF EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM32ER71H475KA88B D1: DIODES INC. SBR1U150SA D2: DIODES INC. BAV21W T1: WÜRTH 750311659 Z1: ON SEMI MMSZ5266BT1G

3511 TA05

73.2k VIN 20V TO 30V VOUT+ 0.25A VOUT– 6:1 D1 80.6k 4.7 μF C4 μF 300μH 8μH 10k 249k 9.31k 15nF 4.7μF EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: MURATA GRM31CR71H475KA12B C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM32ER71C226KE18B D1: DIODES INC. SBR2A30P1 D2: DIODES INC. BAV20W T1: SUMIDA 10396-T026 Z1: ON SEMI MMSZ5270BT1G

24V to 15V Isolated Flyback Converter 12V to 15V Isolated Flyback Converter

3511 TA06

0.09A V OUT– 2:1 D1 80.6k 4.7 μF C4 μF 350μH 88μH 10k 237k 20k 4.7nF 4.7μF EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: MURATA GRM31CR71H475KA12B C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM31CR71E106KA12B D1: DIODES INC. SBR140S3 D2: DIODES INC. BAV20W T1: WÜRTH 750311660 Z1: ON SEMI MMSZ5270BT1G

3511 TA08

V OUT– 2:1 D1 OPTIONAL MINIMUM LOAD 562k 4.7μF C4 4.7μF 350μH 88μH 10k 237k 26.1k 4.7nF 4.7μF Z2EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: MURATA GRM31CR71H475KA12B C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM31CR71H475KA12 D1: DIODES INC. SBR130S3 D2: DIODES INC. BAV20W T1: WÜRTH 750311660 Z1: ON SEMI MMSZ5270BT1G

12V to ±70V Isolated Flyback Converter 48V to 3.3V Non-Isolated Flyback Converter 48V to 12V Isolated Flyback Converter

3511 TA07

VOUT1– 1:5:5 D1 562k 2.2 μF C4 0.47μF 0.47μF 80μH 10k 105k 90.9k 6.8nF 4.7μF VOUT2+ 4mA VOUT2– –70V EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: MURATA GRM21BR71E225KA73B C3: TAIYO YUDEN EMK212B7475KG C4, C5: NIPPON CHEMI-CON KTS251B474M43N0T00 D1, D2: CENTRAL SEMI CRM1U-06M D3: DIODES INC. BAV20W T1: WÜRTH 750311692 Z1: NXP BZX100A

3511 TA09

3.3V 0.4A VOUT– 6:1 D1 43.2k 1μF C4 μF 400μH 11μH 5.11k 8.06k 4.7nF 4.7μF VOUT 8.66k EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: TAIYO YUDEN LMK325B7476MM-TR D1: DIODES INC. SBR2A30P1 D2: DIODES INC. BAV21W T1: WÜRTH 750311019 Z1: ON SEMI MMSZ5266BT1G

3511 TA10

0.1A VOUT– 2:1 D1 43.2k μF 4.7 μF 300μH 75μH 10k 191k 15k 6.8nF 4.7μF EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM31CR71H475KA12 D1: DIODES INC. SBR0560S1 D2: DIODES INC. BAV21W T1: SUMIDA 10396-T022 Z1: ON SEMI MMSZ5266BT1G TYPICAL APPLICATIONS

Variation: MS16 (12) 16-Lead Plastic MSOP with 4 Pins Removed (Reference L TC DWG # 05-08-1847 Rev A) MSOP (MS12) 0510 REV A 0.53 p 0.152 (.021 p .006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 0.86 (.034) REF 1.0 (.0394) BSC 0.50 (.0197) BSC 16 14 121110 13 5 6 7 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.254 (.010) 0o – 6o TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.889 p 0.127 (.035 p .005) RECOMMENDED SOLDER PAD LAYOUT 0.305 p 0.038 (.0120 p .0015) TYP 0.50 (.0197) BSC 1.0 (.0394) BSC 4.039 p 0.102 (.159 p .004) (NOTE 3) 0.1016 p 0.0508 (.004 p .002) 3.00 p 0.102 (.118 p .004) (NOTE 4) 0.280 p 0.076 (.011 p .003) REF 4.90 p 0.152 (.193 p .006) Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings.

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 4/11 Added MP-grade. Revised RFB pin description in the Pin Functions section. Updated efficiency equation and Table 1 in the Applications Information section. Revised the Typical Applications drawings. 2, 3 9, 10 20, 21 B 6/11 Deleted text from Turns Ratio section and added text to Primary Inductance Requirements of Applications Information 11 Minor edit to text and revision to Table 3 in Leakage Inductance and Clamp Circuits section of Applications Information 12-13 Replaced Step 3 in Design Procedure/Design Example section of Applications Information 16 Revised equation and made minor text edit to Step 6 in Design Procedure/Design Example section of Applications Information Updated “D2: Diodes” part numbers in all Typical Applications 20-23, 26 Added L T3512 to Related Parts section 26 C 12/11 Revised Absolute Maximum Ratings and H-grade Temperature Range Updated resistor values on Typical Applications drawings TA07 and TA08

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 2010 LT 1211 REV C • PRINTED IN USA RELATED PARTS TYPICAL APPLICATION 48V to ±15V Isolated Flyback Converter

3511 TA11

V OUT1– 2:1:1 D1 43.2k 1μF C4 4.7μF 350μH 88μH 10k 237k 20k 6.8nF 4.7μF VOUT2+ 50mA VOUT2– –15V 4.7μF88μH EN/UVLO TC VC GND BIAS L T3511 VIN SW RFB RREF C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4, C5: MURATA GRM31CR71H475KA12 D1, D2: DIODES INC. SBR0560S1 D3: DIODES INC. BAV21W T1: WÜRTH 750311838 Z1: CENTRAL SEMI CMHZ5266B PART NUMBER DESCRIPTION COMMENTS L T3512 Monolithic High Voltage, Isolated Flyback Converter , No Opto-Coupler Required 4.5V ≤ VIN ≤ 100V , 420mA/150V Onboard Power Switch, MSOP-16(12) with High Voltage Pin Spacing L T3958 High Input Voltage Boost, Flyback, SEPIC and Inverting Converter 5V ≤ VIN ≤ 80V , 3.3A/84V Onboard Power Switch, 5mm × 6mm QFN-36 with High Voltage Pin Spacing L T3748 100V Isolated Flyback Controller 5V ≤ V IN ≤ 100V , No Opto-Isolator or “Third Winding” Required, Onboard Gate Driver , MSOP-16 with High Voltage Pin Spacing L T3957 Boost, Flyback, SEPIC and Inverting Converter 3V ≤ VIN ≤ 40V , 5A/40V Onboard Power Switch, 5mm × 6mm QFN-36 with High Voltage Pin Spacing L T3956 Constant-Current, Constant-Voltage Boost, Buck, Buck-Boost, SEPIC or Flyback Converter 4.5V ≤ VIN ≤ 80V , 3.3A/84V Onboard Power Switch, T rue PWM Dimming, 5mm × 6mm QFN-36 with High Voltage Pin Spacing L T3575 Isolated Flyback Switching Regulator with 60V/2.5A Integrated Switch 3V ≤ VIN ≤ 40V , No Opto-Isolator or “Third Winding” Required, Up to 14W , TSSOP-16E L T3573 Isolated Flyback Switching Regulator with 60V/1.25A Integrated Switch 3V ≤ VIN ≤ 40V , No Opto-Isolator or “Third Winding” Required, Up to 7W , MSOP-16E L T3574 Isolated Flyback Switching Regulator with 60V/0.65A Integrated Switch 3V ≤ VIN ≤ 40V , No Opto-Isolator or “Third Winding” Required, Up to 3W , MSOP-16 L T3757 Boost, Flyback, SEPIC and Inverting Controller 2.9V ≤ V IN ≤ 40V , 100kHz to 1MHz Programmable Operating Frequency, 3mm × 3mm DFN-10 and MSOP-10E Package L T3758 Boost, Flyback, SEPIC and Inverting Controller 5.5V ≤ V IN ≤ 100V , 100kHz to 1MHz Programmable Operating Frequency, 3mm × 3mm DFN-10 and MSOP-10E Package L TC1871/L TC1871-1/ L TC1871-7 No R SENSE™ Low Quiescent Current Flyback, Boost and SEPIC Controller 2.5V ≤ VIN ≤ 36V , Burst Mode Operation