LT118A LINER
Document overview
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Technical content
= Guaranteed 1.0mV Max. Input Offset Voltage The LT118A is an improved version of the industry stand- = Guaranteed 100,000 Min. Gain ard LM118. The LT118A features lower input offset volt- = Guaranteed 50V/ys Slew Rate age, lower input offset currents, higher gain and higher = Guaranteed 20nA Max. Input Offset Current common mode and power supply rejection. Because of = 15MHz Bandwidth these enhancements, the LT118A will improve the accu- = Unity Gain Stable racy of most applications. Unlike many wideband amplifi- ers, the LT118A is unity gain stable and has a slew rate of 50V/ps. When used in inverting amplifier applications, feedforward compensation can be used to achieve slew APPLICATIONS rates in excess of 150V/ys. Linear Technology 2 | , i" Corporation’s advanced processing techniques make the = Wideband Amplifiers . ‘ : ran ® High Frequency Absolute Value Circuits LT118A an ideal choice for high speed applications. = D/A Converter Amplifiers = Fast Integrators SSS Voltage Follower Voltage Follower Pulse Response 10pF 5k 5v/DIV pe eee fh 5k 3 2S INPUT 2 TIME—0.5ys/DIV. EY LIN Vogue. 2-311
ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION Operating Temperature Range =" on> (6) out LM118H Storage Temperature Range METAL CAN H PACKAGE comp 1[1] [8] COMP 2 LT118AJ8 +N a out LM318J8 v-4] [5] comp 3 LT318AN8 HERMETIC DIP J8 PACKAGE LM318N8 PLASTIC DIP N8 PACKAGE SS ELECTRICAL CHARACTERISTICS (note 3) ia AA 500 500 nA An |inputResistnce || Pc N [pRsniesnce lerativecsivnete| ets | s__|[SewRae Went at <i] i iC saw [san Bown oat —|Vym ais Output Voltage Swing Vs= = 15V, RL =2k0 ze +13 72 213 V Input Voltage Range Ve = + 15V 2115 #115 v T= 125°C 45 7 45 7 mA = eee [eee = Ratio eat) agi PG! a 2-312 Onee
ELECTRICAL CHARACTERISTICS (Note 3) la EE : 30 750 nA HU ee 500: 750 nA ST <[seormres [esos gO Tg Lie 100 : V/mV a Cow [Can eanowam remit —[Ve=atv TP Output Voltage Swing Vg= + 15V, Ry = 2k. #120 £13 #12 +13 Vv Input Voltage Range Ve= + 15V #115 2115 v 2 | a oe [ee Ratio 3 [room inaomm) ————SSCSC~‘i Cw CO The @ denotes those specifications which apply over the full operating Note 2: For supply voltages less than + 15V, the maximum input voltage is temperature range. equal to the supply voltage. The shaded electrical specifications indicate those parameters which have Note 3: These specifications apply for + 5V-<Vs< + 20V. The power sup- been improved or guaranteed test limits provided for the first time. plies must be bypassed with a 0.1yF or greater disc capacitor within 4 Note 1: The inputs are shunted with back-to-back zeners for overvoltage _inches of the device. protection. Excessive current will flow if a differential voltage greater than 5V is applied to the inputs. Te] TYPICAL PERFORMANCE CHARACTERISTICS Input Current Voltage Gain Power Supply Rejection 200 135 120 ee NE 180 \\ oes Tp PN Seer ea QC pace BESS boo z FA } \\
2 FA aa 4 Fy lom\\ NEGATIVE |
ee = eee ee ee Cj ie \\ ne ee ee EEF SEE EEE ENS ott TTTiT yr) 6yf | cP cP TT}, NX —55-35-15 5 25 45 65 85 105 125 5 10 6 20 10 100 «tk 10k 100k 1M 10M TEMPERATURE (°C) SUPPLY VOLTAGE (+V) FREQUENCY (#2) ee EO EO LT WHER 2-313
TYPICAL PERFORMANCE CHARACTERISTICS Large Signal Frequency Open Loop Frequency Response Response . Unity Gain Bandwidth ‘TOMGSss)| BAC ES ap LETT co Is= = Vg= +15¥ 2 aw ACTTMIL TT SEINE pe EHH
2 SC COS cee
PONT) PISS 2 bs ETM NIC CCN a f+ 8 AME TUN th Pt TT ING eC a (LLLTT TT TTI osm 1M 2M 5M 10M 20M SOM 10 100 1k «610k «100k 1M 10M 100M 85-35-15 5 25 45 65 85 105 125 FREQUENCY (Hz) FREQUENCY (Hz) TEMPERATURE (°C) Large Signal Frequency Open Loop Frequency Response Response Voltage Follower Slew Rate ay 130 ie] “ACs. =e — ot ATI eo Ne EL msc ST LN | ef two | | a | UAT TT gE Ae eet ti Ty E NE | BL CEPTAS Et tenes [| SL LUTINT trees [| trot TT LTE | PPR SL LUTIINTTM ET oe LETT TTT 1M 3M 10M om 100M 10-100 «1k = 10k «100k «1M = =10M 100M -55-35 -15 5 25 45 65 85 105 125 FREQUENCY (Hz) FREQUENCY (Hz) TEMPERATURE (°C) el Feedforward Compensation for Pulse Response of Slew Rates of 150V/ys Feedforward Inverter 2pF s a — sk \\ | input \\ i = — OUTPUT 2m TIME—0.298/01V. ™ “BALANCE CIRCUIT NECESSARY FOR = INCREASED SLEW RATE ee 2-314 LT tee
TYPICAL PERFORMANCE CHARACTERISTICS Input Noise Voltage Common Mode Rejection Supply Current
3000 TTI 9 2 120 8
2? Nene con B \\ = et 10 100 tk 10k 100k 100 tk 10k 100k 1m” 10M 5 10 5 20 FREQUENCY (Hz) FREQUENCY (Hz) ‘SUPPLY VOLTAGE (+) 2 | Closed Loop Output Impedance Current Limiting LT118A Input Current
103 Von Li8v 16 200
a } Pet tel cpr Ln enue | Peet iceltrmares POC] RR SRA Pec et 10-2 y 2 200 + +—+ 4 ee ET | | Goer) SCALE q1 10 100 * 10k = 100k 1™ oO 5 10 15 20 3 30 -9 -6 -3 0 3 6 9 FREQUENCY (Hz) OUTPUT CURRENT (mA) DIFFERENTIAL INPUT VOLTAGE (V) EOE ee Overcompensation for Offset Balancing Isolating Large Capacitive Loads Increased Stability Ry OUTPUT 2 y+ ee ‘opr 1000 Tt" 6 . 2 ~ s 1 > weut —w |= tor 35% 3 6 ee LT nee 2-315
Settling Time Test Circuit Settling Time ‘Spr 10% 2 sv/olv / +10 3 OUTPUT B Smv/0lv = ° 1) 1000pF*| “IMPROVES SETTUNG TIME 0.248/01V Alternate Compensation for Settling Time Improved Settling Time ve ae 3 ‘Sv/DIV 2 5 2 N 6 e \\ 3 5 Smv/OIV “IMPROVES SETTLING TIME 0.2us/DIV APPLICATIONS INFORMATION Because of their wider bandwidth, the LT118A andLM118 —_ Settling time, an important parameter in many high speed operational amplfiers require more application care than amplifier applications, is difficult to measure and opti- most general purpose low frequency amplifiers. One of — mize. Settling time is very ‘‘application dependent’’ and the most critical requirements is that power supplies —_is influenced by external components, layout and the should be bypassed with a 0.1,F (or larger) disc ceramic amplifier. In general, the settling time to 0.01% can be capacitor within an inch of the device. Also, stray capaci- minimized by using a circuit similar to that shown. In ad- tance at either the input or output can cause oscillation. dition to the compensation network shown, a capacitor is While input capacitance can be compensated by placinga —_ needed across the feedback resistor to minimize ringing. capacitor across the feedback resistor, load capacitance . a must be minimized or isolated as shown. Even the SOpF Power supply bypassing can also affect settling time. The input capacitance of a 1X scope probe can alter the ™plifier has low power supply rejection ratio at high fre- response of the device. quencies, so transients and ringing on the supply leads can appear at the output. Large (22uF) solid tantalum capacitors are preferred to minimize supply aberrations. tS 2-316 LY WEAR
Precision Inverting Amplifier . Cla. SCHEMATIC DIAGRAM fn em eps | oof ae saan Ganda ee AS ite a fea, ANT Ti rp LL al ee Se toe) [eoaeee al reas Gt mes 3checib ae 7 @ Aries”) 2-317
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os70-0.400 oon jo 2im=0ee aut [7 ieteo=a “sf «08 aes 208s, ress 4 “Te onstans Garam) yf Y T q ovs-0190 0.115 0.145, 4 q 0.100, ve ve 23) L__wate“o as |, o1e-o30 ss iease=0.s) irae 7a) v NOTE: OMENSIOKS IN NCHES UNLESS CTHERWISE NOTED “LEADS WITHIN 0.007 OF TRUE POSITION (TP) AT GAUGE PLANE - Tmax | Op 100°C 130°C/W a