LT1801CDD

LT1801 LINER

Document overview

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Technical content

Dual/Quad 80MHz, 25V/µs Low Power Rail-to-Rail Input and Output Precision Op Amps The LT 1801/LT1802 are dual/quad, low power, high speed rail-to-rail input and output operational amplifiers with excellent DC performance. The LT1801/LT1802 fea- ture reduced supply current, lower input offset voltage, lower input bias current and higher DC gain than other devices with comparable bandwidth. Typically, the LT1801/LT1802 have an input offset voltage of less than 100µV, an input bias current of less than 50nA and an open-loop gain of 85 thousand. The LT1801/LT1802 have an input range that includes both supply rails and an output that swings within 20mV of either supply rail to maximize the signal dynamic range in low supply applications. The LT1801/LT1802 maintain their performance for sup- plies from 2.3V to 12.6V and are specified at 3V, 5V and ±5V supplies. The inputs can be driven beyond the sup- plies without damage or phase reversal of the output. The LT1801 is available in the MS8, SO-8 and the 3mm × 3mm × 0.8mm dual fine pitch leadless package (DFN) with the standard dual op amp pinout. The LT1802 features the standard quad op amp configuration and is available in the 14-pin plastic SO package. The LT1801/LT1802 can be used as plug-in replacements for many op amps to im- prove input/output range and performance. For a single version of these amplifiers, see the LT1800 data sheet. ■ Gain Bandwidth Product: 80MHz ■ Input Common Mode Range Includes Both Rails ■ Output Swings Rail-to-Rail ■ Low Voltage Operation: Single or Split Supplies 2.3V to 12.6V ■ Low Quiescent Current: 2mA/Amplifier Max ■ Input Offset Voltage: 350µV Max ■ Input Bias Current: 250nA Max ■ 3mm × 3mm × 0.8mm DFN Package ■ Large Output Current: 50mA Typ ■ Low Voltage Noise: 8.5nV/√Hz Typ ■ Slew Rate: 25V/µs Typ ■ Common Mode Rejection: 105dB Typ ■ Power Supply Rejection: 97dB Typ ■ Open-Loop Gain: 85V/mV Typ ■ Operating Temperature Range: – 40°C to 85°C ■ LT1801 is Available in 8-Lead SO, MS8 and DFN Packages ■ LT1802 is Available in 14-Lead SO Package , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. ■ Low Voltage, High Frequency Signal Processing ■ Driving A/D Converters ■ Rail-to-Rail Buffer Amplifiers ■ Active Filters ■ Video Line Driver 1/2 LT1801 47pF 220pF VIN VS/2 909Ω 2.67k909Ω 1/2 LT1801 22pF VOUT470pF

18012 TA01

1.1k 2.21k 1.1k 3V, 1MHz, 4th Order Butterworth Filter FREQUENCY (Hz) –80 GAIN (dB) –40 –100 –60 –20 1k 100k 1M 10M 100M

18012 TA02

–120 10k 1MHz Filter Frequency Response FEATURES DESCRIPTIO U APPLICATIO SU TYPICAL APPLICATIO U

TJMAX = 150°C, θJA = 160°C/ W, (Note 10) Operating Temperature Range (Note 4) .. – 40°C to 85°C Specified Temperature Range (Note 5) ... – 40°C to 85°C ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W Maximum Junction Temperature (DD Package) ... 125°C (Note 1) TOP VIEW S PACKAGE 14-LEAD PLASTIC SO OUT A –IN A +IN A V +IN B –IN B OUT B OUT D –IN D +IN D V +IN C –IN C OUT C A BC D 1801 1801I TOP VIEW OUT B –IN B +IN B OUT A –IN A +IN A V S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 190°C/ W, (Note 10) LT1802CS LT1802IS S8 PART MARKING ORDER PART NUMBER OUT A –IN A +IN A V V OUT B –IN B +IN B TOP VIEW MS8 PACKAGE 8-LEAD PLASTIC MSOP ORDER PART NUMBER LT1801CS8 LT1801IS8 LTYR LTYS MS8 PART MARKING ORDER PART NUMBER LT1801CMS8 LT1801IMS8 TJMAX = 150°C, θJA = 250°C/ W, (Note 10) TOP VIEW DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN 1OUT A –IN A +IN A V OUT B –IN B +IN B B A LAAM* DD PART MARKING ORDER PART NUMBER LT1801CDD LT1801IDD TJMAX = 125°C, θJA = 160°C/ W, (Note 10) EXPOSED PAD INTERNALLY CONNECTED TO V–. (PCB CONNECTION OPTIONAL) Consult LTC Marketing for parts specified with wider operating temperature ranges. Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = 0V 75 350 µV VCM = 0V (MS8) 140 500 µV VCM = 0V (DD) 175 800 µV VCM = VS 0.5 3 mV ∆VOS Input Offset Shift V CM = 0V to VS – 1.5V 20 185 µV Input Offset Voltage Match V CM = 0V 100 650 µV (Channel-to-Channel) (Note 9) V CM = 0V (MS8) 150 900 µV VCM = 0V (DD) 280 1200 µV IB Input Bias Current V CM = 1V 25 250 nA VCM = VS 500 1500 nA Input Bias Current Match V CM = 1V 25 350 nA (Channel-to-Channel) (Note 9) V CM = VS 25 500 nA IOS Input Offset Current V CM = 1V 25 200 nA VCM = VS 25 200 nA Input Noise Voltage 0.1Hz to 10Hz 1.4 µVP-P en Input Noise Voltage Density f = 10kHz 8.5 nV/ √Hz in Input Noise Current Density f = 10kHz 1 pA/ √Hz CIN Input Capacitance 2p F AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k at VS/2 35 85 V/mV VS = 5V, VO = 1V to 4V, RL = 100Ω at VS/2 3.5 8 V/mV VS = 3V, VO = 0.5V to 2.5V, RL = 1k at VS/2 30 85 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = 0V to 3.5V 85 105 dB VS = 3V, VCM = 0V to 1.5V 78 97 dB CMRR Match (Channel-to-Channel) (Note 9) V S = 5V, VCM = 0V to 3.5V 79 105 dB VS = 3V, VCM = 0V to 1.5V 72 97 dB Input Common Mode Range 0 V S V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V 78 97 dB PSRR Match (Channel-to-Channel) (Note 9) V S = 2.5V to 10V, VCM = 0V 72 97 dB Minimum Supply Voltage (Note 6) 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load 16 60 mV ISINK = 5mA 85 200 mV ISINK = 20mA 225 500 mV VOH Output Voltage Swing High (Note 7) No Load 18 60 mV ISOURCE = 5mA 120 250 mV ISOURCE = 20mA 450 800 mV ISC Short-Circuit Current V S = 5V 20 45 mA VS = 3V 20 40 mA IS Supply Current per Amplifier 1.6 2 mA GBW Gain Bandwidth Product Frequency = 2MHz 40 80 MHz SR Slew Rate V S = 5V, AV = –1, R L = 1k, VO = 4VP-P 12.5 25 V/ µs FPBW Full Power Bandwidth V S = 5V, AV = 1, VO = 4VP-P 2 MHz HD Harmonic Distortion V S = 5V, AV = 1, RL = 1k, VO = 2VP-P, fC = 500kHz –75 dBc tS Settling Time 0.01%, V S = 5V, VSTEP = 2V, AV = 1, RL = 1k 250 ns ∆G Differential Gain (NTSC) V S = 5V, AV = 2, RL = 150Ω 0.35 % ∆θ Differential Phase (NTSC) V S = 5V, AV = 2, RL = 150Ω 0.4 Deg TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted.

ELECTRICAL CHARACTERISTICS

ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of 0°C < TA < 70°C. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = 0V ● 125 500 µV VCM = 0V (MS8) ● 140 650 µV VCM = 0V (DD) ● 290 950 µV VCM = VS ● 0.6 3.5 mV ∆VOS Input Offset Shift V CM = 0V to VS – 1.5V ● 30 275 µV Input Offset Voltage Match V CM = 0V ● 200 850 µV (Channel-to-Channel) (Note 9) V CM = 0V (MS8) ● 200 1250 µV VCM = 0V (DD) ● 275 1500 µV VOS TC Input Offset Voltage Drift (Note 8) ● 1.5 5 µV/°C IB Input Bias Current V CM = 1V ● 50 300 nA VCM = VS – 0.2V ● 550 2000 nA Input Bias Current Match V CM = 1V ● 25 400 nA (Channel-to-Channel) (Note 9) V CM = VS – 0.2V ● 25 600 nA IOS Input Offset Current V CM = 1V ● 25 300 nA VCM = VS – 0.2V ● 25 300 nA AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k at VS/2 ● 25 75 V/mV VS = 5V, VO = 1V to 4V, RL = 100Ω at VS/2 ● 2.5 6 V/mV VS = 3V, VO = 0.5V to 2.5V, RL = 1k at VS/2 ● 20 75 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = 0V to 3.5V ● 82 101 dB VS = 3V, VCM = 0V to 1.5V ● 74 93 dB CMRR Match (Channel-to-Channel) (Note 9) V S = 5V, VCM = 0V to 3.5V ● 76 101 dB VS = 3V, VCM = 0V to 1.5V ● 68 93 dB Input Common Mode Range ● 0V S V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V ● 74 91 dB PSRR Match (Channel-to-Channel) (Note 9) V S = 2.5V to 10V, VCM = 0V ● 68 91 dB Minimum Supply Voltage (Note 6) ● 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load ● 18 80 mV ISINK = 5mA ● 100 225 mV ISINK = 20mA ● 300 600 mV VOH Output Voltage Swing High (Note 7) No Load ● 25 80 mV ISOURCE = 5mA ● 150 300 mV ISOURCE = 20mA ● 600 950 mV ISC Short-Circuit Current V S = 5V ● 20 40 mA VS = 3V ● 15 30 mA IS Supply Current per Amplifier ● 2 2.8 mA GBW Gain Bandwidth Product Frequency = 2MHz ● 35 75 MHz SR Slew Rate V S = 5V, AV = –1, R L = 1k, VO = 4VP-P ● 11 22 V/ µs

ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of –4 0°C < TA < 85°C. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = 0V ● 175 700 µV VCM = 0V (MS8) ● 200 850 µV VCM = 0V (DD) ● 320 1150 µV VCM = VS ● 0.75 4 mV ∆VOS Input Offset Shift V CM = 0V to VS – 1.5V ● 30 300 µV Input Offset Voltage Match V CM = 0V ● 200 1250 µV (Channel-to-Channel) (Note 9) V CM = 0V (MS8) ● 280 1600 µV VCM = 0V (DD) ● 320 1800 µV VOS TC Input Offset Voltage Drift (Note 8) ● 1.5 5 µV/°C IB Input Bias Current ● 50 400 nA VCM = VS – 0.2V ● 600 2250 nA Input Bias Current Match V CM = 1V ● 25 450 nA (Channel-to-Channel) (Note 9) V CM = VS – 0.2V ● 25 700 nA IOS Input Offset Current V CM = 1V ● 25 350 nA VCM = VS – 0.2V ● 25 350 nA AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k at VS/2 ● 20 65 V/mV VS = 5V, VO = 1.5V to 3.5V, RL = 100Ω at VS/2 ● 2 6 V/mV VS = 3V, VO = 0.5V to 2.5V, RL = 1k at VS/2 ● 17.5 65 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = 0V to 3.5V ● 81 101 dB VS = 3V, VCM = 0V to 1.5V ● 73 93 dB CMRR Match (Channel-to-Channel) (Note 9) V S = 5V, VCM = 0V to 3.5V ● 75 101 dB VS = 3V, VCM = 0V to 1.5V ● 67 93 dB Input Common Mode Range ● 0V S V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V ● 73 90 dB PSRR Match (Channel-to-Channel) (Note 9) V S = 2.5V to 10V, VCM = 0V ● 67 90 dB Minimum Supply Voltage (Note 6) V CM = VO = 0.5V ● 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load ● 15 90 mV ISINK = 5mA ● 105 250 mV ISINK = 10mA ● 170 400 mV VOH Output Voltage Swing High (Note 7) No Load ● 25 90 mV ISOURCE = 5mA ● 150 350 mV ISOURCE = 10mA ● 300 700 mV ISC Short-Circuit Current V S = 5V ● 12.5 30 mA VS = 3V ● 12.5 30 mA IS Supply Current per Amplifier ● 2.1 3 mA GBW Gain Bandwidth Product Frequency = 2MHz ● 25 70 MHz SR Slew Rate V S = 5V, AV = –1, R L = 1k, VO = 4V ● 91 8 V / µs

ELECTRICAL CHARACTERISTICSTA = 25°C, VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = VS– 150 600 µV VCM = VS– (MS8) 180 750 µV VCM = VS– (DD) 260 1050 µV VCM = VS+ 0.7 3.5 mV ∆VOS Input Offset Shift V CM = VS– to VS+ – 1.5V 30 475 µV Input Offset Voltage Match V CM = VS– 150 1000 µV (Channel-to-Channel) (Note 9) V CM = VS– (MS8) 275 1300 µV VCM = VS– (DD) 325 1600 µV IB Input Bias Current V CM = VS– + 1V 25 250 nA VCM = VS+ 400 1500 nA Input Bias Current Match V CM = VS– + 1V 20 350 nA (Channel-to-Channel) (Note 9) V CM = VS+ 20 500 nA IOS Input Offset Current V CM = VS– + 1V 20 250 nA VCM = VS+ 20 250 nA Input Noise Voltage 0.1Hz to 10Hz 1.4 µVP-P en Input Noise Voltage Density f = 10kHz 8.5 nV/ √Hz in Input Noise Current Density f = 10kHz 1 pA/ √Hz CIN Input Capacitance f = 100kHz 2 pF AVOL Large-Signal Voltage Gain V O = –4V to 4V, R L = 1k 25 70 V/mV VO = –2V to 2V, R L = 100Ω 2.5 7 V/mV CMRR Common Mode Rejection Ratio V CM = VS– to 3.5V 85 109 dB CMRR Match (Channel-to-Channel) (Note 9) V CM = VS– to 3.5V 79 109 dB Input Common Mode Range V S– VS+ V PSRR Power Supply Rejection Ratio V S+ = 2.5V to 10V, VS– = 0V 78 97 dB PSRR Match (Channel-to-Channel) (Note 9) V S+ = 2.5V to 10V, VS– = 0V 72 97 dB VOL Output Voltage Swing Low (Note 7) No Load 15 70 mV ISINK = 5mA 90 200 mV ISINK = 20mA 225 500 mV VOH Output Voltage Swing High (Note 7) No Load 20 80 mV ISOURCE = 5mA 130 260 mV ISOURCE = 20mA 450 850 mV ISC Short-Circuit Current 25 50 mA IS Supply Current per Amplifier 1.8 3 mA GBW Gain Bandwidth Product Frequency = 2MHz 70 MHz FPBW Full Power Bandwidth V O = 8VP-P 0.9 MHz SR Slew Rate A V = –1, R L = 1k, VO = ± 4V, Measured at VO = ± 2V 20 V/ µs HD Harmonic Distortion A V = 1, RL = 1k, VO = 2VP-P, fC = 500kHz –75 dBc tS Settling Time 0.01%, V STEP = 5V, AV = 1V, RL = 1k 300 ns ∆G Differential Gain (NTSC) A V = 2, RL = 150Ω 0.35 % ∆θ Differential Phase (NTSC) A V = 2, RL = 150Ω 0.2 Deg

ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of 0°C < TA < 70°C. VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = VS– ● 200 800 µV VCM = VS– (MS8) ● 220 1000 µV VCM = VS– (DD) ● 290 1300 µV VCM = VS+ ● 0.75 4 mV ∆VOS Input Offset Shift V CM = VS– to VS+ – 1.5V ● 45 675 µV Input Offset Voltage Match V CM = VS– ● 240 1500 µV (Channel-to-Channel) (Note 9) V CM = VS– (MS8) ● 300 1700 µV VCM = VS– (DD) ● 340 1950 µV VOS TC Input Offset Voltage Drift (Note 8) ● 1.5 5 µV/°C IB Input Bias Current V CM = VS– + 1V ● 30 300 nA VCM = VS+ – 0.2V ● 450 2000 nA Input Bias Current Match V CM = VS– + 1V ● 25 400 nA (Channel-to-Channel) (Note 9) V CM = VS+ – 0.2V ● 25 700 nA IOS Input Offset Current V CM = VS– + 1V ● 25 300 nA VCM = VS+ – 0.2V ● 25 300 nA AVOL Large-Signal Voltage Gain V O = –4V to 4V, RL = 1k ● 15 55 V/mV VO = –2V to 2V, RL = 100Ω ● 2 5 V/mV CMRR Common Mode Rejection Ratio V CM = VS– to 3.5V ● 82 105 dB CMRR Match (Channel-to-Channel) (Note 9) V CM = VS– to 3.5V ● 76 105 dB Input Common Mode Range ● VS– VS+ V PSRR Power Supply Rejection Ratio V S+ = 2.5V to 10V, VS– = 0V ● 74 91 dB PSRR Match (Channel-to-Channel) (Note 9) V S+ = 2.5V to 10V, VS– = 0V ● 68 93 dB VOL Output Voltage Swing Low (Note 7) No Load ● 17 80 mV ISINK = 5mA ● 105 250 mV ISINK = 20mA ● 250 575 mV VOH Output Voltage Swing High (Note 7) No Load ● 25 90 mV ISOURCE = 5mA ● 150 310 mV ISOURCE = 20mA ● 600 975 mV ISC Short-Circuit Current ● 22.5 45 mA IS Supply Current per Amplifier ● 2.4 4 mA GBW Gain Bandwidth Product Frequency = 2MHz ● 70 MHz SR Slew Rate A V = – 1, RL = 1k, VO = ± 4V, ● 20 V/ µs Measured at VO = ± 2V SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = VS– ● 350 1000 µV VCM = VS– (MS8) ● 350 1200 µV VCM = VS– (DD) ● 350 1500 µV VCM = VS+ ● 0.75 5 mV ∆VOS Input Offset Shift V CM = VS– to VS+ – 1.5V ● 50 750 µV Input Offset Voltage Match V CM = VS– ● 280 1700 µV (Channel-to-Channel) (Note 9) V CM = VS– (MS8) ● 380 1900 µV VCM = VS– (DD) ● 410 2100 µV The ● denotes the specifications which apply over the temperature range of –40 °C < TA < 85°C. VS = ±5V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5)

ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range of – 40°C < TA < 85°C. VS = ± 5V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 4: The LT1801C/LT1801I and LT1802C/LT1802I are guaranteed functional over the temperature range of –40 °C to 85°C. Note 5: The LT1801C/LT1802C are guaranteed to meet specified performance from 0°C to 70°C. The LT1801C/LT1802C are designed, characterized and expected to meet specified performance from –40 °C to 85°C but are not tested or QA sampled at these temperatures. The LT1801I/LT1802I are guaranteed to meet specified performance from –40 °C to 85°C. Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 7: Output voltage swings are measured between the output and power supply rails. Note 8: This parameter is not 100% tested. Note 9: Matching parameters are the difference between amplifiers A and D and between B and C on the LT1802; between the two amplifiers on the LT1801. Note 10: Thermal resistance (θ JA) varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. If desired, the thermal resistance can be substantially reduced by connecting Pin 4 of the SO-8 and MS8, Pin 11 of the SO-14 or the underside metal of the DD package to a larger metal area S– trace). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS TC Input Offset Voltage Drift (Note 8) ● 1.5 5 µV/°C IB Input Bias Current V CM = VS– + 1V ● 50 400 nA VCM = VS+ – 0.2V ● 450 2250 nA Input Bias Current Match V CM = VS– + 1V ● 25 450 nA (Channel-to-Channel) (Note 9) V CM = VS+ – 0.2V ● 25 700 nA IOS Input Offset Current V CM = VS– + 1V ● 25 350 nA VCM = VS+ – 0.2V ● 25 350 nA AVOL Large-Signal Voltage Gain V O = –4V to 4V, R L = 1k ● 12.5 55 V/mV VO = –1V to 1V, R L = 100Ω ● 2 5 V/mV CMRR Common Mode Rejection Ratio V CM = VS– to 3.5V ● 81 104 dB CMRR Match (Channel-to-Channel) (Note 9) V CM = VS– to 3.5V ● 75 104 dB Input Common Mode Range ● VS– VS+ V PSRR Power Supply Rejection Ratio V S+ = 2.5V to 10V, VS– = 0V ● 73 90 dB PSRR Match (Channel-to-Channel) (Note 9) V S+ = 2.5V to 10V, VS– = 0V ● 67 90 dB VOL Output Voltage Swing Low (Note 7) No Load ● 20 100 mV ISINK = 5mA ● 110 275 mV ISINK = 10mA ● 180 400 mV VOH Output Voltage Swing High (Note 7) No Load ● 30 110 mV ISOURCE = 5mA ● 150 350 mV ISOURCE = 10mA ● 300 700 mV ISC Short-Circuit Current ● 12.5 30 mA IS Supply Current per Amplifier ● 2.6 4.5 mA GBW Gain Bandwidth Product Frequency = 2MHz ● 65 MHz SR Slew Rate A V = –1, R L = 1k, VO = ± 4V, ● 15 V/ µs Measured at VO = ± 2V

TYPICAL PERFOR A CE CHARACTERISTICS UW Supply Current vs Supply Voltage Offset Voltage vs Input Common Mode Voltage Input Bias Current vs Common Mode Voltage Input Bias Current vs Temperature Output Saturation Voltage vs Load Current (Output Low) V OS Distribution, VCM = 0V (PNP Stage) VOS Distribution, VCM = 5V (NPN Stage) INPUT OFFSET VOLTAGE (µV) –250 PERCENT OF UNITS (%) 50 150

18012 G01

–150 –50 250 VS = 5V, 0V VCM = 0V INPUT OFFSET VOLTAGE (µV) –2000 PERCENT OF UNITS (%) 400 1200

18012 G02

–1200 –400 2000 VS = 5V, 0V VCM = 5V TOTAL SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA)

18012 G03

TA = 125°C TA = 25°C TA = –55 °C PER AMPLIFIER INPUT COMMON MODE VOLTAGE (V) OFFSET VOLTAGE (µV) 100 300 500

18012 G04

–100 –300 200 400 –200 –400 –500 1 2 3 5 VS = 5V, 0V TYPICAL PARTTA = –55 °C TA = 125°C TA = 25°C INPUT COMMON MODE VOLTAGE (V) INPUT BIAS CURRENT (µA) 0.2 0.6 1.0

18012 G05

–0.2 –0.6 0.4 0.8 –0.4 –0.8 –1.0 0 1 23 5 VS = 5V, 0V TA = 25°C TA = 125°C TA = –55 °C TEMPERATURE (°C) –60 –0.1 INPUT BIAS (µA) 0.2 0.3 0.4 40 60 80 0.8

18012 G06

0.1 –40 –20 0 20 0.5 0.6 0.7 NPN ACTIVE VS = 5V, 0V VCM = 5V PNP ACTIVE VS = 5V, 0V VCM = 1V LOAD CURRENT (mA) 0.01 0.1

0.001 OUTPUT SATURATION VOLTAGE (V)

0.1 1 10 100

18012 G07

0.01 VS = 5V, 0V TA = 125°C TA = –55 °C TA = 25°C Output Saturation Voltage vs Load Current (Output High) LOAD CURRENT (mA) 0.01 0.1 0.1 1 10 100

18012 G08

0.01 VS = 5V, 0V TA = 125°C TA = –55 °C TA = 25°C

TYPICAL PERFOR A CE CHARACTERISTICS UW Open-Loop Gain Open-Loop Gain Offset Voltage vs Output Current Warm-Up Drift vs Time Open-Loop Gain Output Short-Circuit Current vs Power Supply Voltage Input Noise Voltage vs Frequency POWER SUPPLY VOLTAGE (±V) 1.5 –70OUTPUT SHORT-CIRCUIT CURRENT (mA) –50 –30 –10 2 3 3.5 5 –60 –40 –20 2.5 4 4.5 TA = 125°C TA = 125°C TA = –55 °C SINKING SOURCINGTA = –55 °C TA = 25°C TA = 25°C

18012 G10

OUTPUT VOLTAGE (V) –2000 CHANGE IN OFFSET VOLTAGE (µV) –1200 –400 400 0.5 1 1.5 2

18012 G11

2.5 1200 2000 –1600 –800 800 1600 VS = 3V, 0V RL TO GND RL = 1k RL = 100Ω OUTPUT VOLTAGE (V) CHANGE IN OFFSET VOLTAGE (µV) 400 1200 2000

18012 G12

–400 –1200 800 1600 –800 –1600 –2000 VS = 5V, 0V RL TO GND RL = 1k RL = 100Ω OUTPUT VOLTAGE (V) CHANGE IN OFFSET VOLTAGE (µV) 400 1200 2000

18012 G13

–400 –1200 800 1600 –800 –1600 –2000 –3–4 –1–2 12 40 5 VS = ±5V RL TO GND RL = 1k RL = 100Ω OUTPUT CURRENT (mA) –60 CHANGE IN OFFSET VOLTAGE (mV) 1.0

18012 G14

–1.0 –2.0 –30 0 30–45 –15 15 45 2.0 –0.5 0.5 –1.5 1.5 VS = ±5V TA = 125°C TA = –55 °C TA = 25°C TIME AFTER POWER-UP (SECONDS) OFFSET VOLTAGE (µV) 110

18012 G15

VS = ±5V VS = ±2.5V VS = ±1.5V TYPICAL PART FREQUENCY (kHz) NOISE VOLTAGE (nV/√Hz) 0.01 1 10 100

18012 G16

0.1 VS = 5V, 0V NPN ACTIVE VCM = 4.25V PNP ACTIVE VCM = 2.5V Minimum Supply Voltage TOTAL SUPPLY VOLTAGE (V) –0.6 CHANGE IN OFFSET VOLTAGE (mV)–0.4 0.2 0.4 2 3 3.5 5.5

18012 G09

–0.2 1.5 2.5 4 4.5 5 0.6 TA = 125°C TA = –55 °C TA = 25°C

TYPICAL PERFOR A CE CHARACTERISTICS UW Gain Bandwidth and Phase Margin vs Supply Voltage Gain Bandwidth and Phase Margin vs Temperature Slew Rate vs Temperature Gain and Phase vs Frequency Gain vs Frequency (A V = 1) Gain vs Frequency (AV = 2) TOTAL SUPPLY VOLTAGE (V) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 100 60 60

18012 G19

TA = 25°C TEMPERATURE (°C) –55 GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 100 –15 25 45 125

18012 G20

–35 5 65 85 105 GBW PRODUCT VS = ±2.5V PHASE MARGIN VS = ±2.5V PHASE MARGIN VS = ±5V GBW PRODUCT VS = ±5V TEMPERATURE (°C) –55 SLEW RATE (V/µs) –15 25 45 125

18012 G21

–35 5 65 85 105 AV = –1 RF = RG = 1k RL = 1k VS = ±2.5V VS = ±5V FREQUENCY (MHz) 0.01 10OPEN-LOOP GAIN (dB) PHASE (DEG) 0.1 1 10 100 300

18012 G22

0– 4 0 –10 –20 –30 –20 –60 –80 –100 100 VS = ±2.5V VS = ±5V PHASE GAIN FREQUENCY (MHz) GAIN (dB) 0.1 10 100 300

18012 G23

–12 RL = 1k CL = 10pF AV = 1 VS = ±5V VS = ±2.5V FREQUENCY (MHz) GAIN (dB) 0.1 10 100 300

18012 G24

RL = 1k CL = 10pF AV = 2 VS = ±5V VS = ±2.5V 0.1Hz to 10Hz Input Voltage NoiseInput Current Noise vs Frequency FREQUENCY (kHz) 1.0 NOISE CURRENT (pA/√Hz) 2.0 3.0 0.5 1.5 2.5 0.01 1 10 100

18012 G17

0.1 VS = 5V, 0V NPN ACTIVE VCM = 4.25V PNP ACTIVE VCM = 2.5V TIME (SECONDS) INPUT NOISE VOLTAGE (nV) 2000 1000 –1000 –2000

18012 G18

VS = 5V, 0V

TYPICAL PERFOR A CE CHARACTERISTICS UW Series Output Resistor vs Capacitive Load Distortion vs Frequency Distortion vs Frequency Maximum Undistorted Output Signal vs Frequency CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000 10000

18012 G29

VS = 5V, 0V AV = 2 ROS = 10Ω ROS = RL = 50Ω ROS = 20Ω FREQUENCY (MHz) 0.01 –70DISTORTION (dBc) –60 –50 –40 0.1 1 10

18012 G30

–80 –90 –100 –110 VS = 5V, 0V AV = 1 VOUT = 2VP-P RL = 150Ω, 2ND RL = 150Ω, 3RD RL = 1k, 2ND RL = 1k, 3RD FREQUENCY (MHz) 0.01 –70DISTORTION (dBc) –60 –50 –40 0.1 1 10

18012 G31

–80 –90 –100 –110 VS = 5V, 0V AV = 2 VOUT = 2VP-P RL = 150Ω, 2ND RL = 150Ω, 3RD RL = 1k, 2ND RL = 1k, 3RD FREQUENCY (Hz) 4.1 OUTPUT VOLTAGE SWING (VP-P) 4.3 4.5 4.6 1k 100k 1M 10M

18012 G32

3.9 10k 4.4 4.2 4.0 VS = 5V, 0V RL = 1k AV = –1 AV = 2 Series Output Resistor vs Capacitive Load CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000 10000

18012 G28

VS = 5V, 0V AV = 1 ROS = 10Ω ROS = 20Ω ROS = RL = 50Ω Power Supply Rejection Ratio vs Frequency FREQUENCY (MHz) 0.001 POWER SUPPLY REJECTION RATIO (dB) 0.01 0.1 1 10 100

18012 G27

–10

90 VS = 5V, 0V

TA = 25°C POSITIVE SUPPLY NEGATIVE SUPPLY Output Impedance vs Frequency Common Mode Rejection Ratio vs Frequency FREQUENCY (MHz) 0.1

0.001 OUTPUT IMPEDANCE (Ω)

0.1 600 100 1 10 100 500

18012 G25

0.01 VS = ±2.5V AV = 10 AV = 1 AV = 2 FREQUENCY (MHz) COMMON MODE REJECTION RATIO (dB) 120 100 0.01 1 10 100

18012 G26

0.1 VS = 5V, 0V

TYPICAL PERFOR A CE CHARACTERISTICS UW ±5V Small-Signal Response 50mV/DIV VS = ±5V 50ns/DIV 18012 G36 AV = 1 RL = 1k Output Overdriven Recovery VIN 1V/DIV VS = 5V, 0V 100ns/DIV 18012 G37 AV = 2 RL = 1k VOUT 2V/DIV ± 5V Large-Signal Response 2V/DIV VS = ±5V 200ns/DIV 18012 G35 AV = 1 RL = 1k 5V Large-Signal Response 1V/DIV VS = 5V, 0V 100ns/DIV 18012 G33 AV = 1 RL = 1k 5V Small-Signal Response 50mV/DIV VS = 5V, 0V 50ns/DIV 18012 G34 AV = 1 RL = 1k

Q19 act to cancel the bias current of the PNP input pair. Figure 1. LT1801/LT1802 Simplified Schematic Diagram

18012 F01

voltage is at half of either supply voltage (or the maximum swing is less than 1/2 supply voltage). PDMAX is given by: PDMAX = (VS • ISMAX) + (VS/2)2/RL Example: An LT1801 in an SO-8 package operating on ±5V supplies and driving a 50 Ω load, the worst-case power dissipation is given by: = 0.17W If both amplifiers are loaded simultaneously, then the total power dissipation is 0.34W. The maximum ambient temperature that the part is al- lowed to operate is: T A = TJ – (PDMAX • 190°C/W) Input Offset Voltage The offset voltage will change depending upon which input stage is active. The PNP input stage is active from the negative supply rail to 1.2V from the positive supply rail, then the NPN input stage is activated for the remaining input range up to the positive supply rail during which the PNP stage remains inactive. The offset voltage is typically less than 75µV in the range that the PNP input stage is active. Input Bias Current The LT1801/LT1802 employ a patent-pending technique to trim the input bias current to less than 250nA for the input common mode voltage of 0.2V above negative supply rail to 1.2V of the positive rail. The low input offset voltage and low input bias current of the LT1801/LT1802 provide precision performance especially for high source impedance applications. Output The LT1801/LT1802 can deliver a large output current, so the short-circuit current limit is set around 50mA to prevent damage to the device. Attention must be paid to keep the junction temperature of the IC below the absolute maximum rating of 150°C (refer to the Power Dissipation section) when the output is continuously short circuited. The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to several hundred mA and the total supply voltage is less than 12.6V, the absolute maximum rating, no damage will occur to the device. Overdrive Protection When the input voltage exceeds the power supplies, two pairs of crossing diodes D1 to D4 will prevent the output from reversing polarity. If the input voltage exceeds either power supply by 700mV, diode D1/D2 or D3/D4 will turn on to keep the output at the proper polarity. For the phase reversal protection to perform properly, the input current must be limited to less than 10mA. If the amplifier is severely overdriven, an external resistor should be used to limit the overdrive current. The LT1801/LT1802’s input stages are also protected against a large differential input voltage of 1.4V or higher by a pair of back-back diodes D5/D8 to prevent the emitter- base breakdown of the input transistors. The current in these diodes should be limited to less than 10mA when they are active. The worst-case differential input voltage usually occurs when the input is driven while the output is shorted to ground in a unity gain configuration. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins by a pair of protection diodes on each pin that are connected to the power supplies as shown in Figure 1. APPLICATIO S I FOR ATIOWU UU

graph displays the frequency response of the filter. Stopband attenuation is greater than 100dB at 50MHz. case output offset voltage is less than 6mV.

18012 F02

Figure 2. Fast 1A Current Sense Figure 3. Current Sense Amplifier Large-Signal Response response of the circuit is shown in Figure 3. load with a specified series resistor. eliminate any ringing or oscillation.

18012 F04

Figure 4. Single Supply 1A Laser Driver Amplifier Figure 5. 500mA Pulse Response

MSOP (MS8) 0802 0.53 ± 0.015 (.021 ± .006) SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.18 (.077) 0.254 (.010) 1.10 (.043) MAX 0.22 – 0.38 (.009 – .015) TYP 0.13 ± 0.076 (.005 ± .003) 0.86 (.034) REF 0.65 (.0256) BSC 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 12 3 4 4.90 ± 0.15 (1.93 ± .006) 8 7 6 5 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 3.00 ± 0.102 (.118 ± .004) NOTE 4 0.52 (.206) REF 5.23 (.206) MIN 3.2 – 3.45 (.126 – .136) 0.889 ± 0.127 (.035 ± .005) RECOMMENDED SOLDER PAD LAYOUT 0.42 ± 0.04 (.0165 ± .0015) TYP 0.65 (.0256) BSC 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 3.00 ±0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 0.38 ± 0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ± 0.10 (2 SIDES) 0.75 ±0.05 R = 0.115 TYP 2.38 ±0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6)

0.200 REF

0.00 – 0.05 (DD) DFN 1203 0.25 ± 0.05 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 ±0.05 (2 SIDES)2.15 ±0.05 0.50 BSC 0.675 ±0.05 3.5 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05

0.50 BSC

8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698)

14-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) N 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 14 13 .337 – .344 (8.560 – 8.738) NOTE 3 .228 – .244 (5.791 – 6.197) 12 11 10 9 5 6 7 N/2 .016 – .050 (0.406 – 1.270) .010 – .020 0° – 8° TYP .008 – .010 (0.203 – 0.254) S14 0502 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .245 MIN N 1 2 3 N/2 .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .016 – .050 (0.406 – 1.270) .010 – .020 0°– 8° TYP .008 – .010 (0.203 – 0.254) SO8 0303 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC 1 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 8 7 6 5 .189 – .197 (4.801 – 5.004) NOTE 3 .228 – .244 (5.791 – 6.197) .245 MIN .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

allowing for dense layout, and inherits better reliability. providing a 200V output swing into a 100pF load. C-Load is a trademark of Linear Technology Corporation.

18012 F06

Figure 6. Low Power, High Voltage Amplifier Figure 7. Large-Signal Time Domain