LMX2335 TI
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LMX2335,LMX2336,LMX2337 LMX2335/LMX2336/LMX2337 PLLatinum Dual Frequency Synthesizer for RF Personal Communications Literature Number: SNAS100
PLLatinum ™ Dual Frequency Synthesizer for RF Personal Communications LMX2335 1.1 GHz/1.1 GHz LMX2336 2.0 GHz/1.1 GHz LMX2337 550 MHz/550 MHz General Description The LMX2335, LMX2336 and LMX2337 are monolithic, inte- grated dual frequency synthesizers, including two high fre- quency prescalers, and are designed for applications requir- ing two RF phase-lock loops. They are fabricated using National’s ABiC IV silicon BiCMOS process. The LMX2335/36/37 contains two dual modulus prescalers. A 64/65 or a 128/129 prescaler can be selected for each RF synthesizer. A second reference divider chain is included in the IC for improved system noise. LMX2335/36/37, which employ a digital phase locked loop technique, combined with a high quality reference oscillator and loop filters, provide the tuning voltages for voltage controlled oscillators to generate very stable low noise RF local oscillator signals. Serial data is transferred into the LMX2335/36/37 via a three wire interface (Data, Enable, Clock). Supply voltage can range from 2.7V to 5.5V. The LMX2335/36/37 feature very low current consumption; LMX2335/37 −10 mA at 3V, LMX2336 −13 mA at 3V. The LMX2335/37 are available in both a JEDEC SO and TSSOP 16-pin surface mount plastic package. The LMX2336 is available in a TSSOP 20-pin sur- face mount plastic package.
Features
n 2.7V to 5.5V operation n Low current consumption n Selectable powerdown mode: ICC = 1 µA (typ) n Dual modulus prescaler: 64/65 or 128/129 n Selectable charge pump TRI-STATE® mode n Selectable charge pump current levels n Selectable FastLock™ mode
Applications
n Cellular telephone systems (AMPS, ETACS, RCR-27) n Cordless telephone systems (DECT, ISM, PHS, CT-1+) n Personal Communication Systems (DCS-1800, PCN-1900) n Dual Mode PCS phones n CATV n Other wireless communication systems Functional Block Diagram TRI-STATE® is a registered trademark of National Semiconductor Corporation. Fastlock™ , MICROWIRE ™ and PLLatinum™ are trademarks of National Semiconductor Corporation. DS012332-1 September 1996 LMX2335/LMX2336/LMX2337 PLLatinum Dual Frequency Synthesizer for RF Personal Communications © 2000 National Semiconductor Corporation DS012332 www.national.com
Pin No. Pin No. 2336 Pin Name I/O Description 11 V CC 1 Power supply voltage input for RF1 analog and RF1 digital circuits. Input may range from 2.7V to 5.5V. VCC 1 must equal VCC 2. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. 22 V p1 Power supply for RF1 charge pump. Must be ≥ VCC . 33 D o1 O RF1 charge pump output. For connection to a loop filter for driving the input of an external VCO. 4 4 GND LMX2335/37: Ground for RF1 analog and RF1 digital circuits. LMX2336: Ground for RF digital circuitry. 55 f IN1 I First RF prescaler input. Small signal input from the VCO. X6 f IN1 I RF1 prescaler complementary input. A bypass capacitor should be placed as close as possible to this pin and be connected directly to the ground plane. Capacitor is optional with loss of some sensitivity. X 7 GND Ground for RF1 analog circuitry. 6 8 OSC in I Oscillator input. The input has a VCC /2 input threshold and can be driven from an external CMOS or TTL logic gate. 7 9 OSC out O Oscillator output. 81 0 F oLD O Multiplexed output of the programmable or reference dividers, lock detect signals and Fastlock mode. CMOS output(see Programmable Modes). 9 11 Clock I High impedance CMOS Clock input. Data for the various latches is clocked in on the rising edge, into the 20-bit shift register. 10 12 Data I Binary serial data input. Data entered MSB first. The last two bits are the control bits. High impedance CMOS input. 11 13 LE I Load enable high impedance CMOS input. When LE goes HIGH, data stored in the shift registers is loaded into one of the 4 appropriate latches (control bit dependent). X 14 GND Ground for RF2 analog circuitry. X1 5 f IN2 I RF2 prescaler complementary input. A bypass capacitor should be placed as close as possible to this pin and be connected directly to the ground plane. Capacitor is optional with loss of some sensitivity. 12 16 f IN2 I RF2 prescaler input. Small signal input from the VCO. 13 17 GND LMX2335/37: Ground for RF2 analog, RF2 digital, MICROWIRE ™ ,FoLD and Oscillator circuits. LMX2336: Ground for RF2 digital, MICROWIRE, FoLD and Oscillator circuits. 14 18 D o2 O RF2 charge pump output. For connection to a loop filter for driving the input of an external VCO. 15 19 V p2 Power supply for RF2 charge pump. Must be ≥ VCC . LMX2335/LMX2337 DS012332-2 Order Number LMX2335M/LMX2335TM or LMX2337M/LMX2337TM LMX2336 DS012332-16 Order Number LMX2336TM LMX2335/LMX2336/LMX2337 www.national.com 2
Pin Descriptions(Continued) Pin No. Pin No. 2336 Pin Name I/O Description 16 20 V CC 2 Power supply voltage input for RF2 analog. RF2 digital, MICROWIRE, FoLD and capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. Block Diagram DS012332-17 Note:VCC 1 supplies power to the RF1 prescaler, N-counter, R-counter, and phase detector. VCC 2 supplies power to the RF2 prescaler, N-counter, phase detector, R-counter along with the OSCinbuffer, MICROWIRE, and FoLD. VCC 1 and VCC 2 are clamped to each other by diodes and must be run at the same voltage level. VP1 and VP2 can be run separately as long as VP ≥ VCC . LMX2335/37 Pin # → 8/10← LMX2336 Pin # Pin Name → FoLD X signifies a function not available LMX2335/LMX2336/LMX2337 www.national.com3
Absolute Maximum Ratings(Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Power Supply Voltage V CC −0.3V to +6.5V VP −0.3V to +6.5V Voltage on Any Pin with GND = 0V (VI) −0.3V to V CC +0.3V Storage Temperature Range (TS) −65˚C to +150˚C Lead Temperature (solder 4 sec.) (TL) +260˚C Recommended Operating Conditions Power Supply Voltage VCC 2.7V to 5.5V VP VCC to +5.5V Operating Temperature (TA) −40˚C to +85˚C
Electrical Characteristics
VCC = 5.0V, Vp = 5.0V; TA = 25˚C, except as specified Symbol Parameter Conditions Value UnitsMin Typ Max ICC Power Supply Current LMX2335/37 RF1 and RF2 VCC = 2.7V to 5.5V 10 15 mA ICC LMX2335/37 RF1 only 68 m A ICC LMX2336 RF1 and RF2 13 18 mA LMX2336 RF1 only 7 11 mA fIN1 Operating Frequency LMX2335 0.100 1.1 GHz fIN2 0.050 1.1 GHz fIN1 LMX2336 0.200 2.0 GHz fIN2 0.050 1.1 GHz fIN1 LMX2337 100 550 MHz fIN2 50 550 MHz ICC-PWDN Powerdown Current LMX2335/2336 V CC = 5.5V 1 25 µALMX2337 100 fOSC Oscillator Frequency With resonator load on OSC out 5 20 MHz fOSC No load on OSCOUT 5 40 MHz fφ Phase Detector Frequency 10 MHz PfIN 1 and Pfin2 RF Input Sensitivity V CC = 3.0V, f> 100 MHz −15 +4 dBmVCC = 5.0V, f> 100 MHz −10 +4 VCC = 2.7 to 5.5V, f> 100 MHz −10 0 VOSC Oscillator Sensitivity OSC IN 0.5 V PP VIH High-Level Input Voltage (Note 4) 0.8 VCC V VIL Low-Level Input Voltage (Note 4) 0.2 VCC V IIH High-Level Input Current V IH =V CC = 5.5V (Note 4) −1.0 1.0 µA IIL Low-Level Input Current V IL = 0V, VCC = 5.5V (Note 4) −1.0 1.0 µA IIH Oscillator Input Current V IH =V CC = 5.5V 100 µA IIL Oscillator Input Current V IL = 0V, VCC = 5.5V −100 µA ID o-SOURCE Charge Pump Output Current V D o =V p/2, ICP o = LOW (Note 3) −1.25 mA ID o-SINK VD o =V p/2, ICP o = LOW (Note 3) 1.25 mA ID o-SOURCE VD o =V p/2, ICP o = HIGH (Note 3) −5.0 mA ID o-SINK VD o =V p/2, ICP o = HIGH (Note 3) 5.0 mA LMX2335/LMX2336/LMX2337 www.national.com 4
Electrical Characteristics(Continued) VCC = 5.0V, Vp = 5.0V; TA = 25˚C, except as specified Symbol Parameter Conditions Value UnitsMin Typ Max ID o-TRI Charge Pump TRI-STATE CURRENT LMX2335 LMX2336 0.5V ≤ V D o ≤ Vp − 0.5V T = 25˚C −5.0 5.0 nA ID o-TRI Charge Pump TRI-STATE CURRENT LMX2337 0.5V ≤ V D o ≤ Vp − 0.5V T = 25˚C ±5n A VOH High-Level Output Voltage I OH = −500 µA V CC − 0.4 V VOL Low-Level Output Voltage I OL = 500 µA 0.4 V tCS Data to Clock Setup Time See Data Input Timing 50 ns ICH Data to Clock Hold Time See Data Input Timing 10 ns tCWH Clock Pulse Width High See Data Input Timing 50 ns tCWL Clock Pulse Width Low See Data Input Timing 50 ns tES Clock to Load Enable Set Up Time See Data Input Timing 50 ns tEW Load Enable Pulse Width See Data Input Timing 50 ns Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performanced limits. For guaranteed specifications and test conditions, see the Electrical Char- acteristics. The guaranteed specifications apply only for the test conditions listed. Note 2:This device is a high performance RF integrated circuit with an ESD rating<2 keV and is ESD sensitive. Handling and assembly of this device should only be done at ESD protected workstations. Note 3:See PROGRAMMABLE MODES for I CP o description. Note 4:Clock, Data and LE does not include fIN1, fIN2 and OSCin. Typical Performance Characteristics ICC vs VCC LMX2335/37 DS012332-19 ICC vs VCC LMX2336 DS012332-20 LMX2335/LMX2336/LMX2337 www.national.com5
Typical Performance Characteristics(Continued) Charge Pump Current vs Do Voltage ICP = HIGH DS012332-21 Charge Pump Current vs Do Voltage ICP = LOW DS012332-22 LMX2335/37 Input Impedance (for SO package) V CC = 2.7V to 5.5V, fIN = 50 MHz to 1.5 GHz DS012332-23 Marker 1 = 1 GHz, Real = 94, Imaginary = −118 Marker 2 = 1.2 GHz, Real = 72, Imaginary = −88 Marker 3 = 1.5 GHz, Real = 53, Imaginary = −45 Marker 4 = 500 MHz, Real = 201, Imaginary = −224 LMX2335/37 Input Impedance (for TSSOP package) LMX2336 Input Impedance VCC = 2.7V to 5.5V, fIN = 50 MHz to 2.5 GHz DS012332-24 Marker 1 = 1 GHz, Real = 97, Imaginary = −146 Marker 2 = 1.89 GHz, Real = 43, Imaginary = −67 Marker 3 = 2.5 GHz, Real = 30, Imaginary = −33 Marker 4 = 500 MHz, Real = 189, Imaginary = −233 LMX2335/LMX2336/LMX2337 www.national.com 6
Typical Performance Characteristics(Continued) IDo TRI-STATE vs Do Voltage DS012332-25 LMX2335/37 RF1 Sensitivity vs Frequency DS012332-26 LMX2335/37 RF2 Sensitivity vs Frequency DS012332-27 LMX2336 RF1 Sensitivity vs Frequency DS012332-28 LMX2336 RF2 Sensitivity vs Frequency DS012332-29 Oscillator Input Sensitivity vs Frequency DS012332-30 LMX2335/LMX2336/LMX2337 www.national.com7
The simplified block diagram below shows the 22-bit data register, two 15-bit R Counters and two 18-bit N Counters (intermediate latches are not shown). The data stream is clocked (on the rising edge of Clock) into the DATA register, MSB first. The data stored in the shift register is loaded into one of the 4 appropriate latches on the rising edge of LE. The last two bits are the Control Bits. The DATA is transferred into the counters as follows: Control Bits DATA Location C1 C2 0 0 RF2 R Counter 0 1 RF1 R Counter 1 0 RF2 N Counter 1 1 RF1 N Counter PROGRAMMABLE REFERENCE DIVIDERS (RF1 AND RF2 R COUNTERS) If the Control Bits are 00 or 01 (00 for RF2 and 01 for RF1) data is transferred from the 22-bit shift register into a latch which sets the 15-bit R Counter. Serial data format is shown below. 15-BIT PROGRAMMABLE REFERENCE DIVIDER RATIO (R COUNTER) Divide Ratio R R R R R R R R R R R R R R R 3 000000 000000011 4 000000 000000100 32767 111111 111111111 Notes:Divide ratios less than 3 are prohibited. Divide ratio: 3 to 32767 R1 to R15: These bits select the divide ratio of the programmable reference divider. Data is shifted in MSB first. DS012332-1 DS012332-4 LMX2335/LMX2336/LMX2337 www.national.com 8
Functional Description(Continued) PROGRAMMABLE DIVIDER (N COUNTER) Each N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control Bits are 10 or 11 (10 for RF2 counter and 11 for RF1 counter) data is transferred from the 20-bit shift register into a 7-bit latch (which sets the Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter), MSB first. Serial data format is shown below. 7-BIT SWALLOW COUNTER DIVIDE RATIO (A COUNTER) Divide Ratio A N N N N N N N 0 0000000 1 0000001 1 2 7 1111111 Notes:Divide ratio: 0 to 127 B ≥ A A < P 11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER) Divide Ratio B N N N N N N N N N N N 3 00000000011 4 00000000100 2047 11111111111 Notes:Divide ratio: 3 to 2047 (Divide ratios less than 3 are prohibited) B ≥ A PULSE SWALLOW FUNCTION fVCO =[ ( PxB )+A ]xfOSC /R fVCO : Output frequency of external voltage controlled oscillator (VCO) B: Preset divide ratio of binary 11-bit programmable counter (3 to 2047) A: Preset divide ratio of binary 7-bit swallow counter (0≤ A ≤ P; A≤ B) f OSC : Output frequency of the external reference frequency oscillator R: Preset divide ratio of binary 15-bit programmable reference counter (3 to 32767) P: Preset modulus of dual moduIus prescaler (P = 64 or 128) PROGRAMMABLE MODES Several modes of operation can be programmed with bits R16–R20 including the phase detector polarity, charge pump tristate and the output of the F oLD pin. The prescaler and power down modes are selected with bits N19 and N20. The programmable modes are shown inTable 1. Truth table for the programmable modes and FoLD output are shown inTables 2, 3. DS012332-5 LMX2335/LMX2336/LMX2337 www.national.com9
TABLE 1. Programmable Modes
10 RF2
11 RF1
TABLE 2. Mode Select Truth Table
0 Negative Normal Operation LOW 64/65 64/65 pwrd up
1 Positive TRI-STATE HIGH 128/129 128/129 pwrd dn
Note 5:The ICP o LOW current state = 1/4 x ICP o HIGH current. dition exists. The MICROWIRE control register remains active and capable of loading and latching data during all of the powerdown modes. When VCO characteristics are negative like (2), R16 should be set LOW. TABLE 3. The FoLD Output Truth Table
0000 Disabled (Note 9)
0100 R F 2 Lock Detect (Note 10)
1000 R F 1 Lock Detect (Note 10)
1100 RF1/RF2 Lock Detect (Note 10)
0011 Fastlock (Note 11)
0111 F o r Internal use only
1011 F o r Internal use only
1111 Counter Reset (Note 12)
Functional Description(Continued) Note 9:When the FoLD output is disabled it is actively pulled to a low logic state. Note 10:Lock detect output provided to indicate when the VCO frequency is in “lock”. When the loop is locked and a lock detect mode is selected, the pins output is HIGH, with narrow pulses LOW. In the RF1/RF2 lock detect mode a locked condition is indicated when RF2 and RF1 are both locked. Note 11:The Fastlock mode utilized the FoLD output pin to switch a second loop filter damping resistor to ground during fastlock operation. Activation of Fastlock occurs whenever the RF loop’s Icpo magnitude bit#17 is selected HIGH (while the#19 and#20 mode bits are set for Fastlock). Note 12:The Counter Reset mode bits R19 and R20 when activated reset all counters. Upon removal of the Reset bits the N counter resumes counting in “close” alignment with the R counter. (The maximum error is one prescaler cycle). If the Reset bits are activated the R counter is also forced to Reset, allowingsmooth ac- quisition upon powering up. SERIAL DATA INPUT TIMING PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS DS012332-8 Notes:Parenthesis data indicates programmable reference divider data. Data shifted into register on clock rising edge. Data is shifted in MSB first. Test Conditions:The Serial Data Input Timing is tested using a symmetrical waveform around V CC /2. The test waveform has an edge rate of 0.6V/ns with DS012332-9 Notes:Phase difference detection range: −2π to +2π The minimum width pump up and pump down current pulses occur at the Do pin when the loop is locked. LMX2335/LMX2336/LMX2337 www.national.com11
Typical Application Example
Application Information
A block diagram of the basic phase locked loop is shown inFigure 1. DS012332-10 Operational Notes: * VCO is assumed AC coupled. R IN increases impedance so that VCO output power is provided to the load rather than the PLL. Typical values are 10Ω to 200Ω depending on the VCO power level. fIN RF impedance ranges from 40Ω to 100Ω .fIN IF impedances are higher. * 50Ω termination is often used on test boards to allow use of external reference oscillator. For most typical products a CMOS clock is used and no terminating resistor is required. OSCin may be AC or DC coupled. AC coupling is recom- mended because the input circuit provides its own bias. (SeeFigurebelow). **** Adding RC filters to the VCC lines is recommended to reduce loop-to-loop noise coupling. DS012332-11 Application Hints: Proper use of grounds and bypass capacitors is essential to achieve a high level of performance. Crosstalk between pins can be reduced by careful board layout. This is an electrostatic sensitive device. It should be handled only at static free work stations. DS012332-12 FIGURE 1. Conventional PLL Architecture
Physical Dimensionsinches (millimeters) unless otherwise noted JEDEC 16-Lead (0.150" Wide) Small Outline Molded Package (M) Order Number LMX2335M or LMX2337M *For Tape and Reel (2500 Units Per Reel) Order Number LMX2335MX or LMX2337MX LMX2335/LMX2336/LMX2337 www.national.com15
Physical Dimensionsinches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TM) Order Number LMX2335TM or LMX2337TM *For Tape and Reel (2500 Units Per Reel) Order Number LMX2335TMX or LMX2337TMX LMX2335/LMX2336/LMX2337 www.national.com 16
Physical Dimensionsinches (millimeters) unless otherwise noted (Continued) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com 20-Lead (0.173" Wide) Thin Shrink Small Outline Package (TM) Order Number LMX2336TM *For Tape and Reel (2500 Units Per Reel) Order Number LMX2336TMX LMX2335/LMX2336/LMX2337 PLLatinum Dual Frequency Synthesizer for RF Personal Communications National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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