LMR12007 Thin SOT23 750mA Load Step-Down DC-DC Regulator datasheet
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SNVS982,*]
- PDF pages: 31
Technical content
www.ti.com SNVS982 –SEPTEMBER 2013 LMR12007ThinSOT23750mALoadStep-DownDC-DCRegulator Check for Samples: LMR12007 1FEATURES DESCRIPTION The LMR12007 regulator is a monolithic, high 23• Thin SOT-6 Package frequency, PWM step-down DC/DC converter in a 6-• 3.0V to 18V Input Voltage Range pin Thin SOT package. It provides all the active
- 1.25V to 16V Output Voltage Range functions to provide local DC/DC conversion with fast transient response and accurate regulation in the• 750mA Output Current smallest possible PCB area.• 550kHz (LMR12007Y) and 1.6MHz (LMR12007X) With a minimum of external components and onlineSwitching Frequencies design support through WEBENCH®, the LMR12007• 350mΩ NMOS Switch is easy to use. The ability to drive 750mA loads with• 30nA Shutdown Current an internal 350mΩ NMOS switch using state-of-the-
- 1.25V, 2% Internal Voltage Reference art 0.5µm BiCMOS technology results in the best power density available. The world class control• Internal Soft-Start circuitry allows for on-times as low as 13ns, thus• Current-Mode, PWM Operation supporting exceptionally high frequency conversion
- WEBENCH® Online Design Tool over the entire 3V to 18V input operating range down to the minimum output voltage of 1.25V. Switching• Thermal Shutdown frequency is internally set to 550kHz (LMR12007Y) or 1.6MHz (LMR12007X), allowing the use of extremelyAPPLICATIONS small surface mount inductors and chip capacitors.
- Local Point of Load Regulation Even though the operating frequencies are very high, efficiencies up to 90% are easy to achieve. External• Core Power in HDDs shutdown is included, featuring an ultra-low stand-by• Set-Top Boxes current of 30nA. The LMR12007 utilizes current-mode
- Battery Powered Devices control and internal compensation to provide high- performance regulation over a wide range of• USB Powered Devices operating conditions. Additional features include• DSL Modems internal soft-start circuitry to reduce inrush current,• Notebook Computers pulse-by-pulse current limit, thermal shutdown, and output over-voltage protection. Typical Application Circuit Efficiency vs Load Current "X" VIN = 5V, VOUT = 3.3V Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2WEBENCH is a registered trademark of Texas Instruments. 3All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2013, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Figure 1. 6-Lead SOT Figure 2. Pin 1 Indentification 3 FB Feedback pin. Connect FB to the external resistor divider to set output voltage. 4 EN Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3V. 5 VIN Input supply voltage. Connect a bypass capacitor to this pin. 6 SW Output switch. Connects to the inductor, catch diode, and bootstrap capacitor. during storage or handling to prevent electrostatic damage to the MOS gates. (2) Human body model, 1.5kΩ in series with 100pF.
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www.ti.com SNVS982 –SEPTEMBER 2013 Operating Ratings(1) VIN 3V to 18V SW Voltage -0.5V to 18V Boost Voltage -0.5V to 23V Boost to SW Voltage 1.6V to 5.5V Junction Temperature Range −40°C to +125°C Thermal Resistance θJA(2) 118°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For specific specifications and the test conditions, see Electrical Characteristics. (2) Thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of TJ(MAX) , θJA and TA . The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/θJA . All numbers apply for packages soldered directly onto a 3”x 3”PC board with 2oz. copper on 4 layers in still air. For a 2 layer board using 1 oz. copper in still air, θJA = 204°C/W.
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those in boldface type apply over the full Operating Temperature Range (TJ = -40°C to 125°C). VIN = 5V, VBOOST - VSW = 5V unless otherwise specified. Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Symbol Parameter Conditions Min(1) Typ(2) Max(1) Units VFB Feedback Voltage 1.225 1.250 1.275 V ΔVFB/ΔVIN Feedback Voltage Line Regulation VIN = 3V to 18V 0.01 % / V IFB Feedback Input Bias Current Sink/Source 10 250 nA Undervoltage Lockout VIN Rising 2.74 2.90 UVLO Undervoltage Lockout VIN Falling 2.0 2.3 V UVLO Hysteresis 0.30 0.44 0.62 LMR12007X 1.2 1.6 1.9 FSW Switching Frequency MHz LMR12007Y 0.40 0.55 0.66 LMR12007X 85 92 DMAX Maximum Duty Cycle % LMR12007Y 90 96 LMR12007X 2 DMIN Minimum Duty Cycle % LMR12007Y 1 RDS(ON) Switch ON Resistance VBOOST - VSW = 3V 350 650 mΩ ICL Switch Current Limit VBOOST - VSW = 3V 1.0 1.5 2.3 A IQ Quiescent Current Switching 1.5 2.5 mA Quiescent Current (shutdown) VEN = 0V 30 nA LMR12007X (50% Duty Cycle) 2.2 3.3 IBOOST Boost Pin Current mA LMR12007Y (50% Duty Cycle) 0.9 1.6 Shutdown Threshold Voltage VEN Falling 0.4 VEN_TH V Enable Threshold Voltage VEN Rising 1.8 IEN Enable Pin Current Sink/Source 10 nA ISW Switch Leakage 40 nA (1) Specified to Texas Instruments' Average Outgoing Quality Level (AOQL). (2) Typicals represent the most likely parametric norm. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMR12007
Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8.
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Figure 15. Figure 16. Figure 17. Figure 18.
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L D BOOST Output Control Logic Current Limit Thermal Shutdown Under Voltage Lockout Corrective Ramp Reset Pulse PWM Comparator Current-Sense Amplifier RSENSE Internal Regulator and Enable Circuit Oscillator Driver 0.3/c3a Switch Internal Compensation SW EN FB GND Error Amplifier - + VREF 1.25V C OUT ON OFF VBOOST VSW C BOOST VOUT C IN VIN VIN ISENSE + - - 1.375V OVP Comparator Error Signal IL LMR12007 www.ti.com SNVS982 –SEPTEMBER 2013 Block Diagram Figure 19.
APPLICATION INFORMATION
The LMR12007 is a constant frequency PWM buck regulator IC that delivers a 750mA load current. The regulator has a preset switching frequency of either 550kHz (LMR12007Y) or 1.6MHz (LMR12007X). These high frequencies allow the LMR12007 to operate with small surface mount capacitors and inductors, resulting in DC/DC converters that require a minimum amount of board space. The LMR12007 is internally compensated, so it is simple to use, and requires few external components. The LMR12007 uses current-mode control to regulate the output voltage. The following operating description of the LMR12007 will refer to the Simplified Block Diagram (Figure 19) and to the waveforms in Figure 20. The LMR12007 supplies a regulated output voltage by switching the internal NMOS control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the internal NMOS control switch. During this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and the inductor current (IL) increases with a linear slope. IL is measured by the current-sense amplifier, which generates an output proportional to the switch current. The sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and VREF. When the PWM comparator output goes high, the output switch turns off until the next switching cycle begins. During the switch off-time, inductor current discharges through Schottky diode D1, which forces the SW pin to swing below ground by the forward voltage (VD) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LMR12007
Figure 20. LMR12007 Waveforms of SW Pin Voltage and Inductor Current the maximum operating limit of 5.5V. 5.5V > VBOOST – VSW > 2.5V for best performance. Figure 21. VOUT Charges CBOOST When the LMR12007 starts up, internal circuitry from the BOOST pin supplies a maximum of 20mA to CBOOST. current to CBOOST until the voltage at the feedback pin is greater than 1.18V.
- From the input voltage (VIN)
- From the output voltage (VOUT)
- From an external distributed voltage rail (VEXT)
- From a shunt or series zener diode
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this circuit, CBOOST provides a gate drive voltage that is slightly less than VOUT. outside the recommended VBOOST voltage. Figure 22. Zener Reduces Boost Voltage from VIN 0.1 µF parallel shunt capacitor ensures that the VBOOST voltage is maintained during this time. For example, using the X-version let VIN = 10V, VZENER = 5V, VD2 = 0.7V, IZENER = 1mA, and duty cycle D = 50%.
Figure 23. Boost Voltage Supplied from the Shunt Zener on VIN adds another 40nA from the input supply. The voltage at this pin should never exceed VIN + 0.3V. output to ramp up in a more linear and controlled fashion, which helps reduce inrush current. switch is turned off, which allows the output voltage to decrease toward regulation. Undervoltage lockout (UVLO) prevents the LMR12007 from operating until the input voltage exceeds 2.74V(typ). 2.3V(typ). Hysteresis prevents the part from turning off during power up if VIN is non-monotonic. next switching cycle begins. drops to approximately 150°C.
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L = VO + VD IO x r x fS x (1-D) r = /c27iL lO D = VO + VD VIN + VD - VSW D = VO VIN LMR12007 www.ti.com SNVS982 –SEPTEMBER 2013 Design Guide INDUCTOR SELECTION The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (VO) to input voltage (VIN): (12) The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to calculate a more accurate duty cycle. Calculate D by using the following formula: (13) VSW can be approximated by: VSW = IO x RDS(ON) (14) The diode forward drop (VD) can range from 0.3V to 0.7V depending on the quality of the diode. The lower VD is, the higher the operating efficiency of the converter. The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor, but increase the output ripple current. An increase in the inductor value will decrease the output ripple current. The ratio of ripple current (ΔiL) to output current (IO) is optimized when it is set between 0.3 and 0.4 at 750mA. The ratio r is defined as: (15) One must also ensure that the minimum current limit (1.0A) is not exceeded, so the peak current in the inductor must be calculated. The peak current (ILPK) in the inductor is calculated by: ILPK = IO + ΔIL/2 (16) If r = 0.7 at an output of 750mA, the peak current in the inductor will be 1.0125A. The minimum ensured current limit over all operating conditions is 1.0A. One can either reduce r to 0.6 resulting in a 975mA peak current, or make the engineering judgement that 12.5mA over will be safe enough with a 1.5A typical current limit and 6 sigma limits. When the designed maximum output current is reduced, the ratio r can be increased. At a current of 0.1A, r can be made as high as 0.9. The ripple ratio can be increased at lighter loads because the net ripple is actually quite low, and if r remains constant the inductor value can be made quite large. An equation empirically developed for the maximum ripple ratio at any current below 2A is: r = 0.387 x IOUT -0.3667 (17) Note that this is just a guideline. The LMR12007 operates at frequencies allowing the use of ceramic output capacitors without compromising transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple. See the OUTPUT CAPACITOR section for more details on calculating output voltage ripple. Now that the ripple current or ripple ratio is determined, the inductance is calculated by: (18) where fs is the switching frequency and IO is the output current. When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating. Inductor saturation will result in a sudden reduction in inductance and prevent the regulator from operating correctly. Because of the speed of the internal current limit, the peak current of the inductor need only be specified for the required maximum output current. For example, if the designed maximum output current is 0.5A and the peak current is 0.7A, then the inductor should Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LMR12007
IRMS-OUT = IO x r /c27VO = /c27iL x (RESR + 1 8 x fS x CO IRMS-IN = IO x D x r2 121-D + LMR12007 SNVS982 –SEPTEMBER 2013 www.ti.com be specified with a saturation current limit of >0.7A. There is no need to specify the saturation or peak current of the inductor at the 1.5A typical switch current limit. The difference in inductor size is a factor of 5. Because of the operating frequency of the LMR12007, ferrite based inductors are preferred to minimize core losses. This presents little restriction since the variety of ferrite based inductors is huge. Lastly, inductors with lower series resistance (DCR) will provide better operating efficiency. For recommended inductors see Example Circuits. INPUT CAPACITOR An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent Series Inductance). The recommended input capacitance is 10µF, although 4.7µF works well for input voltages below 6V. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any recommended deratings and also verify if there is any significant change in capacitance at the operating input voltage and the operating temperature. The input capacitor maximum RMS input current rating (IRMS-IN) must be greater than: (19) It can be shown from the above equation that maximum RMS capacitor current occurs when D = 0.5. Always calculate the RMS at the point where the duty cycle, D, is closest to 0.5. The ESL of an input capacitor is usually determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the LMR12007, certain capacitors may have an ESL so large that the resulting impedance (2πfL) will be higher than that required to provide stable operation. As a result, surface mount capacitors are strongly recommended. Sanyo POSCAP, Tantalum or Niobium, Panasonic SP or Cornell Dubilier ESR, and multilayer ceramic capacitors (MLCC) are all good choices for both input and output capacitors and have very low ESL. For MLCCs it is recommended to use X7R or X5R dielectrics. Consult capacitor manufacturer datasheet to see how rated capacitance varies over operating conditions. OUTPUT CAPACITOR The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load transient is provided mainly by the output capacitor. The output ripple of the converter is: (20) When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the availability and quality of MLCCs and the expected output voltage of designs using the LMR12007, there is really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass high frequency noise. A certain amount of switching edge noise will couple through parasitic capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not. Since the output capacitor is one of the two external components that control the stability of the regulator control loop, most applications will require a minimum at 10 µF of output capacitance. Capacitance can be increased significantly with little detriment to the regulator stability. Like the input capacitor, recommended multilayer ceramic capacitors are X7R or X5R. Again, verify actual capacitance at the desired operating voltage and temperature. Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet the following condition: (21)
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Product Folder Links: LMR12007
R 1 = VO - 1 VREF x R2 LMR12007 www.ti.com SNVS982 –SEPTEMBER 2013 CATCH DIODE The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than: ID1 = IO x (1-D) (22) The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin. To improve efficiency choose a Schottky diode with a low forward voltage drop. BOOST DIODE A standard diode such as the 1N4148 type is recommended. For VBOOST circuits derived from voltages less than 3.3V, a small-signal Schottky diode is recommended for greater efficiency. A good choice is the BAT54 small signal diode. BOOST CAPACITOR A ceramic 0.01µF capacitor with a voltage rating of at least 6.3V is sufficient. The X7R and X5R MLCCs provide the best performance. OUTPUT VOLTAGE The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and R1 is connected between VO and the FB pin. A good value for R2 is 10kΩ. (23) PCB Layout Considerations When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration when completing the layout is the close coupling of the GND connections of the CIN capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in importance is the location of the GND connection of the COUT capacitor, which should be near the GND connections of CIN and D1. There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island. The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND of R2 placed as close as possible to the GND of the IC. The VOUT trace to R1 should be routed away from the inductor and any other traces that are switching. High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible. However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor. The remaining components should also be placed as close as possible to the IC. Please see Application Note AN-1229 SNVA054 for further considerations and the LMR12007 demo board as an example of a four-layer layout. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LMR12007
Figure 24. LMR12007X (1.6MHz) Table 1. Bill of Materials for Figure 24 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc.
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Figure 25. LMR12007X (1.6MHz) Table 2. Bill of Materials for Figure 25 D2, Boost Diode 30V, 200 mA Schottky BAT54 Diodes Inc.
Figure 26. LMR12007X (1.6MHz) Table 3. Bill of Materials for Figure 26 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc.
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Figure 27. LMR12007X (1.6MHz) Table 4. Bill of Materials for Figure 27 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc. D3, Zener Diode 11V 350Mw SOT BZX84C11T Diodes, Inc.
Figure 28. LMR12007X (1.6MHz) Table 5. Bill of Materials for Figure 28 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc. D3, Zener Diode 4.3V 350mw SOT BZX84C4V3 Diodes, Inc.
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Figure 29. LMR12007Y (550kHz) Table 6. Bill of Materials for Figure 29 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc.
Figure 30. LMR12007Y (550kHz) Table 7. Bill of Materials for Figure 30 D2, Boost Diode 30V, 200 mA Schottky BAT54 Diodes Inc.
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Figure 31. LMR12007Y (550kHz) Table 8. Bill of Materials for Figure 31 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc.
Figure 32. LMR12007Y (550kHz) Table 9. Bill of Materials for Figure 32 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc. D3, Zener Diode 11V 350Mw SOT BZX84C11T Diodes, Inc.
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Figure 33. LMR12007Y (550kHz) Table 10. Bill of Materials for Figure 33 D2, Boost Diode 1VF @ 50mA Diode 1N4148W Diodes, Inc. D3, Zener Diode 4.3V 350mw SOT BZX84C4V3 Diodes, Inc.
www.ti.com 31-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LMR12007XMK Active Production SOT-23- THIN (DDC) | 6 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP1B LMR12007XMK.A Active Production SOT-23- THIN (DDC) | 6 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP1B LMR12007XMKX Active Production SOT-23- THIN (DDC) | 6 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP1B LMR12007XMKX.A Active Production SOT-23- THIN (DDC) | 6 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP1B LMR12007YMK Active Production SOT-23- THIN (DDC) | 6 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP2B LMR12007YMK.A Active Production SOT-23- THIN (DDC) | 6 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP2B LMR12007YMKX Active Production SOT-23- THIN (DDC) | 6 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP2B LMR12007YMKX.A Active Production SOT-23- THIN (DDC) | 6 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SP2B (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Addendum-Page 1
www.ti.com 31-Oct-2025 Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 5-Sep-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant LMR12007XMK SOT-23- THIN LMR12007XMKX SOT-23- THIN LMR12007YMK SOT-23- THIN LMR12007YMKX SOT-23- THIN Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 5-Sep-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR12007XMK SOT-23-THIN DDC 6 1000 208.0 191.0 35.0 LMR12007XMKX SOT-23-THIN DDC 6 3000 208.0 191.0 35.0 LMR12007YMK SOT-23-THIN DDC 6 1000 208.0 191.0 35.0 LMR12007YMKX SOT-23-THIN DDC 6 3000 208.0 191.0 35.0 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 0.20
0.12 TYP
0.25 3.05 2.55 4X 0.95 1.1 0.7 0.1
0.0 TYP
6X 0.5 0.3 0.6
0.3 TYP
1.9 0 -8 TYP 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 SOT-23 - 1.1 max heightDDC0006A SMALL OUTLINE TRANSISTOR 4214841/E 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC MO-193. 3 4
0.2 C A B
0.1 C SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.07 MAX
0.07 MIN
6X (1.1) 6X (0.6) (2.7) 4X (0.95) (R0.05) TYP 4214841/E 08/2024 SOT-23 - 1.1 max heightDDC0006A SMALL OUTLINE TRANSISTOR NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPLOSED METAL SHOWN SCALE:15X SYMM 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDERMASK DETAILS EXPOSED METAL
www.ti.com EXAMPLE STENCIL DESIGN (2.7) 4X(0.95) 6X (1.1) 6X (0.6) (R0.05) TYP SOT-23 - 1.1 max heightDDC0006A SMALL OUTLINE TRANSISTOR 4214841/E 08/2024 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:15X SYMM SYMM 3 4
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